From nobody Sat Feb 7 08:02:22 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F1A5C77B7A for ; Wed, 31 May 2023 10:48:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234784AbjEaKse (ORCPT ); Wed, 31 May 2023 06:48:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229935AbjEaKs0 (ORCPT ); Wed, 31 May 2023 06:48:26 -0400 Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B2FE123; Wed, 31 May 2023 03:48:24 -0700 (PDT) Received: from dggpeml500002.china.huawei.com (unknown [172.30.72.54]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4QWQrz41kvzLqKR; Wed, 31 May 2023 18:45:23 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by dggpeml500002.china.huawei.com (7.185.36.158) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Wed, 31 May 2023 18:48:22 +0800 From: Junhao He To: , , , CC: , , , , , , Subject: [PATCH v2 3/3] docs: perf: Add new description for HiSilicon UC PMU Date: Wed, 31 May 2023 18:46:25 +0800 Message-ID: <20230531104625.18296-4-hejunhao3@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20230531104625.18296-1-hejunhao3@huawei.com> References: <20230531104625.18296-1-hejunhao3@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggpeml500002.china.huawei.com (7.185.36.158) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" A new function is added on HiSilicon uncore UC PMU. The UC PMU support to filter statistical information based on the specified tx request uring channel. Make user configuration through "uring_channel" parameter. Document them to provide guidance on how to use them. Signed-off-by: Junhao He Reviewed-by: Jonathan Cameron Reviewed-by: Yicong Yang --- Documentation/admin-guide/perf/hisi-pmu.rst | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/ad= min-guide/perf/hisi-pmu.rst index 546979360513..939a524fa1d6 100644 --- a/Documentation/admin-guide/perf/hisi-pmu.rst +++ b/Documentation/admin-guide/perf/hisi-pmu.rst @@ -98,6 +98,14 @@ CCL/ICL-ID. For I/O die, the ICL-ID is followed by: 5'b00011: HAC_ICL; 5'b10000: PCIe_ICL; =20 +(e) uring_channel: UC PMU events 0x47~0x59 supports filtering by tx request +uring channel. It is 2 bits. Some important codes are as follows: +2'b11: count the events which sent to the uring_ext (MATA) channel; +2'b01: is the same as 2'b11; +2'b10: count the events which sent to the uring (non-MATA) channel; +2'b00: default value, count the events which sent to the both uring and + uring_ext channel; + Users could configure IDs to count data come from specific CCL/ICL, by set= ting srcid_cmd & srcid_msk, and data desitined for specific CCL/ICL by setting tgtid_cmd & tgtid_msk. A set bit in srcid_msk/tgtid_msk means the PMU will= not --=20 2.33.0