From nobody Fri Sep 20 20:36:11 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E9F0C7EE31 for ; Tue, 30 May 2023 19:51:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233438AbjE3Tvu (ORCPT ); Tue, 30 May 2023 15:51:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233428AbjE3Tvl (ORCPT ); Tue, 30 May 2023 15:51:41 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 369A8B2 for ; Tue, 30 May 2023 12:51:40 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-3f6e4554453so35573245e9.3 for ; Tue, 30 May 2023 12:51:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20221208.gappssmtp.com; s=20221208; t=1685476298; x=1688068298; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ciWtK/NV8FJwvyzOz+YO15ef5XwL4+CYCLNYB+bwuds=; b=amWzlV4cUJwRSvVCHD47QtIGQYkQihWeUb6kkEeS9PsJ7yT5cSpV0t69U7p7qTx+tc sJBeS6pZOMO85JE+SrxTSENln9XPDdXoipBNYonn4M6WzdEZXVmSQoaPr22g95QDxkCC +Nc34hiSj3Dms6CQbjzTYnXnUHYLO1XnRRD6QElWs4jJ2T/VI4XDW/PpYlkqDLCyCwXI E1CnOUR7p5tIl06Q3MQVwuXDeJExh9wRN6h0t332A7wm9VAf3F1yGnvkN0k4F27jO2Bp A0TJraKaUMzKkiTfOwQATi0vrM6nVPGaTP/8G/mMByKgvEIXEZDb2MwvFJEuSz89L1R2 c08g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685476298; x=1688068298; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ciWtK/NV8FJwvyzOz+YO15ef5XwL4+CYCLNYB+bwuds=; b=GAd9h6jL2STG3RpkUINhHteskAL7sgMRTWeOmSuJ+SRLEIID1YvikFLdQ9cjtcKlY/ SwVimuJf1GJ9lsuBPjHB0cF/PsbxITeA41fenBEF4vJxItuybo0NBy5eEblp1Lu6uegC wuo25QwGFnEGiPtwPRdZbT2jjX3f7NcWPPzH+KZZjApm13nWDjwOakc2AJMKa62Whpy5 3RrIgtk/k2Tr/pjgs10Zhl+yfFeMXOdfbcTJ/MwjuqgNr4BDfKh1MvN/L5U8QNxFpGSa 9qVkTZPPq72Pnm682/JLZ9xBo5G1W/ztRpRrRGImZKlPSNPbO89R+erDztuBjZZdT4RM pQhw== X-Gm-Message-State: AC+VfDy1k2o/jwU+ew1gxeonrnNgbP4hmaVh4vlHhPKI+MJ5tFjjWg8r q5Hei6L7+2fVtXXHNEgFPPufJg== X-Google-Smtp-Source: ACHHUZ7wLw7B5SQOBmSWu9Gdf34n6YO0nlX43uCpfTVKq0k35p5Eiji6ld9Pge94hGzHZLjsnZoiJw== X-Received: by 2002:a1c:7215:0:b0:3f4:239c:f19 with SMTP id n21-20020a1c7215000000b003f4239c0f19mr2605232wmc.36.1685476298560; Tue, 30 May 2023 12:51:38 -0700 (PDT) Received: from ph18.baylibre (laubervilliers-658-1-213-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.gmail.com with ESMTPSA id n11-20020adfe34b000000b003078cd719ffsm4271545wrj.95.2023.05.30.12.51.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 12:51:38 -0700 (PDT) From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: daniel.lezcano@linaro.org, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, rdunlap@infradead.org, ye.xingchen@zte.com.cn, p.zabel@pengutronix.de Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, wenst@chromium.org, james.lo@mediatek.com, rex-bc.chen@mediatek.com, nfraprado@collabora.com, abailon@baylibre.com, amergnat@baylibre.com, khilman@baylibre.com Subject: [PATCH v4 3/5] thermal/drivers/mediatek/lvts_thermal: Add mt8192 support Date: Tue, 30 May 2023 21:51:30 +0200 Message-ID: <20230530195132.2286163-4-bero@baylibre.com> X-Mailer: git-send-email 2.41.0.rc2 In-Reply-To: <20230530195132.2286163-1-bero@baylibre.com> References: <20230530195132.2286163-1-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Balsam CHIHI Add LVTS Driver support for MT8192. Co-developed-by : N=C3=ADcolas F. R. A. Prado Signed-off-by: N=C3=ADcolas F. R. A. Prado Signed-off-by: Balsam CHIHI Reviewed-by: N=C3=ADcolas F. R. A. Prado Signed-off-by: Bernhard Rosenkr=C3=A4nzer Reviewed-by: Matthias Brugger --- drivers/thermal/mediatek/lvts_thermal.c | 95 +++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/medi= atek/lvts_thermal.c index 5ea8a9d569ea6..d5e5214784ece 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -80,6 +80,7 @@ #define LVTS_MSR_FILTERED_MODE 1 =20 #define LVTS_HW_SHUTDOWN_MT8195 105000 +#define LVTS_HW_SHUTDOWN_MT8192 105000 =20 static int golden_temp =3D LVTS_GOLDEN_TEMP_DEFAULT; static int coeff_b =3D LVTS_COEFF_B; @@ -1280,6 +1281,88 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_da= ta_ctrl[] =3D { } }; =20 +static const struct lvts_ctrl_data mt8192_lvts_mcu_data_ctrl[] =3D { + { + .cal_offset =3D { 0x04, 0x08 }, + .lvts_sensor =3D { + { .dt_id =3D MT8192_MCU_BIG_CPU0 }, + { .dt_id =3D MT8192_MCU_BIG_CPU1 } + }, + .num_lvts_sensor =3D 2, + .offset =3D 0x0, + .hw_tshut_temp =3D LVTS_HW_SHUTDOWN_MT8192, + .mode =3D LVTS_MSR_FILTERED_MODE, + }, + { + .cal_offset =3D { 0x0c, 0x10 }, + .lvts_sensor =3D { + { .dt_id =3D MT8192_MCU_BIG_CPU2 }, + { .dt_id =3D MT8192_MCU_BIG_CPU3 } + }, + .num_lvts_sensor =3D 2, + .offset =3D 0x100, + .hw_tshut_temp =3D LVTS_HW_SHUTDOWN_MT8192, + .mode =3D LVTS_MSR_FILTERED_MODE, + }, + { + .cal_offset =3D { 0x14, 0x18, 0x1c, 0x20 }, + .lvts_sensor =3D { + { .dt_id =3D MT8192_MCU_LITTLE_CPU0 }, + { .dt_id =3D MT8192_MCU_LITTLE_CPU1 }, + { .dt_id =3D MT8192_MCU_LITTLE_CPU2 }, + { .dt_id =3D MT8192_MCU_LITTLE_CPU3 } + }, + .num_lvts_sensor =3D 4, + .offset =3D 0x200, + .hw_tshut_temp =3D LVTS_HW_SHUTDOWN_MT8192, + .mode =3D LVTS_MSR_FILTERED_MODE, + } +}; + +static const struct lvts_ctrl_data mt8192_lvts_ap_data_ctrl[] =3D { + { + .cal_offset =3D { 0x24, 0x28 }, + .lvts_sensor =3D { + { .dt_id =3D MT8192_AP_VPU0 }, + { .dt_id =3D MT8192_AP_VPU1 } + }, + .num_lvts_sensor =3D 2, + .offset =3D 0x0, + .hw_tshut_temp =3D LVTS_HW_SHUTDOWN_MT8192, + }, + { + .cal_offset =3D { 0x2c, 0x30 }, + .lvts_sensor =3D { + { .dt_id =3D MT8192_AP_GPU0 }, + { .dt_id =3D MT8192_AP_GPU1 } + }, + .num_lvts_sensor =3D 2, + .offset =3D 0x100, + .hw_tshut_temp =3D LVTS_HW_SHUTDOWN_MT8192, + }, + { + .cal_offset =3D { 0x34, 0x38 }, + .lvts_sensor =3D { + { .dt_id =3D MT8192_AP_INFRA }, + { .dt_id =3D MT8192_AP_CAM }, + }, + .num_lvts_sensor =3D 2, + .offset =3D 0x200, + .hw_tshut_temp =3D LVTS_HW_SHUTDOWN_MT8192, + }, + { + .cal_offset =3D { 0x3c, 0x40, 0x44 }, + .lvts_sensor =3D { + { .dt_id =3D MT8192_AP_MD0 }, + { .dt_id =3D MT8192_AP_MD1 }, + { .dt_id =3D MT8192_AP_MD2 } + }, + .num_lvts_sensor =3D 3, + .offset =3D 0x300, + .hw_tshut_temp =3D LVTS_HW_SHUTDOWN_MT8192, + } +}; + static const struct lvts_data mt8195_lvts_mcu_data =3D { .lvts_ctrl =3D mt8195_lvts_mcu_data_ctrl, .num_lvts_ctrl =3D ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl), @@ -1290,9 +1373,21 @@ static const struct lvts_data mt8195_lvts_ap_data = =3D { .num_lvts_ctrl =3D ARRAY_SIZE(mt8195_lvts_ap_data_ctrl), }; =20 +static const struct lvts_data mt8192_lvts_mcu_data =3D { + .lvts_ctrl =3D mt8192_lvts_mcu_data_ctrl, + .num_lvts_ctrl =3D ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl), +}; + +static const struct lvts_data mt8192_lvts_ap_data =3D { + .lvts_ctrl =3D mt8192_lvts_ap_data_ctrl, + .num_lvts_ctrl =3D ARRAY_SIZE(mt8192_lvts_ap_data_ctrl), +}; + static const struct of_device_id lvts_of_match[] =3D { { .compatible =3D "mediatek,mt8195-lvts-mcu", .data =3D &mt8195_lvts_mcu_= data }, { .compatible =3D "mediatek,mt8195-lvts-ap", .data =3D &mt8195_lvts_ap_da= ta }, + { .compatible =3D "mediatek,mt8192-lvts-mcu", .data =3D &mt8192_lvts_mcu_= data }, + { .compatible =3D "mediatek,mt8192-lvts-ap", .data =3D &mt8192_lvts_ap_da= ta }, {}, }; MODULE_DEVICE_TABLE(of, lvts_of_match); --=20 2.41.0.rc2