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Mon, 29 May 2023 11:14:25 +0200 (CEST) Received: from localhost (10.252.18.236) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 29 May 2023 11:14:24 +0200 From: Raphael Gallais-Pou To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Marek Vasut , Philippe Cornu , Yannick Fertre CC: , , , , , , Raphael Gallais-Pou Subject: [PATCH v4 3/4] ARM: dts: stm32: fix dsi warnings on stm32mp15 boards Date: Mon, 29 May 2023 11:13:58 +0200 Message-ID: <20230529091359.71987-4-raphael.gallais-pou@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230529091359.71987-1-raphael.gallais-pou@foss.st.com> References: <20230529091359.71987-1-raphael.gallais-pou@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.252.18.236] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-29_06,2023-05-25_03,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fixes DSI related warnings: * "#size-cells" and "#address-cells" wrongly used * Changed 'panel-dsi@0' to 'panel@0' according to dsi-controller.yaml Signed-off-by: Raphael Gallais-Pou Reviewed-by: Marek Vasut --- arch/arm/boot/dts/stm32mp157.dtsi | 7 ------- .../boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts | 3 +++ arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts | 3 +++ arch/arm/boot/dts/stm32mp157c-dk2.dts | 5 +++++ arch/arm/boot/dts/stm32mp157c-ev1.dts | 7 ++++++- 5 files changed, 17 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp157.dtsi b/arch/arm/boot/dts/stm32mp1= 57.dtsi index 54e73ccea446..5e733cd16ff9 100644 --- a/arch/arm/boot/dts/stm32mp157.dtsi +++ b/arch/arm/boot/dts/stm32mp157.dtsi @@ -24,14 +24,7 @@ dsi: dsi@5a000000 { clock-names =3D "pclk", "ref", "px_clk"; resets =3D <&rcc DSI_R>; reset-names =3D "apb"; - #address-cells =3D <1>; - #size-cells =3D <0>; status =3D "disabled"; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - }; }; }; }; diff --git a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts = b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts index 9a2a4bc7d079..47d03bd9ef0b 100644 --- a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts +++ b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts @@ -49,6 +49,9 @@ &dsi { phy-dsi-supply =3D <®18>; =20 ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { reg =3D <0>; dsi_in: endpoint { diff --git a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts b/ar= ch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts index 390ee8c05754..d2f68997a471 100644 --- a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts +++ b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts @@ -49,6 +49,9 @@ &dsi { phy-dsi-supply =3D <®18>; =20 ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { reg =3D <0>; dsi_in_ltdc: endpoint { diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts b/arch/arm/boot/dts/stm3= 2mp157c-dk2.dts index ab13e340f4ef..0067c6248cd1 100644 --- a/arch/arm/boot/dts/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/stm32mp157c-dk2.dts @@ -31,10 +31,15 @@ &cryp1 { }; =20 &dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; status =3D "okay"; phy-dsi-supply =3D <®18>; =20 ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { reg =3D <0>; dsi_in: endpoint { diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm3= 2mp157c-ev1.dts index ba8e9d9a42fa..67c6b9440878 100644 --- a/arch/arm/boot/dts/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts @@ -101,9 +101,14 @@ dcmi_0: endpoint { =20 &dsi { phy-dsi-supply =3D <®18>; + #address-cells =3D <1>; + #size-cells =3D <0>; status =3D "okay"; =20 ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { reg =3D <0>; dsi_in: endpoint { @@ -119,7 +124,7 @@ dsi_out: endpoint { }; }; =20 - panel-dsi@0 { + panel@0 { compatible =3D "raydium,rm68200"; reg =3D <0>; reset-gpios =3D <&gpiof 15 GPIO_ACTIVE_LOW>; --=20 2.25.1