From nobody Thu Dec 26 21:01:58 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5783C7EE2E for ; Fri, 26 May 2023 11:34:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243136AbjEZLek (ORCPT ); Fri, 26 May 2023 07:34:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243025AbjEZLef (ORCPT ); Fri, 26 May 2023 07:34:35 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D6D5E69; Fri, 26 May 2023 04:34:12 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34QBVlGo005518; Fri, 26 May 2023 11:34:04 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=9EasbwjkgY555aeepIggTFPhfOoBZLIPmztEaJof+C0=; b=SR0qRgTEeOO1An3EN7hDdOUqIdiaAiYlrWxOv035lcz8L3RHuHpa07zcgk60ZaKjFove oRTk0d9IS5zYGx40c9efBSTqkjjl7VPfCnRT5LCmpLvRg6QOLRd0YtY0i2mcvTL88Ooy jWhQRy5zDUQn2X5ERSWLFaqvnUZ1YMuAZwEsSzp0w84DeoFby+0F3WtZut0jyF2D1bV1 5gpLlFyyXlSXGVnIlXYJfYflKt+EYg9hqeUE3gff1BoWs1CEawOTdypM+sqPpgZOKEM0 7TcNNIqMg4bG+V+ZP5RI3u3Ku4kAYgaHCpN3+op2L8DoQHjh6OXgoI2x60N7esyUd06u /g== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qtp4wgrpr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:34:03 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34QBY2Pl031689 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:34:02 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 26 May 2023 04:33:56 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik Subject: [PATCH v6 6/8] arm64: dts: qcom: sc7280: Modify VA/RX/TX macro clock nodes for audioreach solution Date: Fri, 26 May 2023 17:02:56 +0530 Message-ID: <20230526113258.1467276-7-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: lRFZMM-7l2wBlXjsF_cbGCPJ2dF-04Gi X-Proofpoint-ORIG-GUID: lRFZMM-7l2wBlXjsF_cbGCPJ2dF-04Gi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 adultscore=0 clxscore=1015 suspectscore=0 malwarescore=0 bulkscore=0 impostorscore=0 mlxlogscore=996 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260098 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Srinivasa Rao Mandadapu Modify VA, RX and TX macro and lpass_tlmm clock properties and enable them. For audioreach solution mclk, npl and fsgen clocks are enabled through the q6prm clock driver. Delete the power domain properties from VA, RX and TX macro, for audioreach solution the macro, dcodec power domains enabled through the q6prm clock driver. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik --- .../sc7280-herobrine-audioreach-wcd9385.dtsi | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.d= tsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index 9daea1b25656..c02ca393378f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -196,3 +196,46 @@ q6prmcc: clock-controller { }; }; }; + +&lpass_rx_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE= _NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; + + status =3D "okay"; +}; + +&lpass_tlmm { + clocks =3D <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "core", "audio"; +}; + +&lpass_tx_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE= _NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; + + status =3D "okay"; +}; + +&lpass_va_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE= _NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "mclk", "macro", "dcodec"; + + status =3D "okay"; +}; --=20 2.25.1