From nobody Thu Apr 25 06:24:57 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4781C77B7A for ; Fri, 26 May 2023 07:35:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236845AbjEZHfr (ORCPT ); Fri, 26 May 2023 03:35:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236147AbjEZHfh (ORCPT ); Fri, 26 May 2023 03:35:37 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E366E53 for ; Fri, 26 May 2023 00:35:04 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q2RyL-0005lb-Dw; Fri, 26 May 2023 09:34:49 +0200 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1q2RyJ-002u6r-9q; Fri, 26 May 2023 09:34:47 +0200 Received: from ore by dude04.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1q2RyI-002ntl-6a; Fri, 26 May 2023 09:34:46 +0200 From: Oleksij Rempel To: "David S. Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com, "Russell King (Oracle)" Subject: [PATCH net-next v2 1/5] net: dsa: microchip: improving error handling for 8-bit register RMW operations Date: Fri, 26 May 2023 09:34:41 +0200 Message-Id: <20230526073445.668430-2-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230526073445.668430-1-o.rempel@pengutronix.de> References: <20230526073445.668430-1-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch refines the error handling mechanism for 8-bit register read-modify-write operations. In case of a failure, it now logs an error message detailing the problematic offset. This enhancement aids in debugging by providing more precise information when these operations encounter issues. Furthermore, the ksz_prmw8() function has been updated to return error values rather than void, enabling calling functions to appropriately respond to errors. Additionally, in case of an error that affects both the current and future accesses, the PHY driver will log the errors consistently, akin to the existing behavior in all ksz_read*/ksz_write* helpers. Signed-off-by: Oleksij Rempel --- drivers/net/dsa/microchip/ksz_common.h | 28 ++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 8abecaf6089e..b86f1e27a0c3 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -508,7 +508,14 @@ static inline int ksz_write64(struct ksz_device *dev, = u32 reg, u64 value) =20 static inline int ksz_rmw8(struct ksz_device *dev, int offset, u8 mask, u8= val) { - return regmap_update_bits(dev->regmap[0], offset, mask, val); + int ret; + + ret =3D regmap_update_bits(dev->regmap[0], offset, mask, val); + if (ret) + dev_err(dev->dev, "can't rmw 8bit reg 0x%x: %pe\n", offset, + ERR_PTR(ret)); + + return ret; } =20 static inline int ksz_pread8(struct ksz_device *dev, int port, int offset, @@ -549,12 +556,21 @@ static inline int ksz_pwrite32(struct ksz_device *dev= , int port, int offset, data); } =20 -static inline void ksz_prmw8(struct ksz_device *dev, int port, int offset, - u8 mask, u8 val) +static inline int ksz_prmw8(struct ksz_device *dev, int port, int offset, + u8 mask, u8 val) { - regmap_update_bits(dev->regmap[0], - dev->dev_ops->get_port_addr(port, offset), - mask, val); + int ret; + + ret =3D regmap_update_bits(dev->regmap[0], + dev->dev_ops->get_port_addr(port, offset), + mask, val); + if (ret) + dev_err(dev->dev, "can't rmw 8bit reg 0x%x: %pe\n", + dev->dev_ops->get_port_addr(port, offset), + ERR_PTR(ret)); + + return ret; + } =20 static inline void ksz_regmap_lock(void *__mtx) --=20 2.39.2 From nobody Thu Apr 25 06:24:57 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83D6DC77B7A for ; Fri, 26 May 2023 07:36:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242492AbjEZHgC (ORCPT ); Fri, 26 May 2023 03:36:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241569AbjEZHfk (ORCPT ); Fri, 26 May 2023 03:35:40 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D177710C8 for ; Fri, 26 May 2023 00:35:05 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q2RyL-0005la-Dw; Fri, 26 May 2023 09:34:49 +0200 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1q2RyJ-002u6m-7f; Fri, 26 May 2023 09:34:47 +0200 Received: from ore by dude04.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1q2RyI-002ntv-7I; Fri, 26 May 2023 09:34:46 +0200 From: Oleksij Rempel To: "David S. Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss Cc: Vladimir Oltean , Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com, "Russell King (Oracle)" Subject: [PATCH net-next v2 2/5] net: dsa: microchip: add an enum for regmap widths Date: Fri, 26 May 2023 09:34:42 +0200 Message-Id: <20230526073445.668430-3-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230526073445.668430-1-o.rempel@pengutronix.de> References: <20230526073445.668430-1-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Vladimir Oltean It is not immediately obvious that this driver allocates, via the KSZ_REGMAP_TABLE() macro, 3 regmaps for register access: dev->regmap[0] for 8-bit access, dev->regmap[1] for 16-bit and dev->regmap[2] for 32-bit access. In future changes that add support for reg_fields, each field will have to specify through which of the 3 regmaps it's going to go. Add an enum now, to denote one of the 3 register access widths, and make the code go through some wrapper functions for easier review and further modification. Signed-off-by: Vladimir Oltean Signed-off-by: Oleksij Rempel --- drivers/net/dsa/microchip/ksz8795.c | 8 ++-- drivers/net/dsa/microchip/ksz8863_smi.c | 2 +- drivers/net/dsa/microchip/ksz9477.c | 24 +++++------ drivers/net/dsa/microchip/ksz9477_i2c.c | 2 +- drivers/net/dsa/microchip/ksz_common.c | 6 +-- drivers/net/dsa/microchip/ksz_common.h | 54 ++++++++++++++++-------- drivers/net/dsa/microchip/ksz_spi.c | 2 +- drivers/net/dsa/microchip/lan937x_main.c | 8 ++-- 8 files changed, 63 insertions(+), 43 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchi= p/ksz8795.c index f56fca1b1a22..d2f7fa3fbd27 100644 --- a/drivers/net/dsa/microchip/ksz8795.c +++ b/drivers/net/dsa/microchip/ksz8795.c @@ -28,13 +28,13 @@ =20 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set) { - regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0); + regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0); } =20 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 = bits, bool set) { - regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset), + regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset), bits, set ? bits : 0); } =20 @@ -1425,14 +1425,14 @@ int ksz8_setup(struct dsa_switch *ds) ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true); =20 /* Enable aggressive back off algorithm in half duplex mode. */ - regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1, + regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_1, SW_AGGR_BACKOFF, SW_AGGR_BACKOFF); =20 /* * Make sure unicast VLAN boundary is set as default and * enable no excessive collision drop. */ - regmap_update_bits(dev->regmap[0], REG_SW_CTRL_2, + regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_2, UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP, UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP); =20 diff --git a/drivers/net/dsa/microchip/ksz8863_smi.c b/drivers/net/dsa/micr= ochip/ksz8863_smi.c index 3698112138b7..2af807db0b45 100644 --- a/drivers/net/dsa/microchip/ksz8863_smi.c +++ b/drivers/net/dsa/microchip/ksz8863_smi.c @@ -136,7 +136,7 @@ static int ksz8863_smi_probe(struct mdio_device *mdiode= v) if (!dev) return -ENOMEM; =20 - for (i =3D 0; i < ARRAY_SIZE(ksz8863_regmap_config); i++) { + for (i =3D 0; i < __KSZ_NUM_REGMAPS; i++) { rc =3D ksz8863_regmap_config[i]; rc.lock_arg =3D &dev->regmap_mutex; dev->regmap[i] =3D devm_regmap_init(&mdiodev->dev, diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchi= p/ksz9477.c index bf13d47c26cf..3019f54049fc 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -21,25 +21,25 @@ =20 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set) { - regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0); + regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0); } =20 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 = bits, bool set) { - regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset), + regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset), bits, set ? bits : 0); } =20 static void ksz9477_cfg32(struct ksz_device *dev, u32 addr, u32 bits, bool= set) { - regmap_update_bits(dev->regmap[2], addr, bits, set ? bits : 0); + regmap_update_bits(ksz_regmap_32(dev), addr, bits, set ? bits : 0); } =20 static void ksz9477_port_cfg32(struct ksz_device *dev, int port, int offse= t, u32 bits, bool set) { - regmap_update_bits(dev->regmap[2], PORT_CTRL_ADDR(port, offset), + regmap_update_bits(ksz_regmap_32(dev), PORT_CTRL_ADDR(port, offset), bits, set ? bits : 0); } =20 @@ -52,7 +52,7 @@ int ksz9477_change_mtu(struct ksz_device *dev, int port, = int mtu) =20 frame_size =3D mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; =20 - return regmap_update_bits(dev->regmap[1], REG_SW_MTU__2, + return regmap_update_bits(ksz_regmap_16(dev), REG_SW_MTU__2, REG_SW_MTU_MASK, frame_size); } =20 @@ -60,7 +60,7 @@ static int ksz9477_wait_vlan_ctrl_ready(struct ksz_device= *dev) { unsigned int val; =20 - return regmap_read_poll_timeout(dev->regmap[0], REG_SW_VLAN_CTRL, + return regmap_read_poll_timeout(ksz_regmap_8(dev), REG_SW_VLAN_CTRL, val, !(val & VLAN_START), 10, 1000); } =20 @@ -147,7 +147,7 @@ static int ksz9477_wait_alu_ready(struct ksz_device *de= v) { unsigned int val; =20 - return regmap_read_poll_timeout(dev->regmap[2], REG_SW_ALU_CTRL__4, + return regmap_read_poll_timeout(ksz_regmap_32(dev), REG_SW_ALU_CTRL__4, val, !(val & ALU_START), 10, 1000); } =20 @@ -155,7 +155,7 @@ static int ksz9477_wait_alu_sta_ready(struct ksz_device= *dev) { unsigned int val; =20 - return regmap_read_poll_timeout(dev->regmap[2], + return regmap_read_poll_timeout(ksz_regmap_32(dev), REG_SW_ALU_STAT_CTRL__4, val, !(val & ALU_STAT_START), 10, 1000); @@ -170,7 +170,7 @@ int ksz9477_reset_switch(struct ksz_device *dev) ksz_cfg(dev, REG_SW_OPERATION, SW_RESET, true); =20 /* turn off SPI DO Edge select */ - regmap_update_bits(dev->regmap[0], REG_SW_GLOBAL_SERIAL_CTRL_0, + regmap_update_bits(ksz_regmap_8(dev), REG_SW_GLOBAL_SERIAL_CTRL_0, SPI_AUTO_EDGE_DETECTION, 0); =20 /* default configuration */ @@ -213,7 +213,7 @@ void ksz9477_r_mib_cnt(struct ksz_device *dev, int port= , u16 addr, u64 *cnt) data |=3D (addr << MIB_COUNTER_INDEX_S); ksz_pwrite32(dev, port, REG_PORT_MIB_CTRL_STAT__4, data); =20 - ret =3D regmap_read_poll_timeout(dev->regmap[2], + ret =3D regmap_read_poll_timeout(ksz_regmap_32(dev), PORT_CTRL_ADDR(port, REG_PORT_MIB_CTRL_STAT__4), val, !(val & MIB_COUNTER_READ), 10, 1000); /* failed to read MIB. get out of loop */ @@ -346,7 +346,7 @@ void ksz9477_flush_dyn_mac_table(struct ksz_device *dev= , int port) const u16 *regs =3D dev->info->regs; u8 data; =20 - regmap_update_bits(dev->regmap[0], REG_SW_LUE_CTRL_2, + regmap_update_bits(ksz_regmap_8(dev), REG_SW_LUE_CTRL_2, SW_FLUSH_OPTION_M << SW_FLUSH_OPTION_S, SW_FLUSH_OPTION_DYN_MAC << SW_FLUSH_OPTION_S); =20 @@ -1165,7 +1165,7 @@ int ksz9477_setup(struct dsa_switch *ds) ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_JUMBO_PACKET, true); =20 /* Now we can configure default MTU value */ - ret =3D regmap_update_bits(dev->regmap[1], REG_SW_MTU__2, REG_SW_MTU_MASK, + ret =3D regmap_update_bits(ksz_regmap_16(dev), REG_SW_MTU__2, REG_SW_MTU_= MASK, VLAN_ETH_FRAME_LEN + ETH_FCS_LEN); if (ret) return ret; diff --git a/drivers/net/dsa/microchip/ksz9477_i2c.c b/drivers/net/dsa/micr= ochip/ksz9477_i2c.c index 97a317263a2f..497be833f707 100644 --- a/drivers/net/dsa/microchip/ksz9477_i2c.c +++ b/drivers/net/dsa/microchip/ksz9477_i2c.c @@ -24,7 +24,7 @@ static int ksz9477_i2c_probe(struct i2c_client *i2c) if (!dev) return -ENOMEM; =20 - for (i =3D 0; i < ARRAY_SIZE(ksz9477_regmap_config); i++) { + for (i =3D 0; i < __KSZ_NUM_REGMAPS; i++) { rc =3D ksz9477_regmap_config[i]; rc.lock_arg =3D &dev->regmap_mutex; dev->regmap[i] =3D devm_regmap_init_i2c(i2c, &rc); diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index a4428be5f483..53bb7d9712d0 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -2095,7 +2095,7 @@ static int ksz_setup(struct dsa_switch *ds) } =20 /* set broadcast storm protection 10% rate */ - regmap_update_bits(dev->regmap[1], regs[S_BROADCAST_CTRL], + regmap_update_bits(ksz_regmap_16(dev), regs[S_BROADCAST_CTRL], BROADCAST_STORM_RATE, (BROADCAST_STORM_VALUE * BROADCAST_STORM_PROT_RATE) / 100); @@ -2106,7 +2106,7 @@ static int ksz_setup(struct dsa_switch *ds) =20 ds->num_tx_queues =3D dev->info->num_tx_queues; =20 - regmap_update_bits(dev->regmap[0], regs[S_MULTICAST_CTRL], + regmap_update_bits(ksz_regmap_8(dev), regs[S_MULTICAST_CTRL], MULTICAST_STORM_DISABLE, MULTICAST_STORM_DISABLE); =20 ksz_init_mib_timer(dev); @@ -2156,7 +2156,7 @@ static int ksz_setup(struct dsa_switch *ds) } =20 /* start switch */ - regmap_update_bits(dev->regmap[0], regs[S_START_CTRL], + regmap_update_bits(ksz_regmap_8(dev), regs[S_START_CTRL], SW_START, SW_START); =20 return 0; diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index b86f1e27a0c3..f45f5fe11bde 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -22,6 +22,13 @@ struct ksz_device; struct ksz_port; =20 +enum ksz_regmap_width { + KSZ_REGMAP_8, + KSZ_REGMAP_16, + KSZ_REGMAP_32, + __KSZ_NUM_REGMAPS, +}; + struct vlan_table { u32 table[3]; }; @@ -137,7 +144,7 @@ struct ksz_device { const struct ksz_dev_ops *dev_ops; =20 struct device *dev; - struct regmap *regmap[3]; + struct regmap *regmap[__KSZ_NUM_REGMAPS]; =20 void *priv; int irq; @@ -377,11 +384,25 @@ phy_interface_t ksz_get_xmii(struct ksz_device *dev, = int port, bool gbit); extern const struct ksz_chip_data ksz_switch_chips[]; =20 /* Common register access functions */ +static inline struct regmap *ksz_regmap_8(struct ksz_device *dev) +{ + return dev->regmap[KSZ_REGMAP_8]; +} + +static inline struct regmap *ksz_regmap_16(struct ksz_device *dev) +{ + return dev->regmap[KSZ_REGMAP_16]; +} + +static inline struct regmap *ksz_regmap_32(struct ksz_device *dev) +{ + return dev->regmap[KSZ_REGMAP_32]; +} =20 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) { unsigned int value; - int ret =3D regmap_read(dev->regmap[0], reg, &value); + int ret =3D regmap_read(ksz_regmap_8(dev), reg, &value); =20 if (ret) dev_err(dev->dev, "can't read 8bit reg: 0x%x %pe\n", reg, @@ -394,7 +415,7 @@ static inline int ksz_read8(struct ksz_device *dev, u32= reg, u8 *val) static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) { unsigned int value; - int ret =3D regmap_read(dev->regmap[1], reg, &value); + int ret =3D regmap_read(ksz_regmap_16(dev), reg, &value); =20 if (ret) dev_err(dev->dev, "can't read 16bit reg: 0x%x %pe\n", reg, @@ -407,7 +428,7 @@ static inline int ksz_read16(struct ksz_device *dev, u3= 2 reg, u16 *val) static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) { unsigned int value; - int ret =3D regmap_read(dev->regmap[2], reg, &value); + int ret =3D regmap_read(ksz_regmap_32(dev), reg, &value); =20 if (ret) dev_err(dev->dev, "can't read 32bit reg: 0x%x %pe\n", reg, @@ -422,7 +443,7 @@ static inline int ksz_read64(struct ksz_device *dev, u3= 2 reg, u64 *val) u32 value[2]; int ret; =20 - ret =3D regmap_bulk_read(dev->regmap[2], reg, value, 2); + ret =3D regmap_bulk_read(ksz_regmap_32(dev), reg, value, 2); if (ret) dev_err(dev->dev, "can't read 64bit reg: 0x%x %pe\n", reg, ERR_PTR(ret)); @@ -436,7 +457,7 @@ static inline int ksz_write8(struct ksz_device *dev, u3= 2 reg, u8 value) { int ret; =20 - ret =3D regmap_write(dev->regmap[0], reg, value); + ret =3D regmap_write(ksz_regmap_8(dev), reg, value); if (ret) dev_err(dev->dev, "can't write 8bit reg: 0x%x %pe\n", reg, ERR_PTR(ret)); @@ -448,7 +469,7 @@ static inline int ksz_write16(struct ksz_device *dev, u= 32 reg, u16 value) { int ret; =20 - ret =3D regmap_write(dev->regmap[1], reg, value); + ret =3D regmap_write(ksz_regmap_16(dev), reg, value); if (ret) dev_err(dev->dev, "can't write 16bit reg: 0x%x %pe\n", reg, ERR_PTR(ret)); @@ -460,7 +481,7 @@ static inline int ksz_write32(struct ksz_device *dev, u= 32 reg, u32 value) { int ret; =20 - ret =3D regmap_write(dev->regmap[2], reg, value); + ret =3D regmap_write(ksz_regmap_32(dev), reg, value); if (ret) dev_err(dev->dev, "can't write 32bit reg: 0x%x %pe\n", reg, ERR_PTR(ret)); @@ -473,7 +494,7 @@ static inline int ksz_rmw16(struct ksz_device *dev, u32= reg, u16 mask, { int ret; =20 - ret =3D regmap_update_bits(dev->regmap[1], reg, mask, value); + ret =3D regmap_update_bits(ksz_regmap_16(dev), reg, mask, value); if (ret) dev_err(dev->dev, "can't rmw 16bit reg 0x%x: %pe\n", reg, ERR_PTR(ret)); @@ -486,7 +507,7 @@ static inline int ksz_rmw32(struct ksz_device *dev, u32= reg, u32 mask, { int ret; =20 - ret =3D regmap_update_bits(dev->regmap[2], reg, mask, value); + ret =3D regmap_update_bits(ksz_regmap_32(dev), reg, mask, value); if (ret) dev_err(dev->dev, "can't rmw 32bit reg 0x%x: %pe\n", reg, ERR_PTR(ret)); @@ -503,14 +524,14 @@ static inline int ksz_write64(struct ksz_device *dev,= u32 reg, u64 value) val[0] =3D swab32(value & 0xffffffffULL); val[1] =3D swab32(value >> 32ULL); =20 - return regmap_bulk_write(dev->regmap[2], reg, val, 2); + return regmap_bulk_write(ksz_regmap_32(dev), reg, val, 2); } =20 static inline int ksz_rmw8(struct ksz_device *dev, int offset, u8 mask, u8= val) { int ret; =20 - ret =3D regmap_update_bits(dev->regmap[0], offset, mask, val); + ret =3D regmap_update_bits(ksz_regmap_8(dev), offset, mask, val); if (ret) dev_err(dev->dev, "can't rmw 8bit reg 0x%x: %pe\n", offset, ERR_PTR(ret)); @@ -561,7 +582,7 @@ static inline int ksz_prmw8(struct ksz_device *dev, int= port, int offset, { int ret; =20 - ret =3D regmap_update_bits(dev->regmap[0], + ret =3D regmap_update_bits(ksz_regmap_8(dev), dev->dev_ops->get_port_addr(port, offset), mask, val); if (ret) @@ -570,7 +591,6 @@ static inline int ksz_prmw8(struct ksz_device *dev, int= port, int offset, ERR_PTR(ret)); =20 return ret; - } =20 static inline void ksz_regmap_lock(void *__mtx) @@ -725,9 +745,9 @@ static inline int is_lan937x(struct ksz_device *dev) =20 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ static const struct regmap_config ksz##_regmap_config[] =3D { \ - KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ - KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ - KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ + [KSZ_REGMAP_8] =3D KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regali= gn)), \ + [KSZ_REGMAP_16] =3D KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (rega= lign)), \ + [KSZ_REGMAP_32] =3D KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (rega= lign)), \ } =20 #endif diff --git a/drivers/net/dsa/microchip/ksz_spi.c b/drivers/net/dsa/microchi= p/ksz_spi.c index 96c52e8fb51b..279338451621 100644 --- a/drivers/net/dsa/microchip/ksz_spi.c +++ b/drivers/net/dsa/microchip/ksz_spi.c @@ -63,7 +63,7 @@ static int ksz_spi_probe(struct spi_device *spi) else regmap_config =3D ksz9477_regmap_config; =20 - for (i =3D 0; i < ARRAY_SIZE(ksz8795_regmap_config); i++) { + for (i =3D 0; i < __KSZ_NUM_REGMAPS; i++) { rc =3D regmap_config[i]; rc.lock_arg =3D &dev->regmap_mutex; rc.wr_table =3D chip->wr_table; diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/mic= rochip/lan937x_main.c index 399a3905e6ca..b479a628b1ae 100644 --- a/drivers/net/dsa/microchip/lan937x_main.c +++ b/drivers/net/dsa/microchip/lan937x_main.c @@ -20,13 +20,13 @@ =20 static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set) { - return regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0); + return regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0); } =20 static int lan937x_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits, bool set) { - return regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset), + return regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset), bits, set ? bits : 0); } =20 @@ -86,7 +86,7 @@ static int lan937x_internal_phy_write(struct ksz_device *= dev, int addr, int reg, if (ret < 0) return ret; =20 - ret =3D regmap_read_poll_timeout(dev->regmap[1], REG_VPHY_IND_CTRL__2, + ret =3D regmap_read_poll_timeout(ksz_regmap_16(dev), REG_VPHY_IND_CTRL__2, value, !(value & VPHY_IND_BUSY), 10, 1000); if (ret < 0) { @@ -116,7 +116,7 @@ static int lan937x_internal_phy_read(struct ksz_device = *dev, int addr, int reg, if (ret < 0) return ret; =20 - ret =3D regmap_read_poll_timeout(dev->regmap[1], REG_VPHY_IND_CTRL__2, + ret =3D regmap_read_poll_timeout(ksz_regmap_16(dev), REG_VPHY_IND_CTRL__2, value, !(value & VPHY_IND_BUSY), 10, 1000); if (ret < 0) { --=20 2.39.2 From nobody Thu Apr 25 06:24:57 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77ADBC77B7A for ; Fri, 26 May 2023 07:35:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236894AbjEZHfi (ORCPT ); Fri, 26 May 2023 03:35:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229790AbjEZHfg (ORCPT ); Fri, 26 May 2023 03:35:36 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBF2DE4F for ; Fri, 26 May 2023 00:35:00 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q2RyL-0005le-Dw; Fri, 26 May 2023 09:34:49 +0200 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1q2RyJ-002u70-HD; Fri, 26 May 2023 09:34:47 +0200 Received: from ore by dude04.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1q2RyI-002nu5-7z; Fri, 26 May 2023 09:34:46 +0200 From: Oleksij Rempel To: "David S. Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com, "Russell King (Oracle)" Subject: [PATCH net-next v2 3/5] net: dsa: microchip: remove ksz_port:on variable Date: Fri, 26 May 2023 09:34:43 +0200 Message-Id: <20230526073445.668430-4-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230526073445.668430-1-o.rempel@pengutronix.de> References: <20230526073445.668430-1-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The only place where this variable would be set to false is the ksz8_config_cpu_port() function. But it is done in a bogus way: for (i =3D 0; i < dev->phy_port_cnt; i++) { if (i =3D=3D dev->phy_port_cnt) <--- will be never executed. break; p->on =3D 1; So, we never have a situation where p->on =3D 0. In this case, we can just remove it. Signed-off-by: Oleksij Rempel Reviewed-by: Andrew Lunn Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/ksz8795.c | 20 +------------------- drivers/net/dsa/microchip/ksz_common.h | 1 - 2 files changed, 1 insertion(+), 20 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchi= p/ksz8795.c index d2f7fa3fbd27..84d502589f8e 100644 --- a/drivers/net/dsa/microchip/ksz8795.c +++ b/drivers/net/dsa/microchip/ksz8795.c @@ -941,7 +941,6 @@ void ksz8_flush_dyn_mac_table(struct ksz_device *dev, i= nt port) { u8 learn[DSA_MAX_PORTS]; int first, index, cnt; - struct ksz_port *p; const u16 *regs; =20 regs =3D dev->info->regs; @@ -955,9 +954,6 @@ void ksz8_flush_dyn_mac_table(struct ksz_device *dev, i= nt port) cnt =3D dev->info->port_cnt; } for (index =3D first; index < cnt; index++) { - p =3D &dev->ports[index]; - if (!p->on) - continue; ksz_pread8(dev, index, regs[P_STP_CTRL], &learn[index]); if (!(learn[index] & PORT_LEARN_DISABLE)) ksz_pwrite8(dev, index, regs[P_STP_CTRL], @@ -965,9 +961,6 @@ void ksz8_flush_dyn_mac_table(struct ksz_device *dev, i= nt port) } ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true); for (index =3D first; index < cnt; index++) { - p =3D &dev->ports[index]; - if (!p->on) - continue; if (!(learn[index] & PORT_LEARN_DISABLE)) ksz_pwrite8(dev, index, regs[P_STP_CTRL], learn[index]); } @@ -1338,25 +1331,14 @@ void ksz8_config_cpu_port(struct dsa_switch *ds) =20 ksz_cfg(dev, regs[S_TAIL_TAG_CTRL], masks[SW_TAIL_TAG_ENABLE], true); =20 - p =3D &dev->ports[dev->cpu_port]; - p->on =3D 1; - ksz8_port_setup(dev, dev->cpu_port, true); =20 for (i =3D 0; i < dev->phy_port_cnt; i++) { - p =3D &dev->ports[i]; - ksz_port_stp_state_set(ds, i, BR_STATE_DISABLED); - - /* Last port may be disabled. */ - if (i =3D=3D dev->phy_port_cnt) - break; - p->on =3D 1; } for (i =3D 0; i < dev->phy_port_cnt; i++) { p =3D &dev->ports[i]; - if (!p->on) - continue; + if (!ksz_is_ksz88x3(dev)) { ksz_pread8(dev, i, regs[P_REMOTE_STATUS], &remote); if (remote & KSZ8_PORT_FIBER_MODE) diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index f45f5fe11bde..5aa58aac3e07 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -108,7 +108,6 @@ struct ksz_port { int stp_state; struct phy_device phydev; =20 - u32 on:1; /* port is not disabled by hardware */ u32 fiber:1; /* port is fiber */ u32 force:1; u32 read:1; /* read MIB counters in background */ --=20 2.39.2 From nobody Thu Apr 25 06:24:57 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6861FC77B7A for ; Fri, 26 May 2023 07:35:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242431AbjEZHfw (ORCPT ); Fri, 26 May 2023 03:35:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240830AbjEZHfi (ORCPT ); Fri, 26 May 2023 03:35:38 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 725C0E51 for ; Fri, 26 May 2023 00:35:05 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q2RyL-0005lZ-Dw; Fri, 26 May 2023 09:34:49 +0200 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1q2RyJ-002u6l-7M; Fri, 26 May 2023 09:34:47 +0200 Received: from ore by dude04.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1q2RyI-002nuF-8Z; Fri, 26 May 2023 09:34:46 +0200 From: Oleksij Rempel To: "David S. Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com, "Russell King (Oracle)" Subject: [PATCH net-next v2 4/5] net: dsa: microchip: ksz8: Prepare ksz8863_smi for regmap register access validation Date: Fri, 26 May 2023 09:34:44 +0200 Message-Id: <20230526073445.668430-5-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230526073445.668430-1-o.rempel@pengutronix.de> References: <20230526073445.668430-1-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch prepares the ksz8863_smi part of ksz8 driver to utilize the regmap register access validation feature. Signed-off-by: Oleksij Rempel Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/ksz8863_smi.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz8863_smi.c b/drivers/net/dsa/micr= ochip/ksz8863_smi.c index 2af807db0b45..fd6e2e69a42a 100644 --- a/drivers/net/dsa/microchip/ksz8863_smi.c +++ b/drivers/net/dsa/microchip/ksz8863_smi.c @@ -104,6 +104,7 @@ static const struct regmap_config ksz8863_regmap_config= [] =3D { .cache_type =3D REGCACHE_NONE, .lock =3D ksz_regmap_lock, .unlock =3D ksz_regmap_unlock, + .max_register =3D U8_MAX, }, { .name =3D "#16", @@ -113,6 +114,7 @@ static const struct regmap_config ksz8863_regmap_config= [] =3D { .cache_type =3D REGCACHE_NONE, .lock =3D ksz_regmap_lock, .unlock =3D ksz_regmap_unlock, + .max_register =3D U8_MAX, }, { .name =3D "#32", @@ -122,11 +124,14 @@ static const struct regmap_config ksz8863_regmap_conf= ig[] =3D { .cache_type =3D REGCACHE_NONE, .lock =3D ksz_regmap_lock, .unlock =3D ksz_regmap_unlock, + .max_register =3D U8_MAX, } }; =20 static int ksz8863_smi_probe(struct mdio_device *mdiodev) { + struct device *ddev =3D &mdiodev->dev; + const struct ksz_chip_data *chip; struct regmap_config rc; struct ksz_device *dev; int ret; @@ -136,9 +141,15 @@ static int ksz8863_smi_probe(struct mdio_device *mdiod= ev) if (!dev) return -ENOMEM; =20 + chip =3D device_get_match_data(ddev); + if (!chip) + return -EINVAL; + for (i =3D 0; i < __KSZ_NUM_REGMAPS; i++) { rc =3D ksz8863_regmap_config[i]; rc.lock_arg =3D &dev->regmap_mutex; + rc.wr_table =3D chip->wr_table; + rc.rd_table =3D chip->rd_table; dev->regmap[i] =3D devm_regmap_init(&mdiodev->dev, ®map_smi[i], dev, &rc); --=20 2.39.2 From nobody Thu Apr 25 06:24:57 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74808C77B7A for ; Fri, 26 May 2023 07:35:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242275AbjEZHfo (ORCPT ); Fri, 26 May 2023 03:35:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233317AbjEZHfg (ORCPT ); Fri, 26 May 2023 03:35:36 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40CFC10C6 for ; Fri, 26 May 2023 00:35:01 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q2RyL-0005ld-Dw; Fri, 26 May 2023 09:34:49 +0200 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1q2RyJ-002u6x-D5; Fri, 26 May 2023 09:34:47 +0200 Received: from ore by dude04.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1q2RyI-002nuP-98; Fri, 26 May 2023 09:34:46 +0200 From: Oleksij Rempel To: "David S. Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Woojung Huh , Arun Ramadoss Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com, "Russell King (Oracle)" Subject: [PATCH net-next v2 5/5] net: dsa: microchip: Add register access control for KSZ8873 chip Date: Fri, 26 May 2023 09:34:45 +0200 Message-Id: <20230526073445.668430-6-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230526073445.668430-1-o.rempel@pengutronix.de> References: <20230526073445.668430-1-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This update introduces specific register access boundaries for the KSZ8873 and KSZ8863 chips within the DSA Microchip driver. The outlined ranges target global control registers, port registers, and advanced control registers. Signed-off-by: Oleksij Rempel --- drivers/net/dsa/microchip/ksz_common.c | 41 ++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index 53bb7d9712d0..768f649d2f40 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1075,6 +1075,45 @@ static const struct regmap_access_table ksz9896_regi= ster_set =3D { .n_yes_ranges =3D ARRAY_SIZE(ksz9896_valid_regs), }; =20 +static const struct regmap_range ksz8873_valid_regs[] =3D { + regmap_reg_range(0x00, 0x01), + /* global control register */ + regmap_reg_range(0x02, 0x0f), + + /* port registers */ + regmap_reg_range(0x10, 0x1d), + regmap_reg_range(0x1e, 0x1f), + regmap_reg_range(0x20, 0x2d), + regmap_reg_range(0x2e, 0x2f), + regmap_reg_range(0x30, 0x39), + regmap_reg_range(0x3f, 0x3f), + + /* advanced control registers */ + regmap_reg_range(0x60, 0x6f), + regmap_reg_range(0x70, 0x75), + regmap_reg_range(0x76, 0x78), + regmap_reg_range(0x79, 0x7a), + regmap_reg_range(0x7b, 0x83), + regmap_reg_range(0x8e, 0x99), + regmap_reg_range(0x9a, 0xa5), + regmap_reg_range(0xa6, 0xa6), + regmap_reg_range(0xa7, 0xaa), + regmap_reg_range(0xab, 0xae), + regmap_reg_range(0xaf, 0xba), + regmap_reg_range(0xbb, 0xbc), + regmap_reg_range(0xbd, 0xbd), + regmap_reg_range(0xc0, 0xc0), + regmap_reg_range(0xc2, 0xc2), + regmap_reg_range(0xc3, 0xc3), + regmap_reg_range(0xc4, 0xc4), + regmap_reg_range(0xc6, 0xc6), +}; + +static const struct regmap_access_table ksz8873_register_set =3D { + .yes_ranges =3D ksz8873_valid_regs, + .n_yes_ranges =3D ARRAY_SIZE(ksz8873_valid_regs), +}; + const struct ksz_chip_data ksz_switch_chips[] =3D { [KSZ8563] =3D { .chip_id =3D KSZ8563_CHIP_ID, @@ -1214,6 +1253,8 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_mii =3D {false, false, true}, .supports_rmii =3D {false, false, true}, .internal_phy =3D {true, true, false}, + .wr_table =3D &ksz8873_register_set, + .rd_table =3D &ksz8873_register_set, }, =20 [KSZ9477] =3D { --=20 2.39.2