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([149.91.1.15]) by smtp.gmail.com with ESMTPSA id y26-20020a17090614da00b009659fed3612sm2999950ejc.24.2023.05.22.05.16.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 May 2023 05:16:09 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , Bartel Eerdekens , erkin.bozoglu@xeront.com, mithat.guner@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net-next 08/30] net: dsa: mt7530: change p{5,6}_interface to p{5,6}_configured Date: Mon, 22 May 2023 15:15:10 +0300 Message-Id: <20230522121532.86610-9-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230522121532.86610-1-arinc.unal@arinc9.com> References: <20230522121532.86610-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL The idea of p5_interface and p6_interface pointers is to prevent mt753x_mac_config() from running twice for MT7531, as it's already run with mt753x_cpu_port_enable() from mt7531_setup_common(), if the port is used as a CPU port. Change p5_interface and p6_interface to p5_configured and p6_configured. Make them boolean. Do not set them for any other reason. The priv->p5_intf_sel check is useless as in this code path, it will always be P5_INTF_SEL_GMAC5. There was also no need to set priv->p5_interface and priv->p6_interface to PHY_INTERFACE_MODE_NA on mt7530_setup() and mt7531_setup() as they would already be set to that when "priv" is allocated. The pointers were of the phy_interface_t enumeration type, and the first element of the enum is PHY_INTERFACE_MODE_NA. There was nothing in between that would change this beforehand. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 19 ++++--------------- drivers/net/dsa/mt7530.h | 10 ++++++---- 2 files changed, 10 insertions(+), 19 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 710c6622d648..d837aa20968c 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2234,8 +2234,6 @@ mt7530_setup(struct dsa_switch *ds) val |=3D MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); =20 - priv->p6_interface =3D PHY_INTERFACE_MODE_NA; - /* Enable and reset MIB counters */ mt7530_mib_reset(ds); =20 @@ -2455,10 +2453,6 @@ mt7531_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, MT7531_GPIO0_INTERRUPT); =20 - /* Let phylink decide the interface later. */ - priv->p5_interface =3D PHY_INTERFACE_MODE_NA; - priv->p6_interface =3D PHY_INTERFACE_MODE_NA; - /* Enable PHY core PLL, since phy_device has not yet been created * provided for phy_[read,write]_mmd_indirect is called, we provide * our own mt7531_ind_mmd_phy_[read,write] to complete this @@ -2728,25 +2722,20 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, in= t port, unsigned int mode, goto unsupported; break; case 5: /* Port 5, can be used as a CPU port. */ - if (priv->p5_interface =3D=3D state->interface) + if (priv->p5_configured) break; =20 if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; - - if (priv->p5_intf_sel !=3D P5_DISABLED) - priv->p5_interface =3D state->interface; break; case 6: /* Port 6, can be used as a CPU port. */ - if (priv->p6_interface =3D=3D state->interface) + if (priv->p6_configured) break; =20 mt753x_pad_setup(ds, state); =20 if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; - - priv->p6_interface =3D state->interface; break; default: unsupported: @@ -2854,12 +2843,12 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int p= ort) else interface =3D PHY_INTERFACE_MODE_2500BASEX; =20 - priv->p5_interface =3D interface; + priv->p5_configured =3D true; break; case 6: interface =3D PHY_INTERFACE_MODE_2500BASEX; =20 - priv->p6_interface =3D interface; + priv->p6_configured =3D true; break; default: return -EINVAL; diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 2602c95fd3a5..06037be5882c 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -745,8 +745,10 @@ struct mt753x_info { * @ports: Holding the state among ports * @reg_mutex: The lock for protecting among process accessing * registers - * @p6_interface: Holding the current port 6 interface - * @p5_interface: Holding the current port 5 interface + * @p6_configured: Flag for distinguishing if port 6 of the MT7531 switch + * is already configured + * @p5_configured: Flag for distinguishing if port 5 of the MT7531 switch + * is already configured * @p5_intf_sel: Holding the current port 5 interface select * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch * has got SGMII @@ -767,8 +769,8 @@ struct mt7530_priv { const struct mt753x_info *info; unsigned int id; bool mcm; - phy_interface_t p6_interface; - phy_interface_t p5_interface; + bool p6_configured; + bool p5_configured; enum p5_interface_select p5_intf_sel; bool p5_sgmii; u8 mirror_rx; --=20 2.39.2