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([149.91.1.15]) by smtp.gmail.com with ESMTPSA id y26-20020a17090614da00b009659fed3612sm2999950ejc.24.2023.05.22.05.17.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 May 2023 05:17:06 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , Bartel Eerdekens , erkin.bozoglu@xeront.com, mithat.guner@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net-next 27/30] net: dsa: mt7530: introduce BPDU trapping for MT7530 switch Date: Mon, 22 May 2023 15:15:29 +0300 Message-Id: <20230522121532.86610-28-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230522121532.86610-1-arinc.unal@arinc9.com> References: <20230522121532.86610-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL The MT753X switches are capable of trapping certain frames. Introduce trapping BPDUs to the CPU port for the MT7530 switch. BPDUs will be trapped to the numerically smallest CPU port which is affine to the DSA conduit interface that is set up. The BPDUs won't necessarily be trapped to the CPU port the user port, which these BPDUs are received from, is affine to. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index cd16911fcb01..2fb4b0bc6335 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2223,6 +2223,10 @@ mt7530_setup(struct dsa_switch *ds) val |=3D MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); =20 + /* Trap BPDUs to the CPU port */ + mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, + MT753X_BPDU_CPU_ONLY); + /* Enable and reset MIB counters */ mt7530_mib_reset(ds); =20 --=20 2.39.2