From nobody Wed Sep 10 02:37:28 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47AC8C77B7A for ; Sat, 20 May 2023 05:09:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230303AbjETFJY (ORCPT ); Sat, 20 May 2023 01:09:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230221AbjETFJT (ORCPT ); Sat, 20 May 2023 01:09:19 -0400 Received: from out-38.mta0.migadu.com (out-38.mta0.migadu.com [91.218.175.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7B1CE4D for ; Fri, 19 May 2023 22:09:15 -0700 (PDT) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1684559354; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2UCSaStHtKJvFxU++oVCdwsojWvCJLZszSAwd7sAuxY=; b=JeSfgT8npfSHX1w47IDI0Hx5Ay1UVWJ7ePKHTcJQGpgqV1QTm/EuD1wqaqn3zKj9VNxBUz E+D6mqW6JD+mo/fkWZaytRzJcTAgYJ5FYjL0BIVv+FzCnr0Ra4CixReEzXlQzjjaEKYgiE 6nG7eQ46DdMQbovtQdzsMjA+1GRRetk= From: Cai Huoqing To: vkoul@kernel.org Cc: Cai Huoqing , Serge Semin , Manivannan Sadhasivam , Manivannan Sadhasivam , Gustavo Pimentel , Jingoo Han , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v11 2/4] dmaengine: dw-edma: Create a new dw_edma_core_ops structure to abstract controller operation Date: Sat, 20 May 2023 13:08:50 +0800 Message-Id: <20230520050854.73160-3-cai.huoqing@linux.dev> In-Reply-To: <20230520050854.73160-1-cai.huoqing@linux.dev> References: <20230520050854.73160-1-cai.huoqing@linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The structure dw_edma_core_ops has a set of the pointers abstracting out the DW eDMA vX and DW HDMA Native controllers. And use dw_edma_v0_core_register to set up operation. Signed-off-by: Cai Huoqing Reviewed-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Tested-by: Serge Semin --- v10->v11: Using single name in commit log. v10 link: https://lore.kernel.org/lkml/20230517030115.21093-3-cai.huoqing@linux.dev/ drivers/dma/dw-edma/dw-edma-core.c | 82 ++++++++------------------ drivers/dma/dw-edma/dw-edma-core.h | 58 ++++++++++++++++++ drivers/dma/dw-edma/dw-edma-v0-core.c | 85 +++++++++++++++++++++++---- drivers/dma/dw-edma/dw-edma-v0-core.h | 14 +---- 4 files changed, 157 insertions(+), 82 deletions(-) diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-ed= ma-core.c index 7d2b73ef0872..f17207c66c19 100644 --- a/drivers/dma/dw-edma/dw-edma-core.c +++ b/drivers/dma/dw-edma/dw-edma-core.c @@ -183,6 +183,7 @@ static void vchan_free_desc(struct virt_dma_desc *vdesc) =20 static int dw_edma_start_transfer(struct dw_edma_chan *chan) { + struct dw_edma *dw =3D chan->dw; struct dw_edma_chunk *child; struct dw_edma_desc *desc; struct virt_dma_desc *vd; @@ -200,7 +201,7 @@ static int dw_edma_start_transfer(struct dw_edma_chan *= chan) if (!child) return 0; =20 - dw_edma_v0_core_start(child, !desc->xfer_sz); + dw_edma_core_start(dw, child, !desc->xfer_sz); desc->xfer_sz +=3D child->ll_region.sz; dw_edma_free_burst(child); list_del(&child->list); @@ -287,7 +288,7 @@ static int dw_edma_device_terminate_all(struct dma_chan= *dchan) chan->configured =3D false; } else if (chan->status =3D=3D EDMA_ST_IDLE) { chan->configured =3D false; - } else if (dw_edma_v0_core_ch_status(chan) =3D=3D DMA_COMPLETE) { + } else if (dw_edma_core_ch_status(chan) =3D=3D DMA_COMPLETE) { /* * The channel is in a false BUSY state, probably didn't * receive or lost an interrupt @@ -599,8 +600,6 @@ static void dw_edma_done_interrupt(struct dw_edma_chan = *chan) struct virt_dma_desc *vd; unsigned long flags; =20 - dw_edma_v0_core_clear_done_int(chan); - spin_lock_irqsave(&chan->vc.lock, flags); vd =3D vchan_next_desc(&chan->vc); if (vd) { @@ -641,8 +640,6 @@ static void dw_edma_abort_interrupt(struct dw_edma_chan= *chan) struct virt_dma_desc *vd; unsigned long flags; =20 - dw_edma_v0_core_clear_abort_int(chan); - spin_lock_irqsave(&chan->vc.lock, flags); vd =3D vchan_next_desc(&chan->vc); if (vd) { @@ -654,63 +651,32 @@ static void dw_edma_abort_interrupt(struct dw_edma_ch= an *chan) chan->status =3D EDMA_ST_IDLE; } =20 -static irqreturn_t dw_edma_interrupt(int irq, void *data, bool write) +static inline irqreturn_t dw_edma_interrupt_write(int irq, void *data) { struct dw_edma_irq *dw_irq =3D data; - struct dw_edma *dw =3D dw_irq->dw; - unsigned long total, pos, val; - unsigned long off; - u32 mask; - - if (write) { - total =3D dw->wr_ch_cnt; - off =3D 0; - mask =3D dw_irq->wr_mask; - } else { - total =3D dw->rd_ch_cnt; - off =3D dw->wr_ch_cnt; - mask =3D dw_irq->rd_mask; - } - - val =3D dw_edma_v0_core_status_done_int(dw, write ? - EDMA_DIR_WRITE : - EDMA_DIR_READ); - val &=3D mask; - for_each_set_bit(pos, &val, total) { - struct dw_edma_chan *chan =3D &dw->chan[pos + off]; - - dw_edma_done_interrupt(chan); - } - - val =3D dw_edma_v0_core_status_abort_int(dw, write ? - EDMA_DIR_WRITE : - EDMA_DIR_READ); - val &=3D mask; - for_each_set_bit(pos, &val, total) { - struct dw_edma_chan *chan =3D &dw->chan[pos + off]; - - dw_edma_abort_interrupt(chan); - } - - return IRQ_HANDLED; -} =20 -static inline irqreturn_t dw_edma_interrupt_write(int irq, void *data) -{ - return dw_edma_interrupt(irq, data, true); + return dw_edma_core_handle_int(dw_irq, EDMA_DIR_WRITE, + dw_edma_done_interrupt, + dw_edma_abort_interrupt); } =20 static inline irqreturn_t dw_edma_interrupt_read(int irq, void *data) { - return dw_edma_interrupt(irq, data, false); + struct dw_edma_irq *dw_irq =3D data; + + return dw_edma_core_handle_int(dw_irq, EDMA_DIR_READ, + dw_edma_done_interrupt, + dw_edma_abort_interrupt); } =20 static irqreturn_t dw_edma_interrupt_common(int irq, void *data) { - dw_edma_interrupt(irq, data, true); - dw_edma_interrupt(irq, data, false); + irqreturn_t ret =3D IRQ_NONE; + + ret |=3D dw_edma_interrupt_write(irq, data); + ret |=3D dw_edma_interrupt_read(irq, data); =20 - return IRQ_HANDLED; + return ret; } =20 static int dw_edma_alloc_chan_resources(struct dma_chan *dchan) @@ -811,7 +777,7 @@ static int dw_edma_channel_setup(struct dw_edma *dw, u3= 2 wr_alloc, u32 rd_alloc) =20 vchan_init(&chan->vc, dma); =20 - dw_edma_v0_core_device_config(chan); + dw_edma_core_ch_config(chan); } =20 /* Set DMA channel capabilities */ @@ -956,14 +922,16 @@ int dw_edma_probe(struct dw_edma_chip *chip) =20 dw->chip =3D chip; =20 + dw_edma_v0_core_register(dw); + raw_spin_lock_init(&dw->lock); =20 dw->wr_ch_cnt =3D min_t(u16, chip->ll_wr_cnt, - dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE)); + dw_edma_core_ch_count(dw, EDMA_DIR_WRITE)); dw->wr_ch_cnt =3D min_t(u16, dw->wr_ch_cnt, EDMA_MAX_WR_CH); =20 dw->rd_ch_cnt =3D min_t(u16, chip->ll_rd_cnt, - dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ)); + dw_edma_core_ch_count(dw, EDMA_DIR_READ)); dw->rd_ch_cnt =3D min_t(u16, dw->rd_ch_cnt, EDMA_MAX_RD_CH); =20 if (!dw->wr_ch_cnt && !dw->rd_ch_cnt) @@ -982,7 +950,7 @@ int dw_edma_probe(struct dw_edma_chip *chip) dev_name(chip->dev)); =20 /* Disable eDMA, only to establish the ideal initial conditions */ - dw_edma_v0_core_off(dw); + dw_edma_core_off(dw); =20 /* Request IRQs */ err =3D dw_edma_irq_request(dw, &wr_alloc, &rd_alloc); @@ -995,7 +963,7 @@ int dw_edma_probe(struct dw_edma_chip *chip) goto err_irq_free; =20 /* Turn debugfs on */ - dw_edma_v0_core_debugfs_on(dw); + dw_edma_core_debugfs_on(dw); =20 chip->dw =3D dw; =20 @@ -1021,7 +989,7 @@ int dw_edma_remove(struct dw_edma_chip *chip) return -ENODEV; =20 /* Disable eDMA */ - dw_edma_v0_core_off(dw); + dw_edma_core_off(dw); =20 /* Free irqs */ for (i =3D (dw->nr_irqs - 1); i >=3D 0; i--) diff --git a/drivers/dma/dw-edma/dw-edma-core.h b/drivers/dma/dw-edma/dw-ed= ma-core.h index 0ab2b6dba880..71894b9e0b15 100644 --- a/drivers/dma/dw-edma/dw-edma-core.h +++ b/drivers/dma/dw-edma/dw-edma-core.h @@ -111,6 +111,21 @@ struct dw_edma { raw_spinlock_t lock; /* Only for legacy */ =20 struct dw_edma_chip *chip; + + const struct dw_edma_core_ops *core; +}; + +typedef void (*dw_edma_handler_t)(struct dw_edma_chan *); + +struct dw_edma_core_ops { + void (*off)(struct dw_edma *dw); + u16 (*ch_count)(struct dw_edma *dw, enum dw_edma_dir dir); + enum dma_status (*ch_status)(struct dw_edma_chan *chan); + irqreturn_t (*handle_int)(struct dw_edma_irq *dw_irq, enum dw_edma_dir di= r, + dw_edma_handler_t done, dw_edma_handler_t abort); + void (*start)(struct dw_edma_chunk *chunk, bool first); + void (*ch_config)(struct dw_edma_chan *chan); + void (*debugfs_on)(struct dw_edma *dw); }; =20 struct dw_edma_sg { @@ -148,4 +163,47 @@ struct dw_edma_chan *dchan2dw_edma_chan(struct dma_cha= n *dchan) return vc2dw_edma_chan(to_virt_chan(dchan)); } =20 +static inline +void dw_edma_core_off(struct dw_edma *dw) +{ + dw->core->off(dw); +} + +static inline +u16 dw_edma_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) +{ + return dw->core->ch_count(dw, dir); +} + +static inline +enum dma_status dw_edma_core_ch_status(struct dw_edma_chan *chan) +{ + return chan->dw->core->ch_status(chan); +} + +static inline irqreturn_t +dw_edma_core_handle_int(struct dw_edma_irq *dw_irq, enum dw_edma_dir dir, + dw_edma_handler_t done, dw_edma_handler_t abort) +{ + return dw_irq->dw->core->handle_int(dw_irq, dir, done, abort); +} + +static inline +void dw_edma_core_start(struct dw_edma *dw, struct dw_edma_chunk *chunk, b= ool first) +{ + dw->core->start(chunk, first); +} + +static inline +void dw_edma_core_ch_config(struct dw_edma_chan *chan) +{ + chan->dw->core->ch_config(chan); +} + +static inline +void dw_edma_core_debugfs_on(struct dw_edma *dw) +{ + dw->core->debugfs_on(dw); +} + #endif /* _DW_EDMA_CORE_H */ diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw= -edma-v0-core.c index 32f834a3848a..b38786f0ad79 100644 --- a/drivers/dma/dw-edma/dw-edma-v0-core.c +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c @@ -7,7 +7,7 @@ */ =20 #include - +#include #include =20 #include "dw-edma-core.h" @@ -160,7 +160,7 @@ static inline u32 readl_ch(struct dw_edma *dw, enum dw_= edma_dir dir, u16 ch, readl_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name)) =20 /* eDMA management callbacks */ -void dw_edma_v0_core_off(struct dw_edma *dw) +static void dw_edma_v0_core_off(struct dw_edma *dw) { SET_BOTH_32(dw, int_mask, EDMA_V0_DONE_INT_MASK | EDMA_V0_ABORT_INT_MASK); @@ -169,7 +169,7 @@ void dw_edma_v0_core_off(struct dw_edma *dw) SET_BOTH_32(dw, engine_en, 0); } =20 -u16 dw_edma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) +static u16 dw_edma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir d= ir) { u32 num_ch; =20 @@ -186,7 +186,7 @@ u16 dw_edma_v0_core_ch_count(struct dw_edma *dw, enum d= w_edma_dir dir) return (u16)num_ch; } =20 -enum dma_status dw_edma_v0_core_ch_status(struct dw_edma_chan *chan) +static enum dma_status dw_edma_v0_core_ch_status(struct dw_edma_chan *chan) { struct dw_edma *dw =3D chan->dw; u32 tmp; @@ -202,7 +202,7 @@ enum dma_status dw_edma_v0_core_ch_status(struct dw_edm= a_chan *chan) return DMA_ERROR; } =20 -void dw_edma_v0_core_clear_done_int(struct dw_edma_chan *chan) +static void dw_edma_v0_core_clear_done_int(struct dw_edma_chan *chan) { struct dw_edma *dw =3D chan->dw; =20 @@ -210,7 +210,7 @@ void dw_edma_v0_core_clear_done_int(struct dw_edma_chan= *chan) FIELD_PREP(EDMA_V0_DONE_INT_MASK, BIT(chan->id))); } =20 -void dw_edma_v0_core_clear_abort_int(struct dw_edma_chan *chan) +static void dw_edma_v0_core_clear_abort_int(struct dw_edma_chan *chan) { struct dw_edma *dw =3D chan->dw; =20 @@ -218,18 +218,64 @@ void dw_edma_v0_core_clear_abort_int(struct dw_edma_c= han *chan) FIELD_PREP(EDMA_V0_ABORT_INT_MASK, BIT(chan->id))); } =20 -u32 dw_edma_v0_core_status_done_int(struct dw_edma *dw, enum dw_edma_dir d= ir) +static u32 dw_edma_v0_core_status_done_int(struct dw_edma *dw, enum dw_edm= a_dir dir) { return FIELD_GET(EDMA_V0_DONE_INT_MASK, GET_RW_32(dw, dir, int_status)); } =20 -u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir = dir) +static u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_ed= ma_dir dir) { return FIELD_GET(EDMA_V0_ABORT_INT_MASK, GET_RW_32(dw, dir, int_status)); } =20 +static irqreturn_t +dw_edma_v0_core_handle_int(struct dw_edma_irq *dw_irq, enum dw_edma_dir di= r, + dw_edma_handler_t done, dw_edma_handler_t abort) +{ + struct dw_edma *dw =3D dw_irq->dw; + unsigned long total, pos, val; + irqreturn_t ret =3D IRQ_NONE; + struct dw_edma_chan *chan; + unsigned long off; + u32 mask; + + if (dir =3D=3D EDMA_DIR_WRITE) { + total =3D dw->wr_ch_cnt; + off =3D 0; + mask =3D dw_irq->wr_mask; + } else { + total =3D dw->rd_ch_cnt; + off =3D dw->wr_ch_cnt; + mask =3D dw_irq->rd_mask; + } + + val =3D dw_edma_v0_core_status_done_int(dw, dir); + val &=3D mask; + for_each_set_bit(pos, &val, total) { + chan =3D &dw->chan[pos + off]; + + dw_edma_v0_core_clear_done_int(chan); + done(chan); + + ret =3D IRQ_HANDLED; + } + + val =3D dw_edma_v0_core_status_abort_int(dw, dir); + val &=3D mask; + for_each_set_bit(pos, &val, total) { + chan =3D &dw->chan[pos + off]; + + dw_edma_v0_core_clear_abort_int(chan); + abort(chan); + + ret =3D IRQ_HANDLED; + } + + return ret; +} + static void dw_edma_v0_write_ll_data(struct dw_edma_chunk *chunk, int i, u32 control, u32 size, u64 sar, u64 dar) { @@ -300,7 +346,7 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_= chunk *chunk) dw_edma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); } =20 -void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) +static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) { struct dw_edma_chan *chan =3D chunk->chan; struct dw_edma *dw =3D chan->dw; @@ -371,7 +417,7 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk,= bool first) FIELD_PREP(EDMA_V0_DOORBELL_CH_MASK, chan->id)); } =20 -int dw_edma_v0_core_device_config(struct dw_edma_chan *chan) +static void dw_edma_v0_core_ch_config(struct dw_edma_chan *chan) { struct dw_edma *dw =3D chan->dw; u32 tmp =3D 0; @@ -438,12 +484,25 @@ int dw_edma_v0_core_device_config(struct dw_edma_chan= *chan) SET_RW_32(dw, chan->dir, ch67_imwr_data, tmp); break; } - - return 0; } =20 /* eDMA debugfs callbacks */ -void dw_edma_v0_core_debugfs_on(struct dw_edma *dw) +static void dw_edma_v0_core_debugfs_on(struct dw_edma *dw) { dw_edma_v0_debugfs_on(dw); } + +static const struct dw_edma_core_ops dw_edma_v0_core =3D { + .off =3D dw_edma_v0_core_off, + .ch_count =3D dw_edma_v0_core_ch_count, + .ch_status =3D dw_edma_v0_core_ch_status, + .handle_int =3D dw_edma_v0_core_handle_int, + .start =3D dw_edma_v0_core_start, + .ch_config =3D dw_edma_v0_core_ch_config, + .debugfs_on =3D dw_edma_v0_core_debugfs_on, +}; + +void dw_edma_v0_core_register(struct dw_edma *dw) +{ + dw->core =3D &dw_edma_v0_core; +} diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.h b/drivers/dma/dw-edma/dw= -edma-v0-core.h index ab96a1f48080..04a882222f99 100644 --- a/drivers/dma/dw-edma/dw-edma-v0-core.h +++ b/drivers/dma/dw-edma/dw-edma-v0-core.h @@ -11,17 +11,7 @@ =20 #include =20 -/* eDMA management callbacks */ -void dw_edma_v0_core_off(struct dw_edma *chan); -u16 dw_edma_v0_core_ch_count(struct dw_edma *chan, enum dw_edma_dir dir); -enum dma_status dw_edma_v0_core_ch_status(struct dw_edma_chan *chan); -void dw_edma_v0_core_clear_done_int(struct dw_edma_chan *chan); -void dw_edma_v0_core_clear_abort_int(struct dw_edma_chan *chan); -u32 dw_edma_v0_core_status_done_int(struct dw_edma *chan, enum dw_edma_dir= dir); -u32 dw_edma_v0_core_status_abort_int(struct dw_edma *chan, enum dw_edma_di= r dir); -void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first); -int dw_edma_v0_core_device_config(struct dw_edma_chan *chan); -/* eDMA debug fs callbacks */ -void dw_edma_v0_core_debugfs_on(struct dw_edma *dw); +/* eDMA core register */ +void dw_edma_v0_core_register(struct dw_edma *dw); =20 #endif /* _DW_EDMA_V0_CORE_H */ --=20 2.34.1