From nobody Mon Feb 9 11:23:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E314EC7EE2D for ; Fri, 19 May 2023 14:42:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232181AbjESOmh (ORCPT ); Fri, 19 May 2023 10:42:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232164AbjESOm3 (ORCPT ); Fri, 19 May 2023 10:42:29 -0400 Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7523C12B for ; Fri, 19 May 2023 07:42:26 -0700 (PDT) Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-64d15660784so1515519b3a.0 for ; Fri, 19 May 2023 07:42:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684507346; x=1687099346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0VHdXC3BlPGtz1yDleZn4OSOvKYhYQjZWZyy2WyNcmY=; b=zDhnY1tZ6F9eXaHyhGYxvDZLfChRGmXrhdXtVfYjbG0UfBFL3DlRbFP9V/HoilVJg9 sxYH8U/+3hErmnXXskurIeJIQjnxgsy9uM/YwLM6qjvM8FCU0RLfrhBHq43ushk7PU7F PxLrhl/nq4mzv5Vso6V/C1Hbn/UjJi+BsYbrDKit8jvuC79lSy3gd1PMhc2+dJSZ5IqJ 4oicYzfmGLLcswR7kLmmRBjl7mF0c57KKu7gtdip0VtOgUNe9uGqvU6Lj7n8WmNsIYQh 7DK4zTiXafzMIZ8usDA93JlXL0LckIoBG9rzWU/N6rLVtpl7B84lzjKhjmlB1vsjzQEP 6W4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684507346; x=1687099346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0VHdXC3BlPGtz1yDleZn4OSOvKYhYQjZWZyy2WyNcmY=; b=VPxVU8AFPSxIu0OZ6zbh80ak1yO8c1GTLExPE1XIZHJ8EQVmXnbjJpOpOhRCxupj5I ijxhnUACDzEWTOyP9jf/60hJMZApDcWrdg+Amfia1zK5Rt1PBzNUxsot2V79twNw1TZu W6efS0zSvlEW0Nyc3apZ7otYFbvppHJ0DW64V9wsh68dehb8IQv+zbm6Pp1v8IPnnhM6 KiLmq0F3NCDDZuh9GrSvmRnlv/nAhGK8DNoVwOHCNa/sqtMrsi+Z+id479lfmUMX07mh lWPfSCpZrQpKP5clD6ynAJZkU4AD7qfQ/lSxBjpjuMLgllAGk9iengh1mWghoCGDXd36 GslQ== X-Gm-Message-State: AC+VfDzM0Ue2oo6sjAiHqZ2aMjdGtxpszTe0yhveXUTxG6TnpBfjLf9S n3HyGqoOVt14x36uCIJd1kaE X-Google-Smtp-Source: ACHHUZ6aRSSnpCSFwwLO/70wt9OUwLz/936pvgjhQf6pEika0CH2yBC45Sv1DXm9OBmj2qA+9A41cg== X-Received: by 2002:a05:6a00:15c7:b0:63b:8f08:9af3 with SMTP id o7-20020a056a0015c700b0063b8f089af3mr3833208pfu.7.1684507345892; Fri, 19 May 2023 07:42:25 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.13]) by smtp.gmail.com with ESMTPSA id v11-20020aa7808b000000b005d22639b577sm3089611pff.165.2023.05.19.07.42.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 May 2023 07:42:25 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v4 1/7] PCI: endpoint: Pass EPF device ID to the probe function Date: Fri, 19 May 2023 20:12:09 +0530 Message-Id: <20230519144215.25167-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> References: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Currently, the EPF probe function doesn't get the device ID argument needed to correctly identify the device table ID of the EPF device. When multiple entries are added to the "struct pci_epf_device_id" table, the probe function needs to identify the correct one. And the only way to do so is by storing the correct device ID in "struct pci_epf" during "pci_epf_match_id()" and passing that to probe(). Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam Reviewed-by: Frank Li --- drivers/pci/endpoint/functions/pci-epf-ntb.c | 3 ++- drivers/pci/endpoint/functions/pci-epf-test.c | 2 +- drivers/pci/endpoint/functions/pci-epf-vntb.c | 2 +- drivers/pci/endpoint/pci-epf-core.c | 8 +++++--- include/linux/pci-epf.h | 4 +++- 5 files changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-ntb.c b/drivers/pci/end= point/functions/pci-epf-ntb.c index 9a00448c7e61..980b4ecf19a2 100644 --- a/drivers/pci/endpoint/functions/pci-epf-ntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-ntb.c @@ -2075,11 +2075,12 @@ static struct config_group *epf_ntb_add_cfs(struct = pci_epf *epf, /** * epf_ntb_probe() - Probe NTB function driver * @epf: NTB endpoint function device + * @id: NTB endpoint function device ID * * Probe NTB function driver when endpoint function bus detects a NTB * endpoint function. */ -static int epf_ntb_probe(struct pci_epf *epf) +static int epf_ntb_probe(struct pci_epf *epf, const struct pci_epf_device_= id *id) { struct epf_ntb *ntb; struct device *dev; diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/en= dpoint/functions/pci-epf-test.c index 0f9d2ec822ac..d5fcc78a5b73 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -980,7 +980,7 @@ static const struct pci_epf_device_id pci_epf_test_ids[= ] =3D { {}, }; =20 -static int pci_epf_test_probe(struct pci_epf *epf) +static int pci_epf_test_probe(struct pci_epf *epf, const struct pci_epf_de= vice_id *id) { struct pci_epf_test *epf_test; struct device *dev =3D &epf->dev; diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/en= dpoint/functions/pci-epf-vntb.c index b7c7a8af99f4..122eb7a12028 100644 --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c @@ -1401,7 +1401,7 @@ static struct pci_epf_ops epf_ntb_ops =3D { * * Returns: Zero for success, or an error code in case of failure */ -static int epf_ntb_probe(struct pci_epf *epf) +static int epf_ntb_probe(struct pci_epf *epf, const struct pci_epf_device_= id *id) { struct epf_ntb *ntb; struct device *dev; diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci= -epf-core.c index 2036e38be093..924564288c9a 100644 --- a/drivers/pci/endpoint/pci-epf-core.c +++ b/drivers/pci/endpoint/pci-epf-core.c @@ -494,11 +494,13 @@ static const struct device_type pci_epf_type =3D { }; =20 static int -pci_epf_match_id(const struct pci_epf_device_id *id, const struct pci_epf = *epf) +pci_epf_match_id(const struct pci_epf_device_id *id, struct pci_epf *epf) { while (id->name[0]) { - if (strcmp(epf->name, id->name) =3D=3D 0) + if (strcmp(epf->name, id->name) =3D=3D 0) { + epf->id =3D id; return true; + } id++; } =20 @@ -526,7 +528,7 @@ static int pci_epf_device_probe(struct device *dev) =20 epf->driver =3D driver; =20 - return driver->probe(epf); + return driver->probe(epf, epf->id); } =20 static void pci_epf_device_remove(struct device *dev) diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index a215dc8ce693..bc613f0df7e3 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -89,7 +89,7 @@ struct pci_epc_event_ops { * @id_table: identifies EPF devices for probing */ struct pci_epf_driver { - int (*probe)(struct pci_epf *epf); + int (*probe)(struct pci_epf *epf, const struct pci_epf_device_id *id); void (*remove)(struct pci_epf *epf); =20 struct device_driver driver; @@ -131,6 +131,7 @@ struct pci_epf_bar { * @epc: the EPC device to which this EPF device is bound * @epf_pf: the physical EPF device to which this virtual EPF device is bo= und * @driver: the EPF driver to which this EPF device is bound + * @id: Pointer to the EPF device ID * @list: to add pci_epf as a list of PCI endpoint functions to pci_epc * @lock: mutex to protect pci_epf_ops * @sec_epc: the secondary EPC device to which this EPF device is bound @@ -158,6 +159,7 @@ struct pci_epf { struct pci_epc *epc; struct pci_epf *epf_pf; struct pci_epf_driver *driver; + const struct pci_epf_device_id *id; struct list_head list; /* mutex to protect against concurrent access of pci_epf_ops */ struct mutex lock; --=20 2.25.1 From nobody Mon Feb 9 11:23:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4E82C77B75 for ; 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Fri, 19 May 2023 07:42:29 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.13]) by smtp.gmail.com with ESMTPSA id v11-20020aa7808b000000b005d22639b577sm3089611pff.165.2023.05.19.07.42.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 May 2023 07:42:28 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v4 2/7] PCI: endpoint: Warn and return if EPC is started/stopped multiple times Date: Fri, 19 May 2023 20:12:10 +0530 Message-Id: <20230519144215.25167-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> References: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When the EPC is started or stopped multiple times from configfs, just emit a once time warning and return. There is no need to call the EPC start/stop functions in those cases. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-ep-cfs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/endpoint/pci-ep-cfs.c b/drivers/pci/endpoint/pci-e= p-cfs.c index 4b8ac0ac84d5..62c8e09c59f4 100644 --- a/drivers/pci/endpoint/pci-ep-cfs.c +++ b/drivers/pci/endpoint/pci-ep-cfs.c @@ -178,6 +178,9 @@ static ssize_t pci_epc_start_store(struct config_item *= item, const char *page, if (kstrtobool(page, &start) < 0) return -EINVAL; =20 + if (WARN_ON_ONCE(start =3D=3D epc_group->start)) + return 0; + if (!start) { pci_epc_stop(epc); epc_group->start =3D 0; --=20 2.25.1 From nobody Mon Feb 9 11:23:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E2F3C7EE26 for ; Fri, 19 May 2023 14:42:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230356AbjESOms (ORCPT ); Fri, 19 May 2023 10:42:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232199AbjESOmh (ORCPT ); Fri, 19 May 2023 10:42:37 -0400 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29024E66 for ; Fri, 19 May 2023 07:42:33 -0700 (PDT) Received: by mail-pf1-x435.google.com with SMTP id d2e1a72fcca58-64d341bdedcso513409b3a.3 for ; Fri, 19 May 2023 07:42:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684507352; x=1687099352; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Y0Nj6xvTZCRiBBoVUykKLMC0GwPG51XjYBpupCLgLXc=; b=K0kt2N60Z5EDo3wlxaZ+oVBbfd+uUCkPvW1R1/lUWTEfqNhl4hXOQl+eW5E17/oMzS PCFqiVb9r7Wc8jfJPdYYoCrOrRd7N9A7gL8M8pCMZiEDZoEpViZrxMnnarTT8rdRG9C0 OmqfRHLljypcQupS9qtAXGgsgSbvLrscESECEJW/Gp6ulvgJHgx8ET5l24XhuBMpV7eI W98QthDpRI7f4JQLIsbiEXclk3yXVSZo/klSfGgPXIs2ZLZU/vn2kJyQIHXxnX7WbaX5 /9Uoqq3aavtqMySbigMN9X1fffeMCDoE3uIgzXL6TPNf46cmtyBMJFD0QKCLO6qiwH8c nlDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684507352; x=1687099352; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Y0Nj6xvTZCRiBBoVUykKLMC0GwPG51XjYBpupCLgLXc=; b=JDUwcwoNUC/uPBGIZN7UKagqqpzZ9u2Go4pTlF0oK2NbsPrXYt0pwkic2OwzVTwopB B0vWd/Ou5EfZLGlQYcloQ3DLu1xqZJSk1XGMbggE6KuzD8FSGVjwOUYRu9lfRSelGcWL VNjNuRm9s12bY3EKO7+RVN7eF+3QWi9QSO9gJCD9jFZwORS/d9066iMFUzUqMMxNxUf+ csVfeD8Q4bHCmuJXIvrgQK3wGRkXJ1AoB2/Z3Mgpuwf3gDwaL93PfsTzPgn0F8b6tprt CejHuZ/MChkJzqcdrE6wwZowLmdZOAemLaLMes5mATZEJK54BFXzdjcQn6uy/PzYpGcz 2TNA== X-Gm-Message-State: AC+VfDw80pd5DSh2o2H3uoVRnG6NtQJ2juLHtF0kjC0D4fM2Uh2FkupD Rc+0wVoWvqhu7LSzpCjs5pB8 X-Google-Smtp-Source: ACHHUZ4sGOB3ClfNG/LbPnjH5sqnf/3PSsTpHnqi2ZgAMIWLobureM6us2sRu14OIoj/mkT/6Ldqvw== X-Received: by 2002:a05:6a00:13a2:b0:64d:2487:5b20 with SMTP id t34-20020a056a0013a200b0064d24875b20mr3440157pfg.9.1684507352390; Fri, 19 May 2023 07:42:32 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.13]) by smtp.gmail.com with ESMTPSA id v11-20020aa7808b000000b005d22639b577sm3089611pff.165.2023.05.19.07.42.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 May 2023 07:42:32 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v4 3/7] PCI: endpoint: Add linkdown notifier support Date: Fri, 19 May 2023 20:12:11 +0530 Message-Id: <20230519144215.25167-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> References: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support to notify the EPF device about the linkdown event from the EPC device. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index 46c9a5c3ca14..1ecbe2b1d3bd 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -706,6 +706,32 @@ void pci_epc_linkup(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_linkup); =20 +/** + * pci_epc_linkdown() - Notify the EPF device that EPC device has dropped = the + * connection with the Root Complex. + * @epc: the EPC device which has dropped the link with the host + * + * Invoke to Notify the EPF device that the EPC device has dropped the + * connection with the Root Complex. + */ +void pci_epc_linkdown(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->link_down) + epf->event_ops->link_down(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_linkdown); + /** * pci_epc_init_notify() - Notify the EPF device that EPC device's core * initialization is completed. diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 301bb0e53707..63a6cc5e5282 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -203,6 +203,7 @@ void pci_epc_destroy(struct pci_epc *epc); int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); void pci_epc_linkup(struct pci_epc *epc); +void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index bc613f0df7e3..f8e5a63d0c83 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -71,10 +71,12 @@ struct pci_epf_ops { * struct pci_epf_event_ops - Callbacks for capturing the EPC events * @core_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event + * @link_down: Callback for the EPC link down event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); + int (*link_down)(struct pci_epf *epf); }; =20 /** --=20 2.25.1 From nobody Mon Feb 9 11:23:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43AB6C77B75 for ; Fri, 19 May 2023 14:43:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232207AbjESOmw (ORCPT ); Fri, 19 May 2023 10:42:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232196AbjESOmk (ORCPT ); Fri, 19 May 2023 10:42:40 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F114FE47 for ; Fri, 19 May 2023 07:42:36 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-64d41d8bc63so44449b3a.0 for ; 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charset="utf-8" Add support to notify the EPF device about the Bus Master Enable (BME) event received by the EPC device from the Root complex. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index 1ecbe2b1d3bd..ca8f838fa51f 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -758,6 +758,32 @@ void pci_epc_init_notify(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_init_notify); =20 +/** + * pci_epc_bme_notify() - Notify the EPF device that the EPC device has re= ceived + * the BME event from the Root complex + * @epc: the EPC device that received the BME event + * + * Invoke to Notify the EPF device that the EPC device has received the Bus + * Master Enable (BME) event from the Root complex + */ +void pci_epc_bme_notify(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->bme) + epf->event_ops->bme(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_bme_notify); + /** * pci_epc_destroy() - destroy the EPC device * @epc: the EPC device that has to be destroyed diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 63a6cc5e5282..5cb694031072 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -205,6 +205,7 @@ int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf= *epf, void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); +void pci_epc_bme_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index f8e5a63d0c83..f34b3b32a0e7 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -72,11 +72,13 @@ struct pci_epf_ops { * @core_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event + * @bme: Callback for the EPC BME (Bus Master Enable) event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); 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charset="utf-8" Add support to pass Link down notification to Endpoint function driver so that the LINK_DOWN event can be processed by the function. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 19b32839ea26..4ce01ff7527c 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -569,6 +569,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int i= rq, void *data) if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { dev_dbg(dev, "Received Linkdown event\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_DOWN; + pci_epc_linkdown(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_ENABLED; --=20 2.25.1 From nobody Mon Feb 9 11:23:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D9CDC7EE31 for ; Fri, 19 May 2023 14:43:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232223AbjESOna (ORCPT ); Fri, 19 May 2023 10:43:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232225AbjESOmy (ORCPT ); Fri, 19 May 2023 10:42:54 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D527610FF for ; Fri, 19 May 2023 07:42:44 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-64d293746e0so1733111b3a.2 for ; Fri, 19 May 2023 07:42:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684507364; x=1687099364; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FI+i05lzXUFOa/Wt+qCq2zIVxieQpfBQT3yhV8ufVhA=; b=UH0O2514/iDnKDxDe0vWzjD2YlBM+MfhgGuIdPfytBmq0vGCukWuUy2xsb2RzlnWzj OpxBy6K93k9zf9Ibr3ulNLcra5FDmfI6gIem+FeuHYV+to4f0EXxS/Ds9E9vsmXDD4gR jqnb9BV23DdYbJTog2vI0sxXc9cFWxWNkG10VD/gslu9on7UPHle48HFLq/DNJXLrjz6 5wh1D5YosY7NkKoL4/IrTS4Z+DQuM3g1zbv6kt9gJiIDJVQpy0M2JKTtmHRfnuQdCIeA JEk+UKOvQzNuLl5rWYbywrVmvKnMHpFfsYmZqHNCzUrjmzpkvwCWfgpDKs2sf39pwa7M w7dA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684507364; x=1687099364; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FI+i05lzXUFOa/Wt+qCq2zIVxieQpfBQT3yhV8ufVhA=; b=MO4vezNbKJvC9QFJZeCj0FDWLmfJ+jgsFm4HYiVjlGeLhEZZzaCJFx65VhnkYd9uyq owvP3iGlixaT8rFDGCTJwXSsOKPTnOknPNL6OzKAvHDFWpuOG0UJREU4OE5fqiy9n496 4gjLz54iZx6K11an2cBN4A+4xjndI5FDBI8Capg44Huo8BXjHfqEopkx2+7CtGYv/RiT 3r7jHLufopfU8bW66q6OFnRRmBeY+UqSMzMsMIOzvnYvEX0usKEgcoRX7/SCYc6inULf vmubKSZwnQT1KOl1HxvpxyAI9v/jiZNQqkrOJz2GikP1WfjEx5bRCabTfKCIUJwSLhWK eGUA== X-Gm-Message-State: AC+VfDzP/BP+BymDIQPMWWT3jXNWUyLEPvaaGSTDCGwzBgJ3iy1AQ+Hj iw8962X8gRvJDaTxe0cyjfUf X-Google-Smtp-Source: ACHHUZ7Hf1ixBT074nTikvKLNqOwJSJ9qvRfgXAWbOR2Wxw5AgMhngUKUJgbtfnzMUbXdxV5VxMGSg== X-Received: by 2002:a05:6a00:2d96:b0:64c:b819:89c1 with SMTP id fb22-20020a056a002d9600b0064cb81989c1mr3362785pfb.27.1684507363952; Fri, 19 May 2023 07:42:43 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.13]) by smtp.gmail.com with ESMTPSA id v11-20020aa7808b000000b005d22639b577sm3089611pff.165.2023.05.19.07.42.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 May 2023 07:42:43 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v4 6/7] PCI: qcom-ep: Add support for BME notification Date: Fri, 19 May 2023 20:12:14 +0530 Message-Id: <20230519144215.25167-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> References: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support to pass BME (Bus Master Enable) notification to Endpoint function driver so that the BME event can be processed by the function. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 4ce01ff7527c..1435f516d3f7 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -573,6 +573,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int i= rq, void *data) } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_ENABLED; + pci_epc_bme_notify(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_PM_TURNOFF, status)) { dev_dbg(dev, "Received PM Turn-off event! Entering L23\n"); val =3D readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); --=20 2.25.1 From nobody Mon Feb 9 11:23:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D014C7EE30 for ; Fri, 19 May 2023 14:43:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231976AbjESOnf (ORCPT ); Fri, 19 May 2023 10:43:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232245AbjESOnB (ORCPT ); Fri, 19 May 2023 10:43:01 -0400 Received: from mail-pf1-x430.google.com (mail-pf1-x430.google.com [IPv6:2607:f8b0:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F7D0192 for ; Fri, 19 May 2023 07:42:48 -0700 (PDT) Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-64354231003so701282b3a.0 for ; Fri, 19 May 2023 07:42:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684507367; x=1687099367; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zrpMXZkshOTirNR2J7EhGnAOmpfci/CczBfCz/1mKrU=; b=WZcpKF/PI20KxR39y+H3aAuysXS4AF2yxgqIQeraijv7jZ/8yWENTB5UzbjEKS4fO2 DI78ttT52iHxs2jutL6DXEW9CfqI04DcaAKjK9iIhB5LO9dWBqiDseZ8Is5HoSG1Ydmj iEjv4I8yn3C38Xrm+HZ+WrM/VjNJTslkfDI64U8dLNzf3ETN/8OA+NbrWY1/F6SMnouz GSRSDpv5q85NmELzyGcW1uQtlz0lT2YduclfYEw8Jwz+riur0eN88Lgnsx4VtdFDb18F TqQ1tJdY2WyXXJY+sVKkB3fIbInr9PXwM0NGXEQYpP1R5qGvqUs00by70jJDkd97iHwi EaSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684507367; x=1687099367; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zrpMXZkshOTirNR2J7EhGnAOmpfci/CczBfCz/1mKrU=; b=isg++reTS5ycPb2WabFqGquikbNivCQ0ShjctpqpW7ywlpkQJmYhql1jp9rDEykpkO tu4XLdkSNo2OJ13p8tJdGaHH1IIrsY8NWhfIhb5WDxNmQdwrrSEq+FqCJC0rVhkRrAOc gGt44q9NjzW08CLssh6p7+rVD0cT3+mkzSbp6wR8vv4l7sA8r8Vtg0b9wC9Y26KQbe1z UeAMjHajiVJXZDRy54zx4Hzbz8jTUEBIIEL2FSdLPPKxtWqaOjn9bHG0RR7oDe14W5kI 1FPWregQizclau7OkgncXyxpFrV0+//+ARybVl6ac8yr0zArHUP17vLV+1zYmL5R4qTt of1A== X-Gm-Message-State: AC+VfDzsMk/bkv3MEVXKGpzHYY5EWYLOYRsjJB61G2eJSsLJKqMssecb aVCWBalcL+oJd1FrWrHqyWqr X-Google-Smtp-Source: ACHHUZ4vWuw9L4KMR+GCQp+6J0gVLlQcVgLs79QGUYOLyXUKVHQJ3dgcWtrVaRx8jTipmHWFhpOJqg== X-Received: by 2002:a05:6a21:33a8:b0:106:a78f:be22 with SMTP id yy40-20020a056a2133a800b00106a78fbe22mr2851238pzb.31.1684507367583; Fri, 19 May 2023 07:42:47 -0700 (PDT) Received: from localhost.localdomain ([117.202.184.13]) by smtp.gmail.com with ESMTPSA id v11-20020aa7808b000000b005d22639b577sm3089611pff.165.2023.05.19.07.42.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 May 2023 07:42:47 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v4 7/7] PCI: endpoint: Add PCI Endpoint function driver for MHI bus Date: Fri, 19 May 2023 20:12:15 +0530 Message-Id: <20230519144215.25167-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> References: <20230519144215.25167-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add PCI Endpoint driver for the Qualcomm MHI (Modem Host Interface) bus. The driver implements the MHI function over PCI in the endpoint device such as SDX55 modem. The MHI endpoint function driver acts as a controller driver for the MHI Endpoint stack and carries out all PCI related activities like mapping the host memory using iATU, triggering MSIs etc... Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/Kconfig | 10 + drivers/pci/endpoint/functions/Makefile | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 454 +++++++++++++++++++ 3 files changed, 465 insertions(+) create mode 100644 drivers/pci/endpoint/functions/pci-epf-mhi.c diff --git a/drivers/pci/endpoint/functions/Kconfig b/drivers/pci/endpoint/= functions/Kconfig index 9fd560886871..f5171b4fabbe 100644 --- a/drivers/pci/endpoint/functions/Kconfig +++ b/drivers/pci/endpoint/functions/Kconfig @@ -37,3 +37,13 @@ config PCI_EPF_VNTB between PCI Root Port and PCIe Endpoint. =20 If in doubt, say "N" to disable Endpoint NTB driver. + +config PCI_EPF_MHI + tristate "PCI Endpoint driver for MHI bus" + depends on PCI_ENDPOINT && MHI_BUS_EP + help + Enable this configuration option to enable the PCI Endpoint + driver for Modem Host Interface (MHI) bus in Qualcomm Endpoint + devices such as SDX55. + + If in doubt, say "N" to disable Endpoint driver for MHI bus. diff --git a/drivers/pci/endpoint/functions/Makefile b/drivers/pci/endpoint= /functions/Makefile index 5c13001deaba..696473fce50e 100644 --- a/drivers/pci/endpoint/functions/Makefile +++ b/drivers/pci/endpoint/functions/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_PCI_EPF_TEST) +=3D pci-epf-test.o obj-$(CONFIG_PCI_EPF_NTB) +=3D pci-epf-ntb.o obj-$(CONFIG_PCI_EPF_VNTB) +=3D pci-epf-vntb.o +obj-$(CONFIG_PCI_EPF_MHI) +=3D pci-epf-mhi.o diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/end= point/functions/pci-epf-mhi.c new file mode 100644 index 000000000000..df924fb10e4d --- /dev/null +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI EPF driver for MHI Endpoint devices + * + * Copyright (C) 2022 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include + +#define MHI_VERSION_1_0 0x01000000 + +struct pci_epf_mhi_ep_info { + const struct mhi_ep_cntrl_config *config; + struct pci_epf_header *epf_header; + enum pci_barno bar_num; + u32 epf_flags; + u32 msi_count; + u32 mru; +}; + +#define MHI_EP_CHANNEL_CONFIG_UL(ch_num, ch_name) \ + { \ + .num =3D ch_num, \ + .name =3D ch_name, \ + .dir =3D DMA_TO_DEVICE, \ + } + +#define MHI_EP_CHANNEL_CONFIG_DL(ch_num, ch_name) \ + { \ + .num =3D ch_num, \ + .name =3D ch_name, \ + .dir =3D DMA_FROM_DEVICE, \ + } + +static const struct mhi_ep_channel_config mhi_v1_channels[] =3D { + MHI_EP_CHANNEL_CONFIG_UL(0, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_DL(1, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_UL(2, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_DL(3, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_UL(4, "DIAG"), + MHI_EP_CHANNEL_CONFIG_DL(5, "DIAG"), + MHI_EP_CHANNEL_CONFIG_UL(6, "SSR"), + MHI_EP_CHANNEL_CONFIG_DL(7, "SSR"), + MHI_EP_CHANNEL_CONFIG_UL(8, "QDSS"), + MHI_EP_CHANNEL_CONFIG_DL(9, "QDSS"), + MHI_EP_CHANNEL_CONFIG_UL(10, "EFS"), + MHI_EP_CHANNEL_CONFIG_DL(11, "EFS"), + MHI_EP_CHANNEL_CONFIG_UL(12, "MBIM"), + MHI_EP_CHANNEL_CONFIG_DL(13, "MBIM"), + MHI_EP_CHANNEL_CONFIG_UL(14, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(15, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(16, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(17, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(18, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_DL(19, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_UL(20, "IPCR"), + MHI_EP_CHANNEL_CONFIG_DL(21, "IPCR"), + MHI_EP_CHANNEL_CONFIG_UL(32, "DUN"), + MHI_EP_CHANNEL_CONFIG_DL(33, "DUN"), + MHI_EP_CHANNEL_CONFIG_UL(46, "IP_SW0"), + MHI_EP_CHANNEL_CONFIG_DL(47, "IP_SW0"), +}; + +static const struct mhi_ep_cntrl_config mhi_v1_config =3D { + .max_channels =3D 128, + .num_channels =3D ARRAY_SIZE(mhi_v1_channels), + .ch_cfg =3D mhi_v1_channels, + .mhi_version =3D MHI_VERSION_1_0, +}; + +static struct pci_epf_header sdx55_header =3D { + .vendorid =3D PCI_VENDOR_ID_QCOM, + .deviceid =3D 0x0306, + .baseclass_code =3D PCI_BASE_CLASS_COMMUNICATION, + .subclass_code =3D PCI_CLASS_COMMUNICATION_MODEM & 0xff, + .interrupt_pin =3D PCI_INTERRUPT_INTA, +}; + +static const struct pci_epf_mhi_ep_info sdx55_info =3D { + .config =3D &mhi_v1_config, + .epf_header =3D &sdx55_header, + .bar_num =3D BAR_0, + .epf_flags =3D PCI_BASE_ADDRESS_MEM_TYPE_32, + .msi_count =3D 32, + .mru =3D 0x8000, +}; + +struct pci_epf_mhi { + const struct pci_epf_mhi_ep_info *info; + struct mhi_ep_cntrl mhi_cntrl; + struct pci_epf *epf; + struct mutex lock; + void __iomem *mmio; + resource_size_t mmio_phys; + u32 mmio_size; + int irq; + bool mhi_registered; +}; + +static int pci_epf_mhi_alloc_map(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_a= ddr, + phys_addr_t *phys_ptr, void __iomem **virt, size_t size) +{ + struct pci_epf_mhi *epf_mhi =3D container_of(mhi_cntrl, struct pci_epf_mh= i, mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf_mhi->epf->epc; + size_t offset =3D pci_addr & (epc->mem->window.page_size - 1); + void __iomem *virt_addr; + phys_addr_t phys_addr; + int ret; + + virt_addr =3D pci_epc_mem_alloc_addr(epc, &phys_addr, size + offset); + if (!virt_addr) + return -ENOMEM; + + ret =3D pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, phys_addr, pci= _addr - offset, + size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, phys_addr, virt_addr, size + offset); + + return ret; + } + + *phys_ptr =3D phys_addr + offset; + *virt =3D virt_addr + offset; + + return 0; +} + +static void pci_epf_mhi_unmap_free(struct mhi_ep_cntrl *mhi_cntrl, u64 pci= _addr, + phys_addr_t phys_addr, void __iomem *virt_addr, size_t size) +{ + struct pci_epf_mhi *epf_mhi =3D container_of(mhi_cntrl, struct pci_epf_mh= i, mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf->epc; + size_t offset =3D pci_addr & (epc->mem->window.page_size - 1); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, phys_addr - offset); + pci_epc_mem_free_addr(epc, phys_addr - offset, virt_addr - offset, size += offset); +} + +static void pci_epf_mhi_raise_irq(struct mhi_ep_cntrl *mhi_cntrl, u32 vect= or) +{ + struct pci_epf_mhi *epf_mhi =3D container_of(mhi_cntrl, struct pci_epf_mh= i, mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf->epc; + + /* + * Vector is incremented by 1 here as the DWC core will decrement it befo= re + * writing to iATU. + */ + pci_epc_raise_irq(epc, epf->func_no, epf->vfunc_no, PCI_EPC_IRQ_MSI, vect= or + 1); +} + +static int pci_epf_mhi_read_from_host(struct mhi_ep_cntrl *mhi_cntrl, u64 = from, void __iomem *to, + size_t size) +{ + struct pci_epf_mhi *epf_mhi =3D container_of(mhi_cntrl, struct pci_epf_mh= i, mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset =3D from % 0x1000; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf =3D pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + mutex_unlock(&epf_mhi->lock); + return -ENOMEM; + } + + ret =3D pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, from= - offset, + size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + mutex_unlock(&epf_mhi->lock); + return ret; + } + + memcpy_fromio(to, tre_buf + offset, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + + mutex_unlock(&epf_mhi->lock); + + return 0; +} + +static int pci_epf_mhi_write_to_host(struct mhi_ep_cntrl *mhi_cntrl, void = __iomem *from, u64 to, + size_t size) +{ + struct pci_epf_mhi *epf_mhi =3D container_of(mhi_cntrl, struct pci_epf_mh= i, mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset =3D to % 0x1000; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf =3D pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + mutex_unlock(&epf_mhi->lock); + return -ENOMEM; + } + + ret =3D pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, to -= offset, + size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + mutex_unlock(&epf_mhi->lock); + return ret; + } + + memcpy_toio(tre_buf + offset, from, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + + mutex_unlock(&epf_mhi->lock); + + return 0; +} + +static int pci_epf_mhi_core_init(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct pci_epf_bar *epf_bar =3D &epf->bar[info->bar_num]; + struct pci_epc *epc =3D epf->epc; + struct device *dev =3D &epf->dev; + int ret; + + epf_bar->phys_addr =3D epf_mhi->mmio_phys; + epf_bar->size =3D epf_mhi->mmio_size; + epf_bar->barno =3D info->bar_num; + epf_bar->flags =3D info->epf_flags; + ret =3D pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); + if (ret) { + dev_err(dev, "Failed to set BAR: %d\n", ret); + return ret; + } + + ret =3D pci_epc_set_msi(epc, epf->func_no, epf->vfunc_no, + order_base_2(info->msi_count)); + if (ret) { + dev_err(dev, "Failed to set MSI configuration: %d\n", ret); + return ret; + } + + ret =3D pci_epc_write_header(epc, epf->func_no, epf->vfunc_no, epf->heade= r); + if (ret) { + dev_err(dev, "Failed to set Configuration header: %d\n", ret); + return ret; + } + + return 0; +} + +static int pci_epf_mhi_link_up(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + struct pci_epc *epc =3D epf->epc; + struct device *dev =3D &epf->dev; + int ret; + + mhi_cntrl->mmio =3D epf_mhi->mmio; + mhi_cntrl->irq =3D epf_mhi->irq; + mhi_cntrl->mru =3D info->mru; + + /* Assign the struct dev of PCI EP as MHI controller device */ + mhi_cntrl->cntrl_dev =3D epc->dev.parent; + mhi_cntrl->raise_irq =3D pci_epf_mhi_raise_irq; + mhi_cntrl->alloc_map =3D pci_epf_mhi_alloc_map; + mhi_cntrl->unmap_free =3D pci_epf_mhi_unmap_free; + mhi_cntrl->read_from_host =3D pci_epf_mhi_read_from_host; + mhi_cntrl->write_to_host =3D pci_epf_mhi_write_to_host; + + /* Register the MHI EP controller */ + ret =3D mhi_ep_register_controller(mhi_cntrl, info->config); + if (ret) { + dev_err(dev, "Failed to register MHI EP controller: %d\n", ret); + return ret; + } + + epf_mhi->mhi_registered =3D true; + + return 0; +} + +static int pci_epf_mhi_link_down(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + + if (epf_mhi->mhi_registered) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered =3D false; + } + + return 0; +} + +static int pci_epf_mhi_bme(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + struct device *dev =3D &epf->dev; + int ret; + + /* Power up the MHI EP stack if link is up and stack is in power down sta= te */ + if (!mhi_cntrl->enabled && epf_mhi->mhi_registered) { + ret =3D mhi_ep_power_up(mhi_cntrl); + if (ret) { + dev_err(dev, "Failed to power up MHI EP: %d\n", ret); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered =3D false; + } + } + + return 0; +} + +static int pci_epf_mhi_bind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + struct pci_epc *epc =3D epf->epc; + struct platform_device *pdev =3D to_platform_device(epc->dev.parent); + struct device *dev =3D &epf->dev; + struct resource *res; + int ret; + + if (WARN_ON_ONCE(!epc)) + return -EINVAL; + + /* Get MMIO base address from Endpoint controller */ + res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "mmio"); + epf_mhi->mmio_phys =3D res->start; + epf_mhi->mmio_size =3D resource_size(res); + + epf_mhi->mmio =3D ioremap_wc(epf_mhi->mmio_phys, epf_mhi->mmio_size); + if (IS_ERR(epf_mhi->mmio)) + return PTR_ERR(epf_mhi->mmio); + + ret =3D platform_get_irq_byname(pdev, "doorbell"); + if (ret < 0) { + dev_err(dev, "Failed to get Doorbell IRQ\n"); + iounmap(epf_mhi->mmio); + return ret; + } + + epf_mhi->irq =3D ret; + + return 0; +} + +static void pci_epf_mhi_unbind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct pci_epf_bar *epf_bar =3D &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + struct pci_epc *epc =3D epf->epc; + + /* + * Forcefully power down the MHI EP stack. Only way to bring the MHI EP s= tack + * back to working state after successive bind is by getting BME from hos= t. + */ + if (epf_mhi->mhi_registered) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered =3D false; + } + + iounmap(epf_mhi->mmio); + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); +} + +static struct pci_epc_event_ops pci_epf_mhi_event_ops =3D { + .core_init =3D pci_epf_mhi_core_init, + .link_up =3D pci_epf_mhi_link_up, + .link_down =3D pci_epf_mhi_link_down, + .bme =3D pci_epf_mhi_bme, +}; + +static int pci_epf_mhi_probe(struct pci_epf *epf, const struct pci_epf_dev= ice_id *id) +{ + struct pci_epf_mhi_ep_info *info =3D (struct pci_epf_mhi_ep_info *) id->d= river_data; + struct pci_epf_mhi *epf_mhi; + struct device *dev =3D &epf->dev; + + epf_mhi =3D devm_kzalloc(dev, sizeof(*epf_mhi), GFP_KERNEL); + if (!epf_mhi) + return -ENOMEM; + + epf->header =3D info->epf_header; + epf_mhi->info =3D info; + epf_mhi->epf =3D epf; + + epf->event_ops =3D &pci_epf_mhi_event_ops; + + mutex_init(&epf_mhi->lock); + + epf_set_drvdata(epf, epf_mhi); + + return 0; +} + +static const struct pci_epf_device_id pci_epf_mhi_ids[] =3D { + { + .name =3D "sdx55", .driver_data =3D (kernel_ulong_t) &sdx55_info, + }, + {}, +}; + +static struct pci_epf_ops pci_epf_mhi_ops =3D { + .unbind =3D pci_epf_mhi_unbind, + .bind =3D pci_epf_mhi_bind, +}; + +static struct pci_epf_driver pci_epf_mhi_driver =3D { + .driver.name =3D "pci_epf_mhi", + .probe =3D pci_epf_mhi_probe, + .id_table =3D pci_epf_mhi_ids, + .ops =3D &pci_epf_mhi_ops, + .owner =3D THIS_MODULE, +}; + +static int __init pci_epf_mhi_init(void) +{ + return pci_epf_register_driver(&pci_epf_mhi_driver); +} +module_init(pci_epf_mhi_init); + +static void __exit pci_epf_mhi_exit(void) +{ + pci_epf_unregister_driver(&pci_epf_mhi_driver); +} +module_exit(pci_epf_mhi_exit); + +MODULE_DESCRIPTION("PCI EPF driver for MHI Endpoint devices"); +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_LICENSE("GPL"); --=20 2.25.1