From nobody Fri Dec 19 14:30:39 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42B27C77B7A for ; Fri, 19 May 2023 14:13:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231883AbjESONW (ORCPT ); Fri, 19 May 2023 10:13:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232081AbjESONL (ORCPT ); Fri, 19 May 2023 10:13:11 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2515A3; Fri, 19 May 2023 07:13:09 -0700 (PDT) Received: (Authenticated sender: alexis.lothore@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 180BAE0013; Fri, 19 May 2023 14:13:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1684505588; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qBHDgODuRA2mc9mP3Izczog1YAv4uS8QCvhF8LhFK3o=; b=PuhoWhkMH48bvsVwi1zL2F0myAEP4debKZGYE7XZo2ivzqQiqO+NVbchhhG+B56c+jhZxQ CYozApTYmRY4xYRreC6TOBjq2qWcZ8QBc+UiAep855xYUNr/5xkoLu0o5Xth7DG1cO6Ocz dWXZe8XyJf5m77Ul0MsJmGYpCKYIMT5slScba+xrnSfuukVGGyNucWW9syUeOSRyBxqH7V mOQt59iMcpaJD6r9jLEATGb/vp5cKyd+n3sv0kLHkbXSO4kPGk/DkqOMlTfdymdN04XLIu bIu/1omlVsKT7sptgtKfzxd45x1twEvi0ZNTl6PUgyykwlV/WK6tqHwdkv1srg== From: alexis.lothore@bootlin.com To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com, paul.arola@telus.com, scott.roberts@telus.com, =?UTF-8?q?Marek=20Beh=C3=BAn?= , =?UTF-8?q?Alexis=20Lothor=C3=A9?= Subject: [PATCH net-next v2 5/7] net: dsa: mv88e6xxx: fix 88E6393X family internal phys layout Date: Fri, 19 May 2023 16:13:01 +0200 Message-Id: <20230519141303.245235-6-alexis.lothore@bootlin.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230519141303.245235-1-alexis.lothore@bootlin.com> References: <20230519141303.245235-1-alexis.lothore@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alexis Lothor=C3=A9 88E6393X/88E6193X/88E6191X swicthes have in fact 8 internal PHYs, but those are not present starting at port 0: supported ports go from 1 to 8 Signed-off-by: Alexis Lothor=C3=A9 Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli --- drivers/net/dsa/mv88e6xxx/chip.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/c= hip.c index 2716d17c5c49..f15ca17bf9e2 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -6024,7 +6024,8 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = =3D { .name =3D "Marvell 88E6191X", .num_databases =3D 4096, .num_ports =3D 11, /* 10 + Z80 */ - .num_internal_phys =3D 9, + .num_internal_phys =3D 8, + .internal_phys_offset =3D 1, .max_vid =3D 8191, .max_sid =3D 63, .port_base_addr =3D 0x0, @@ -6047,7 +6048,8 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = =3D { .name =3D "Marvell 88E6193X", .num_databases =3D 4096, .num_ports =3D 11, /* 10 + Z80 */ - .num_internal_phys =3D 9, + .num_internal_phys =3D 8, + .internal_phys_offset =3D 1, .max_vid =3D 8191, .max_sid =3D 63, .port_base_addr =3D 0x0, @@ -6366,7 +6368,8 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = =3D { .name =3D "Marvell 88E6393X", .num_databases =3D 4096, .num_ports =3D 11, /* 10 + Z80 */ - .num_internal_phys =3D 9, + .num_internal_phys =3D 8, + .internal_phys_offset =3D 1, .max_vid =3D 8191, .max_sid =3D 63, .port_base_addr =3D 0x0, --=20 2.40.1