From nobody Wed Dec 17 17:09:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A0FAC77B75 for ; Fri, 19 May 2023 06:02:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229991AbjESGCT convert rfc822-to-8bit (ORCPT ); Fri, 19 May 2023 02:02:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229504AbjESGCL (ORCPT ); Fri, 19 May 2023 02:02:11 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B0D310E3; Thu, 18 May 2023 23:02:08 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 50E3F24E1B7; Fri, 19 May 2023 14:02:06 +0800 (CST) Received: from EXMBX062.cuchost.com (172.16.6.62) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 19 May 2023 14:02:06 +0800 Received: from ubuntu.localdomain (113.72.146.100) by EXMBX062.cuchost.com (172.16.6.62) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 19 May 2023 14:02:05 +0800 From: Changhuang Liang To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Walker Chen , Changhuang Liang , Hal Feng , , Subject: [PATCH v4 3/4] soc: starfive: Extract JH7110 pmu private operations Date: Thu, 18 May 2023 23:02:01 -0700 Message-ID: <20230519060202.15296-4-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519060202.15296-1-changhuang.liang@starfivetech.com> References: <20230519060202.15296-1-changhuang.liang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.146.100] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX062.cuchost.com (172.16.6.62) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Move JH7110 private operation into private data of compatible. Convenient to add AON PMU which would not have interrupts property. Signed-off-by: Changhuang Liang Reviewed-by: Walker Chen --- drivers/soc/starfive/jh71xx_pmu.c | 89 +++++++++++++++++++++---------- 1 file changed, 62 insertions(+), 27 deletions(-) diff --git a/drivers/soc/starfive/jh71xx_pmu.c b/drivers/soc/starfive/jh71x= x_pmu.c index 7d5f50d71c0d..0dbdcc0d2c91 100644 --- a/drivers/soc/starfive/jh71xx_pmu.c +++ b/drivers/soc/starfive/jh71xx_pmu.c @@ -51,9 +51,17 @@ struct jh71xx_domain_info { u8 bit; }; =20 +struct jh71xx_pmu; +struct jh71xx_pmu_dev; + struct jh71xx_pmu_match_data { const struct jh71xx_domain_info *domain_info; int num_domains; + unsigned int pmu_status; + int (*pmu_parse_irq)(struct platform_device *pdev, + struct jh71xx_pmu *pmu); + int (*pmu_set_state)(struct jh71xx_pmu_dev *pmd, + u32 mask, bool on); }; =20 struct jh71xx_pmu { @@ -79,12 +87,12 @@ static int jh71xx_pmu_get_state(struct jh71xx_pmu_dev *= pmd, u32 mask, bool *is_o if (!mask) return -EINVAL; =20 - *is_on =3D readl(pmu->base + JH71XX_PMU_CURR_POWER_MODE) & mask; + *is_on =3D readl(pmu->base + pmu->match_data->pmu_status) & mask; =20 return 0; } =20 -static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool= on) +static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool= on) { struct jh71xx_pmu *pmu =3D pmd->pmu; unsigned long flags; @@ -92,22 +100,8 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *= pmd, u32 mask, bool on) u32 mode; u32 encourage_lo; u32 encourage_hi; - bool is_on; int ret; =20 - ret =3D jh71xx_pmu_get_state(pmd, mask, &is_on); - if (ret) { - dev_dbg(pmu->dev, "unable to get current state for %s\n", - pmd->genpd.name); - return ret; - } - - if (is_on =3D=3D on) { - dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n", - pmd->genpd.name, on ? "en" : "dis"); - return 0; - } - spin_lock_irqsave(&pmu->lock, flags); =20 /* @@ -166,6 +160,29 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev = *pmd, u32 mask, bool on) return 0; } =20 +static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool= on) +{ + struct jh71xx_pmu *pmu =3D pmd->pmu; + const struct jh71xx_pmu_match_data *match_data =3D pmu->match_data; + bool is_on; + int ret; + + ret =3D jh71xx_pmu_get_state(pmd, mask, &is_on); + if (ret) { + dev_dbg(pmu->dev, "unable to get current state for %s\n", + pmd->genpd.name); + return ret; + } + + if (is_on =3D=3D on) { + dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n", + pmd->genpd.name, on ? "en" : "dis"); + return 0; + } + + return match_data->pmu_set_state(pmd, mask, on); +} + static int jh71xx_pmu_on(struct generic_pm_domain *genpd) { struct jh71xx_pmu_dev *pmd =3D container_of(genpd, @@ -226,6 +243,25 @@ static irqreturn_t jh71xx_pmu_interrupt(int irq, void = *data) return IRQ_HANDLED; } =20 +static int jh7110_pmu_parse_irq(struct platform_device *pdev, struct jh71x= x_pmu *pmu) +{ + struct device *dev =3D &pdev->dev; + int ret; + + pmu->irq =3D platform_get_irq(pdev, 0); + if (pmu->irq < 0) + return pmu->irq; + + ret =3D devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt, + 0, pdev->name, pmu); + if (ret) + dev_err(dev, "failed to request irq\n"); + + jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_= FAIL, true); + + return 0; +} + static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index) { struct jh71xx_pmu_dev *pmd; @@ -275,19 +311,18 @@ static int jh71xx_pmu_probe(struct platform_device *p= dev) if (IS_ERR(pmu->base)) return PTR_ERR(pmu->base); =20 - pmu->irq =3D platform_get_irq(pdev, 0); - if (pmu->irq < 0) - return pmu->irq; - - ret =3D devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt, - 0, pdev->name, pmu); - if (ret) - dev_err(dev, "failed to request irq\n"); + spin_lock_init(&pmu->lock); =20 match_data =3D of_device_get_match_data(dev); if (!match_data) return -EINVAL; =20 + ret =3D match_data->pmu_parse_irq(pdev, pmu); + if (ret) { + dev_err(dev, "failed to parse irq\n"); + return ret; + } + pmu->genpd =3D devm_kcalloc(dev, match_data->num_domains, sizeof(struct generic_pm_domain *), GFP_KERNEL); @@ -307,9 +342,6 @@ static int jh71xx_pmu_probe(struct platform_device *pde= v) } } =20 - spin_lock_init(&pmu->lock); - jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_= FAIL, true); - ret =3D of_genpd_add_provider_onecell(np, &pmu->genpd_data); if (ret) { dev_err(dev, "failed to register genpd driver: %d\n", ret); @@ -357,6 +389,9 @@ static const struct jh71xx_domain_info jh7110_power_dom= ains[] =3D { static const struct jh71xx_pmu_match_data jh7110_pmu =3D { .num_domains =3D ARRAY_SIZE(jh7110_power_domains), .domain_info =3D jh7110_power_domains, + .pmu_status =3D JH71XX_PMU_CURR_POWER_MODE, + .pmu_parse_irq =3D jh7110_pmu_parse_irq, + .pmu_set_state =3D jh7110_pmu_set_state, }; =20 static const struct of_device_id jh71xx_pmu_of_match[] =3D { --=20 2.25.1