From nobody Mon Feb 9 01:21:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E286C77B7A for ; Thu, 18 May 2023 10:13:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230455AbjERKNQ convert rfc822-to-8bit (ORCPT ); Thu, 18 May 2023 06:13:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230348AbjERKMp (ORCPT ); Thu, 18 May 2023 06:12:45 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C3231BD6; Thu, 18 May 2023 03:12:44 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 5FF6180F8; Thu, 18 May 2023 18:12:43 +0800 (CST) Received: from EXMBX061.cuchost.com (172.16.6.61) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 18 May 2023 18:12:43 +0800 Received: from localhost.localdomain (113.72.146.100) by EXMBX061.cuchost.com (172.16.6.61) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 18 May 2023 18:12:42 +0800 From: Xingyu Wu To: , , "Michael Turquette" , Stephen Boyd , Krzysztof Kozlowski , Philipp Zabel , Conor Dooley , "Emil Renner Berthing" CC: Rob Herring , Paul Walmsley , Palmer Dabbelt , Albert Ou , Hal Feng , Xingyu Wu , , Subject: [PATCH v6 10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Date: Thu, 18 May 2023 18:12:33 +0800 Message-ID: <20230518101234.143748-11-xingyu.wu@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230518101234.143748-1-xingyu.wu@starfivetech.com> References: <20230518101234.143748-1-xingyu.wu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.146.100] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX061.cuchost.com (172.16.6.61) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add DVP and HDMI TX pixel external fixed clocks and the rates are 74.25MHz and 297MHz. Signed-off-by: Xingyu Wu Reviewed-by: Conor Dooley --- .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 8 ++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 12 ++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 2a6d81609284..1155b97b593d 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -38,6 +38,10 @@ gpio-restart { }; }; =20 +&dvp_clk { + clock-frequency =3D <74250000>; +}; + &gmac0_rgmii_rxin { clock-frequency =3D <125000000>; }; @@ -54,6 +58,10 @@ &gmac1_rmii_refin { clock-frequency =3D <50000000>; }; =20 +&hdmitx0_pixelclk { + clock-frequency =3D <297000000>; +}; + &i2srx_bclk_ext { clock-frequency =3D <12288000>; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts= /starfive/jh7110.dtsi index 30e1f34d5cf8..336ee2b0ffb5 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -164,6 +164,12 @@ core4 { }; }; =20 + dvp_clk: dvp-clock { + compatible =3D "fixed-clock"; + clock-output-names =3D "dvp_clk"; + #clock-cells =3D <0>; + }; + gmac0_rgmii_rxin: gmac0-rgmii-rxin-clock { compatible =3D "fixed-clock"; clock-output-names =3D "gmac0_rgmii_rxin"; @@ -188,6 +194,12 @@ gmac1_rmii_refin: gmac1-rmii-refin-clock { #clock-cells =3D <0>; }; =20 + hdmitx0_pixelclk: hdmitx0-pixel-clock { + compatible =3D "fixed-clock"; + clock-output-names =3D "hdmitx0_pixelclk"; + #clock-cells =3D <0>; + }; + i2srx_bclk_ext: i2srx-bclk-ext-clock { compatible =3D "fixed-clock"; clock-output-names =3D "i2srx_bclk_ext"; --=20 2.25.1