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[35.228.215.61]) by smtp.gmail.com with ESMTPSA id r4-20020a056512102400b004f24db9248dsm177513lfr.141.2023.05.18.01.54.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 May 2023 01:54:45 -0700 (PDT) From: Tudor Ambarus To: miquel.raynal@bootlin.com, richard@nod.at, todd.e.brandt@intel.com Cc: vigneshr@ti.com, pratyush@kernel.org, michael@walle.cc, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, regressions@leemhuis.info, bagasdotme@gmail.com, regressions@lists.linux.dev, joneslee@google.com, Tudor Ambarus , Todd Brandt Subject: [PATCH] mtd: spi-nor: Fix divide by zero for spi-nor-generic flashes Date: Thu, 18 May 2023 08:54:40 +0000 Message-ID: <20230518085440.2363676-1-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.40.1.606.ga4b1b128d6-goog MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" We failed to initialize n_banks for spi-nor-generic flashes, which caused a devide by zero when computing the bank_size. By default we consider that all chips have a single bank. Initialize the default number of banks for spi-nor-generic flashes. Even if the bug is fixed with this simple initialization, check the n_banks value before dividing so that we make sure this kind of bug won't occur again if some other struct instance is created uninitialized. Suggested-by: Todd Brandt Reported-by: Todd Brandt Closes: https://bugzilla.kernel.org/show_bug.cgi?id=3D217448 Fixes: 9d6c5d64f028 ("mtd: spi-nor: Introduce the concept of bank") Link: https://lore.kernel.org/all/20230516225108.29194-1-todd.e.brandt@inte= l.com/ Signed-off-by: Tudor Ambarus Reviewed-by: Miquel Raynal Tested-by: Todd Brandt --- drivers/mtd/spi-nor/core.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 0bb0ad14a2fc..5f29fac8669a 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2018,6 +2018,7 @@ static const struct spi_nor_manufacturer *manufacture= rs[] =3D { =20 static const struct flash_info spi_nor_generic_flash =3D { .name =3D "spi-nor-generic", + .n_banks =3D 1, /* * JESD216 rev A doesn't specify the page size, therefore we need a * sane default. @@ -2921,7 +2922,8 @@ static void spi_nor_late_init_params(struct spi_nor *= nor) if (nor->flags & SNOR_F_HAS_LOCK && !nor->params->locking_ops) spi_nor_init_default_locking_ops(nor); =20 - nor->params->bank_size =3D div64_u64(nor->params->size, nor->info->n_bank= s); + if (nor->info->n_banks > 1) + params->bank_size =3D div64_u64(params->size, nor->info->n_banks); } =20 /** @@ -2987,6 +2989,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) /* Set SPI NOR sizes. */ params->writesize =3D 1; params->size =3D (u64)info->sector_size * info->n_sectors; + params->bank_size =3D params->size; params->page_size =3D info->page_size; =20 if (!(info->flags & SPI_NOR_NO_FR)) { --=20 2.40.1.606.ga4b1b128d6-goog