From nobody Fri Sep 12 13:12:28 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4B49C77B7F for ; Sat, 13 May 2023 08:56:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235348AbjEMI4B (ORCPT ); Sat, 13 May 2023 04:56:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229463AbjEMIz6 (ORCPT ); Sat, 13 May 2023 04:55:58 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B484D12A; Sat, 13 May 2023 01:55:57 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34D8bLjW024516; Sat, 13 May 2023 01:55:47 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=Pr0kr9n/DzGBe9MTqSwgVAn7Iur8skCjJRNn9qOW+Uw=; b=jOrFsBvxQeoRH3m6xzJRzDgneBACLQFBSPIyZ0AbVbjNtPoltvOr63umvL+uBAefSksK 8+soHURaO1GEMlgrJnpv7NbKtptZiaDIjyf9HFWahV4k7yYqWtKt5g+Vj4bfVzeCp/ca MOhYc/k2kAtYqkAAuUpOtUinuar9HMUQDngF+BzG4aV3Q5tTG751WxhitVe7AdpumCwC +ZlSsN+fseeErDeJqfgEGAGZv9VwVqW+nrkicn5Pi0bWmNz199Xmqz+AwHZtPvsarwT8 xU1joE0h15OQQCHkgyFXdDsnA0xEr8KSCo0XRrtpgBfbI1h5ftH3dmKJcBPYUy6cPN0u CQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3qhs82tgdk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sat, 13 May 2023 01:55:47 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Sat, 13 May 2023 01:55:45 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Sat, 13 May 2023 01:55:45 -0700 Received: from hyd1soter3.marvell.com (unknown [10.29.37.12]) by maili.marvell.com (Postfix) with ESMTP id 9501D5B6F81; Sat, 13 May 2023 01:52:44 -0700 (PDT) From: Hariprasad Kelam To: , CC: , , , , , , , , , , , , , , , , , , Subject: [net-next Patch v10 8/8] docs: octeontx2: Add Documentation for QOS Date: Sat, 13 May 2023 14:21:43 +0530 Message-ID: <20230513085143.3289-9-hkelam@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230513085143.3289-1-hkelam@marvell.com> References: <20230513085143.3289-1-hkelam@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: Jdu_l_nvF9-zxkij4P59xjPaxMzUhxpX X-Proofpoint-ORIG-GUID: Jdu_l_nvF9-zxkij4P59xjPaxMzUhxpX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-13_06,2023-05-05_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add QOS example configuration along with tc-htb commands Signed-off-by: Hariprasad Kelam Reviewed-by: Simon Horman --- .../ethernet/marvell/octeontx2.rst | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/Documentation/networking/device_drivers/ethernet/marvell/octeo= ntx2.rst b/Documentation/networking/device_drivers/ethernet/marvell/octeont= x2.rst index 5ba9015336e2..bfd233cfac35 100644 --- a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst +++ b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst @@ -13,6 +13,7 @@ Contents - `Drivers`_ - `Basic packet flow`_ - `Devlink health reporters`_ +- `Quality of service`_ =20 Overview =3D=3D=3D=3D=3D=3D=3D=3D @@ -287,3 +288,47 @@ For example:: NIX_AF_ERR: NIX Error Interrupt Reg : 64 Rx on unmapped PF_FUNC + + +Quality of service +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + + +Hardware algorithms used in scheduling +-------------------------------------- + +octeontx2 silicon and CN10K transmit interface consists of five transmit l= evels +starting from SMQ/MDQ, TL4 to TL1. Each packet will traverse MDQ, TL4 to T= L1 +levels. Each level contains an array of queues to support scheduling and s= haping. +The hardware uses the below algorithms depending on the priority of schedu= ler queues. +once the usercreates tc classes with different priorities, the driver conf= igures +schedulers allocated to the class with specified priority along with rate-= limiting +configuration. + +1. Strict Priority + + - Once packets are submitted to MDQ, hardware picks all active MDQs= having different priority + using strict priority. + +2. Round Robin + + - Active MDQs having the same priority level are chosen using round = robin. + + +Setup HTB offload +----------------- + +1. Enable HW TC offload on the interface:: + + # ethtool -K hw-tc-offload on + +2. Crate htb root:: + + # tc qdisc add dev clsact + # tc qdisc replace dev root handle 1: htb offload + +3. Create tc classes with different priorities:: + + # tc class add dev parent 1: classid 1:1 htb rate 10Gb= it prio 1 + + # tc class add dev parent 1: classid 1:2 htb rate 10Gb= it prio 7 --=20 2.17.1