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[2.34.28.169]) by smtp.gmail.com with ESMTPSA id oo11-20020a05620a530b00b0074db94ed42fsm965516qkn.116.2023.05.11.07.20.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 May 2023 07:20:01 -0700 (PDT) From: Marco Pagani To: Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix Cc: Marco Pagani , linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org Subject: [RFC PATCH v5 3/4] fpga: add fake FPGA region Date: Thu, 11 May 2023 16:19:21 +0200 Message-Id: <20230511141922.437328-4-marpagan@redhat.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230511141922.437328-1-marpagan@redhat.com> References: <20230511141922.437328-1-marpagan@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add fake FPGA region platform driver with support functions. This module is part of the KUnit tests for the FPGA subsystem. Signed-off-by: Marco Pagani --- drivers/fpga/tests/fake-fpga-region.c | 245 ++++++++++++++++++++++++++ drivers/fpga/tests/fake-fpga-region.h | 40 +++++ 2 files changed, 285 insertions(+) create mode 100644 drivers/fpga/tests/fake-fpga-region.c create mode 100644 drivers/fpga/tests/fake-fpga-region.h diff --git a/drivers/fpga/tests/fake-fpga-region.c b/drivers/fpga/tests/fak= e-fpga-region.c new file mode 100644 index 000000000000..020c3ad13812 --- /dev/null +++ b/drivers/fpga/tests/fake-fpga-region.c @@ -0,0 +1,245 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for the fake FPGA region + * + * Copyright (C) 2023 Red Hat, Inc. + * + * Author: Marco Pagani + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "fake-fpga-region.h" + +#define FAKE_FPGA_REGION_DEV_NAME "fake_fpga_region" + +struct fake_region_pdata { + struct kunit *test; + struct fpga_manager *mgr; +}; + +struct bridge_elem { + struct fpga_bridge *bridge; + struct list_head node; +}; + +struct fake_region_priv { + struct list_head bridge_list; + struct fake_region_pdata *pdata; +}; + +/** + * fake_fpga_region_register() - register a fake FPGA region. + * @mgr: associated FPGA manager. + * @parent: parent device. + * @test: KUnit test context object. + * + * Return: pointer to a new fake FPGA region on success, an ERR_PTR() enco= ded + * error code on failure. + */ +struct fake_fpga_region * +fake_fpga_region_register(struct kunit *test, struct fpga_manager *mgr, + struct device *parent) +{ + struct fake_fpga_region *region_ctx; + struct fake_region_pdata pdata; + int ret; + + region_ctx =3D kunit_kzalloc(test, sizeof(*region_ctx), GFP_KERNEL); + if (!region_ctx) { + ret =3D -ENOMEM; + goto err_mem; + } + + region_ctx->pdev =3D platform_device_alloc(FAKE_FPGA_REGION_DEV_NAME, + PLATFORM_DEVID_AUTO); + if (!region_ctx->pdev) { + pr_err("Fake FPGA region device allocation failed\n"); + ret =3D -ENOMEM; + goto err_mem; + } + + pdata.mgr =3D mgr; + pdata.test =3D test; + platform_device_add_data(region_ctx->pdev, &pdata, sizeof(pdata)); + + region_ctx->pdev->dev.parent =3D parent; + ret =3D platform_device_add(region_ctx->pdev); + if (ret) { + pr_err("Fake FPGA region device add failed\n"); + goto err_pdev; + } + + region_ctx->region =3D platform_get_drvdata(region_ctx->pdev); + + kunit_info(test, "Fake FPGA region %u: registered\n", + region_ctx->region->dev.id); + + return region_ctx; + +err_pdev: + platform_device_put(region_ctx->pdev); +err_mem: + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(fake_fpga_region_register); + +/** + * fake_fpga_region_unregister() - unregister a fake FPGA region. + * @region_ctx: fake FPGA region context data structure. + */ +void fake_fpga_region_unregister(struct fake_fpga_region *region_ctx) +{ + struct fake_region_priv *priv; + struct kunit *test; + u32 id; + + if (!region_ctx) + return; + + id =3D region_ctx->region->dev.id; + priv =3D region_ctx->region->priv; + test =3D priv->pdata->test; + + platform_device_unregister(region_ctx->pdev); + + kunit_info(test, "Fake FPGA region %u: unregistered\n", id); +} +EXPORT_SYMBOL_GPL(fake_fpga_region_unregister); + +/** + * fake_fpga_region_add_bridge() - add a bridge to a fake FPGA region. + * @region_ctx: fake FPGA region context data structure. + * @bridge: FPGA bridge. + * + * Return: 0 if registration succeeded, an error code otherwise. + */ +int fake_fpga_region_add_bridge(struct fake_fpga_region *region_ctx, + struct fpga_bridge *bridge) +{ + struct fake_region_priv *priv; + struct bridge_elem *elem; + + priv =3D region_ctx->region->priv; + + elem =3D devm_kzalloc(®ion_ctx->pdev->dev, sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + /* Add bridge to the list of bridges in the private context */ + elem->bridge =3D bridge; + list_add(&elem->node, &priv->bridge_list); + + kunit_info(priv->pdata->test, "Bridge: %u added to fake FPGA region: %u\n= ", + bridge->dev.id, region_ctx->region->dev.id); + + return 0; +} +EXPORT_SYMBOL_GPL(fake_fpga_region_add_bridge); + +int fake_fpga_region_program(struct fake_fpga_region *region_ctx) +{ + int ret; + + ret =3D fpga_region_program_fpga(region_ctx->region); + + /* fpga_region_program_fpga() already puts the bridges in case of errors = */ + if (!ret) + fpga_bridges_put(®ion_ctx->region->bridge_list); + + return ret; +} +EXPORT_SYMBOL_GPL(fake_fpga_region_program); + +static int fake_region_get_bridges(struct fpga_region *region) +{ + struct fake_region_priv *priv; + struct bridge_elem *elem; + int ret; + + priv =3D region->priv; + + /* Copy the list of bridges from the private context to the region */ + list_for_each_entry(elem, &priv->bridge_list, node) { + ret =3D fpga_bridge_get_to_list(elem->bridge->dev.parent, + region->info, + ®ion->bridge_list); + if (ret) + break; + } + + return ret; +} + +static int fake_fpga_region_probe(struct platform_device *pdev) +{ + struct device *dev; + struct fpga_region *region; + struct fpga_manager *mgr; + struct fake_region_pdata *pdata; + struct fake_region_priv *priv; + struct fpga_region_info info; + + dev =3D &pdev->dev; + pdata =3D dev_get_platdata(dev); + + if (!pdata) { + dev_err(&pdev->dev, "Fake FPGA region probe: missing platform data\n"); + return -EINVAL; + } + + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + mgr =3D fpga_mgr_get(pdata->mgr->dev.parent); + if (IS_ERR(mgr)) + return PTR_ERR(mgr); + + priv->pdata =3D pdata; + INIT_LIST_HEAD(&priv->bridge_list); + + memset(&info, 0, sizeof(info)); + info.priv =3D priv; + info.mgr =3D mgr; + info.get_bridges =3D fake_region_get_bridges; + + region =3D fpga_region_register_full(dev, &info); + if (IS_ERR(region)) { + fpga_mgr_put(mgr); + return PTR_ERR(region); + } + + platform_set_drvdata(pdev, region); + + return 0; +} + +static int fake_fpga_region_remove(struct platform_device *pdev) +{ + struct fpga_region *region =3D platform_get_drvdata(pdev); + struct fpga_manager *mgr =3D region->mgr; + + fpga_mgr_put(mgr); + fpga_region_unregister(region); + + return 0; +} + +static struct platform_driver fake_fpga_region_drv =3D { + .driver =3D { + .name =3D FAKE_FPGA_REGION_DEV_NAME + }, + .probe =3D fake_fpga_region_probe, + .remove =3D fake_fpga_region_remove, +}; + +module_platform_driver(fake_fpga_region_drv); + +MODULE_LICENSE("GPL"); diff --git a/drivers/fpga/tests/fake-fpga-region.h b/drivers/fpga/tests/fak= e-fpga-region.h new file mode 100644 index 000000000000..c72992cbb218 --- /dev/null +++ b/drivers/fpga/tests/fake-fpga-region.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Header file for the fake FPGA region + * + * Copyright (C) 2023 Red Hat, Inc. + * + * Author: Marco Pagani + */ + +#ifndef __FPGA_FAKE_RGN_H +#define __FPGA_FAKE_RGN_H + +#include +#include +#include +#include + +/** + * struct fake_fpga_region - fake FPGA region context data structure + * + * @region: FPGA region. + * @pdev: platform device of the FPGA region. + */ +struct fake_fpga_region { + struct fpga_region *region; + struct platform_device *pdev; +}; + +struct fake_fpga_region * +fake_fpga_region_register(struct kunit *test, struct fpga_manager *mgr, + struct device *parent); + +int fake_fpga_region_add_bridge(struct fake_fpga_region *region_ctx, + struct fpga_bridge *bridge); + +int fake_fpga_region_program(struct fake_fpga_region *region_ctx); + +void fake_fpga_region_unregister(struct fake_fpga_region *region_ctx); + +#endif /* __FPGA_FAKE_RGN_H */ --=20 2.40.1