From nobody Wed Feb 11 14:52:51 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B830CC7EE22 for ; Tue, 9 May 2023 09:32:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235222AbjEIJce (ORCPT ); Tue, 9 May 2023 05:32:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235112AbjEIJcK (ORCPT ); Tue, 9 May 2023 05:32:10 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4FDE100D5 for ; Tue, 9 May 2023 02:31:42 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3499UhN8071928; Tue, 9 May 2023 04:30:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1683624643; bh=jiDn66o6NiUAZGdP/2jhIMZ7WOU5GHi8PKN2VCsu2rY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TJOLIUOoO9l1ZXwldinjV0iSKp+CzZYqKW4p/Ec+5XUTwLPw/WzpIDG7BhoUBPBw1 xACr/NVWHmy8Zw7roXkh37vFNCUDZXf+/rLf5RhkFlVR/Tf4OXnTEDy7HhKfwK4aV2 4xzTH2bUnlHdiVBlNZx2bppHjXm5IvjTDCjI3aGA= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3499UhA3032363 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 9 May 2023 04:30:43 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 9 May 2023 04:30:43 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 9 May 2023 04:30:43 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3499UgZ1020465; Tue, 9 May 2023 04:30:42 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Jyri Sarha , David Airlie , Daniel Vetter , Laurent Pinchart , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Rahul T R , Swapnil Jakhade , Boris Brezillon , Francesco Dolcini CC: DRI Development List , Linux Kernel List , Nishanth Menon , Vignesh Raghavendra , Devarsh Thakkar , Jayesh Choudhary , Aradhya Bhatia Subject: [PATCH v6 4/8] drm/bridge: mhdp8546: Set input_bus_flags from atomic_check Date: Tue, 9 May 2023 15:00:32 +0530 Message-ID: <20230509093036.3303-5-a-bhatia1@ti.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230509093036.3303-1-a-bhatia1@ti.com> References: <20230509093036.3303-1-a-bhatia1@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Nikhil Devshatwar input_bus_flags are specified in drm_bridge_timings (legacy) as well as drm_bridge_state->input_bus_cfg.flags The flags from the timings will be deprecated. Bridges are supposed to validate and set the bridge state flags from atomic_check. Signed-off-by: Nikhil Devshatwar [a-bhatia1: replace timings in cdns_mhdp_platform_info by input_bus_flags] Signed-off-by: Aradhya Bhatia Reviewed-by: Neil Armstrong --- Notes: changes from v5: * removed the wrongly addded return statement in tfp410 driver. * replaced the timings field in cdns_mhdp_platform_info by input_bus_flags field, in order to get rid of bridge->timings altogether. drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 11 ++++++++--- drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h | 2 +- drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.c | 9 ++++----- drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.h | 2 +- 4 files changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/= gpu/drm/bridge/cadence/cdns-mhdp8546-core.c index 623e4235c94f..a677b1267525 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c @@ -2189,6 +2189,13 @@ static int cdns_mhdp_atomic_check(struct drm_bridge = *bridge, return -EINVAL; } =20 + /* + * There might be flags negotiation supported in future. + * Set the bus flags in atomic_check statically for now. + */ + if (mhdp->info) + bridge_state->input_bus_cfg.flags =3D *mhdp->info->input_bus_flags; + mutex_unlock(&mhdp->link_mutex); return 0; } @@ -2554,8 +2561,6 @@ static int cdns_mhdp_probe(struct platform_device *pd= ev) mhdp->bridge.ops =3D DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; mhdp->bridge.type =3D DRM_MODE_CONNECTOR_DisplayPort; - if (mhdp->info) - mhdp->bridge.timings =3D mhdp->info->timings; =20 ret =3D phy_init(mhdp->phy); if (ret) { @@ -2642,7 +2647,7 @@ static const struct of_device_id mhdp_ids[] =3D { #ifdef CONFIG_DRM_CDNS_MHDP8546_J721E { .compatible =3D "ti,j721e-mhdp8546", .data =3D &(const struct cdns_mhdp_platform_info) { - .timings =3D &mhdp_ti_j721e_bridge_timings, + .input_bus_flags =3D &mhdp_ti_j721e_bridge_input_bus_flags, .ops =3D &mhdp_ti_j721e_ops, }, }, diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h b/drivers/= gpu/drm/bridge/cadence/cdns-mhdp8546-core.h index bedddd510d17..bad2fc0c7306 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h @@ -336,7 +336,7 @@ struct cdns_mhdp_bridge_state { }; =20 struct cdns_mhdp_platform_info { - const struct drm_bridge_timings *timings; + const u32 *input_bus_flags; const struct mhdp_platform_ops *ops; }; =20 diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.c b/drivers= /gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.c index dfe1b59514f7..12d04be4e242 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.c @@ -71,8 +71,7 @@ const struct mhdp_platform_ops mhdp_ti_j721e_ops =3D { .disable =3D cdns_mhdp_j721e_disable, }; =20 -const struct drm_bridge_timings mhdp_ti_j721e_bridge_timings =3D { - .input_bus_flags =3D DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE | - DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE | - DRM_BUS_FLAG_DE_HIGH, -}; +const u32 +mhdp_ti_j721e_bridge_input_bus_flags =3D DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGED= GE | + DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE | + DRM_BUS_FLAG_DE_HIGH; diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.h b/drivers= /gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.h index 97d20d115a24..5ddca07a4255 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.h +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-j721e.h @@ -14,6 +14,6 @@ struct mhdp_platform_ops; =20 extern const struct mhdp_platform_ops mhdp_ti_j721e_ops; -extern const struct drm_bridge_timings mhdp_ti_j721e_bridge_timings; +extern const u32 mhdp_ti_j721e_bridge_input_bus_flags; =20 #endif /* !CDNS_MHDP8546_J721E_H */ --=20 2.40.1