From nobody Wed Feb 11 12:14:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FE31C77B75 for ; Tue, 9 May 2023 08:23:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234793AbjEIIXC (ORCPT ); Tue, 9 May 2023 04:23:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229615AbjEIIW5 (ORCPT ); Tue, 9 May 2023 04:22:57 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D83285FD2 for ; Tue, 9 May 2023 01:22:55 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-55a42c22300so91021157b3.2 for ; Tue, 09 May 2023 01:22:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683620575; x=1686212575; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=P/eUVtluKbHYoh34+9oF2eiC1PMtH+2gVKFzulzf0Dc=; b=MOl/ueia/VczvDyjT3T7HYTqdbT3tGq7e/qZgsdHLgfTJc6xduTdB70L6CR+tIEKXC 6EXTVk126gPItF25Of5O7fVF6UVJFXoeDtJSh85kNratW2ypIYLNIcEJhsWOoD3DwPIA 73gEFnRt9TduebE6GB+/AE02x6hmYT/i305jrOYJ7/i8E2Ts0HH5E1K8nZgHMVItEzpm rWj/3GYLmUzCBiQi1vnGi9jxqMp/fjSVJvegrBlGq8b/qE3OUi6WL2s6MTPgOlrKkeu6 rHrumiATgCHtZa5kExrL9Vu39ZtlDuG8EJJ4C58nMpDZBxy66RKeTFPDH7GkKELaTrDC 9Qdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683620575; x=1686212575; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=P/eUVtluKbHYoh34+9oF2eiC1PMtH+2gVKFzulzf0Dc=; b=c1yZD/rtJh50444cbmS/Yek/xto4kjPRlxR6FESnXk1Rkm/QXsSa+AYFEu7/A+lUHm L6DkBvONalLVpu7IJPet8s814waTdY32H0YZPdVJ2z5GgBJYfGShihqMVGTzKelxUO8Z KB5HvxijJO9K+7Rg+zHdXdy6IRXiVy5+jtK7PXqtfMseWHTvvfHPN8W3Npk3PR36ejsA M+IlqML0Gt8/5ZIBj+O8gRdpf1gH4eGhW8BNQFacZLj7TZ23ob37IIRi/MsjNHxR6Qne mMYgr4l9xUfh55Bikgm+u2/3BC9ZVlLiTP20vvRqxhVfkoONT5+e52uJxJJZ7E67h411 PX6w== X-Gm-Message-State: AC+VfDz3Tp227gCUzIuRWrbw3IkJ7hS+STDL1RQmHC5lRKtznozsEx3N h+2Nlg3Z+Dqurbnw7loyX265s/zvFOKBow== X-Google-Smtp-Source: ACHHUZ72r07bzH9ZI2xUXLXjt1CeDUp9wNAwqxvMJdxU7UmmLTiT1J/9vdLM6ETrDRpdjDs98h/5u++Ew5M7jA== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a81:b65a:0:b0:55a:8e39:57a7 with SMTP id h26-20020a81b65a000000b0055a8e3957a7mr7726750ywk.6.1683620575080; Tue, 09 May 2023 01:22:55 -0700 (PDT) Date: Tue, 9 May 2023 08:22:40 +0000 In-Reply-To: <20230509082244.1069623-1-joychakr@google.com> Mime-Version: 1.0 References: <20230509082244.1069623-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.521.gf1e218fcd8-goog Message-ID: <20230509082244.1069623-2-joychakr@google.com> Subject: [PATCH v10 1/5] spi: dw: Add 32 bpw support to SPI DW DMA driver From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add Support for AxSize =3D 4 bytes configuration from dw dma driver if n_bytes i.e. number of bytes per write to fifo is 4. Number of bytes written to fifo per write is depended on the bits/word configuration being used which the DW core driver translates to n_bytes. Hence, for bits per word values between 17 and 32 n_bytes should be equal to 4. Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-dma.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index ababb910b391..c1b42cb59965 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -208,12 +208,16 @@ static bool dw_spi_can_dma(struct spi_controller *mas= ter, =20 static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) { - if (n_bytes =3D=3D 1) + switch (n_bytes) { + case 1: return DMA_SLAVE_BUSWIDTH_1_BYTE; - else if (n_bytes =3D=3D 2) + case 2: return DMA_SLAVE_BUSWIDTH_2_BYTES; - - return DMA_SLAVE_BUSWIDTH_UNDEFINED; + case 4: + return DMA_SLAVE_BUSWIDTH_4_BYTES; + default: + return DMA_SLAVE_BUSWIDTH_UNDEFINED; + } } =20 static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) --=20 2.40.1.521.gf1e218fcd8-goog From nobody Wed Feb 11 12:14:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EFA6C77B7C for ; Tue, 9 May 2023 08:23:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234924AbjEIIXI (ORCPT ); Tue, 9 May 2023 04:23:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234818AbjEIIXD (ORCPT ); Tue, 9 May 2023 04:23:03 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D20CE74 for ; Tue, 9 May 2023 01:23:00 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-ba2b9ecfadaso4133167276.2 for ; Tue, 09 May 2023 01:23:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683620579; x=1686212579; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=/nzvqAVbvzYABlQomy5DkIxe057QBPgKkXg3X4iNsvg=; b=74iCI0aYEzxSweD/pJ6VE2M74d5b5ftirpEnpTpbs9MEwCxIV/Tu6pihyaVK9ctw0r fHXB7XWQLlttYkPQt2ql0qbKubqogTjwIqG7j+4rvdYp+wr+JrZ4adA+xZHBQSuGAARz nmtROMY+GjM40ZR/6YUQLcxFKZfjjXZTxiQVSt78NNV4x5veI/j7gqeBvjpd6h5e1TQE zwzfmqBvLrIOSXDy2iB6gvgtyhdVxG2q4o6wrNzXcXjQ/aBbSbSUGzdlASXO+/IHgtVM GhfyjN358hfST2G6VdFiRSURlpG4a+WxmhcG7YpCiUZLnffGa3Ws0MYsBbfKQ1SJVmPF NoIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683620579; x=1686212579; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=/nzvqAVbvzYABlQomy5DkIxe057QBPgKkXg3X4iNsvg=; b=hedOAtzefDxr1JijgPb6nwb22D+PDWKRO2EEF+3nsuwn3s6co91qIUxjpBwNiOSLK4 52oHdX+dwM6Dv3etMvIGQNzwIv8uDSNGUU4AGrTxdBEeqQHCHCUd302XmjIDyyA5ikV+ it2j2eR48BmM17jWhxXYjtMjHCqsTDfrRqgKvoUeafYb9EMwAc4azGE5yb4G8U7N5VRT nhQVb+pFIABIhyrWdASSA9CGOQTFqJbiGJgBEJ7EIeDRDBPPR8NWtYp/TxbiqQFrl7yW cWsKbop6Hs8Y/FV6Z/7LKONcgrYtrBufIqHAPE5Sr+H1t1Aa6Sj+CVoqn0RkeDc7l/SO v9kQ== X-Gm-Message-State: AC+VfDyqyhCu2/SJ9tpzxAHvV7BnMe5FQgsr4r4/GE2N6NexCq9cBvoy Tm2RwgTM9HNFBBpw11fnVM9RUOV7kNNFnw== X-Google-Smtp-Source: ACHHUZ5DNQpfNmGZyChoGWce/GXfQ0cokFwLzZ4T+lZuMJ4/yM1j1/owHCndVBMgWz6Kk5k8YRiYzFZ3Q6fsIg== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a25:d34b:0:b0:b8f:47c4:58ed with SMTP id e72-20020a25d34b000000b00b8f47c458edmr8460356ybf.9.1683620579716; Tue, 09 May 2023 01:22:59 -0700 (PDT) Date: Tue, 9 May 2023 08:22:41 +0000 In-Reply-To: <20230509082244.1069623-1-joychakr@google.com> Mime-Version: 1.0 References: <20230509082244.1069623-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.521.gf1e218fcd8-goog Message-ID: <20230509082244.1069623-3-joychakr@google.com> Subject: [PATCH v10 2/5] spi: dw: Move dw_spi_can_dma() From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move dw_spi_can_dma() implementation below dw_spi_dma_convert_width() for handing compile dependency in future patches. Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-dma.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index c1b42cb59965..f19c092920a1 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -198,14 +198,6 @@ static irqreturn_t dw_spi_dma_transfer_handler(struct = dw_spi *dws) return IRQ_HANDLED; } =20 -static bool dw_spi_can_dma(struct spi_controller *master, - struct spi_device *spi, struct spi_transfer *xfer) -{ - struct dw_spi *dws =3D spi_controller_get_devdata(master); - - return xfer->len > dws->fifo_len; -} - static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) { switch (n_bytes) { @@ -220,6 +212,14 @@ static enum dma_slave_buswidth dw_spi_dma_convert_widt= h(u8 n_bytes) } } =20 +static bool dw_spi_can_dma(struct spi_controller *master, + struct spi_device *spi, struct spi_transfer *xfer) +{ + struct dw_spi *dws =3D spi_controller_get_devdata(master); + + return xfer->len > dws->fifo_len; +} + static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) { unsigned long long ms; --=20 2.40.1.521.gf1e218fcd8-goog From nobody Wed Feb 11 12:14:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A83E8C77B75 for ; Tue, 9 May 2023 08:23:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230027AbjEIIXX (ORCPT ); Tue, 9 May 2023 04:23:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234852AbjEIIXK (ORCPT ); Tue, 9 May 2023 04:23:10 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC5CDD87C for ; Tue, 9 May 2023 01:23:04 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-ba2526a8918so5459744276.1 for ; Tue, 09 May 2023 01:23:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683620584; x=1686212584; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=dcm1xpxsxE4LsssubrxTulCcSjnntMYzhlXL+xNXQmE=; b=SC2w1S+a9UIFvlzG/TtznNrQM+SlztRpmqJCYhUvVl3bP2kqiZJcBIq0kELz0fcd6F lpHQOcplW4pxPwsm08WZ+PusejT5ou5sP7zuDP6CZ34i4FJePoNuzvqzn5sjkToZew9g yyXZmWogXOtCvOn336dxqH7oVGlk3eNt3udoThPp+93HOv+EaQIl7EBnaPGhewnQO2gW omPB3iQ/g8cmfJuDdSe2MpCVPFZtt8ymh1Q0eg9jntvPRvczEmU+Q+u0nolSgnCBEqT4 MI7PpWyia0BQe7RjZ9VisNlwJgDjIVk3l+6OTlwWB9phoNHq7gW4mTmEhsztDcRXvcJM saTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683620584; x=1686212584; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=dcm1xpxsxE4LsssubrxTulCcSjnntMYzhlXL+xNXQmE=; b=CtoqYBSwazQ0UVg9+Vr4qd4f0DwbnvkSEQX+isIs5WljTZK86vpK5crwIChvQgcTum fjD4gGNKQp75r6cKUXLSqYZiZZKeKk8eCg0wW4yvTdH7iXunUKSYLSR0iKeAgmEVRBAE Pef+yItAhx3HOClq6b8jdUq6z25LXqbQ4qooxSQgY7k+AhMLDjAVWCm9k0gPB/IZDWof fIguEKw75F2vttl4ncUGFS2UBIfOn/XYL777fUCmk10/bTb9LTnNPIbiK4WGFYNXIdb8 DWQTAWZbC953cJ4DMpWqIe+gprKLzR87k8ff7muYZ8Xjxg/EK2JK4qDgqdzfponKxmn6 Fxcw== X-Gm-Message-State: AC+VfDziBMaQEbMm33itS8m9X5dIgqVi8ZGdWl9/QtcaJMoMTKIlRlEt HdoccNhSizlSJQb+kl3OS4yZ7dV7sNlf7Q== X-Google-Smtp-Source: ACHHUZ46RppQQgJ01TXllCG2gYtUgp2+UZnaI8JBC7mylbwl0XYbPPxsC+foH0cfupc8K3+uDaaRwuIvl78z3A== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a5b:ed1:0:b0:b9a:6508:1b5f with SMTP id a17-20020a5b0ed1000000b00b9a65081b5fmr5769008ybs.11.1683620584172; Tue, 09 May 2023 01:23:04 -0700 (PDT) Date: Tue, 9 May 2023 08:22:42 +0000 In-Reply-To: <20230509082244.1069623-1-joychakr@google.com> Mime-Version: 1.0 References: <20230509082244.1069623-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.521.gf1e218fcd8-goog Message-ID: <20230509082244.1069623-4-joychakr@google.com> Subject: [PATCH v10 3/5] spi: dw: Add DMA directional capability check From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Check capabilities of DMA controller during init to make sure it is capable of handling MEM2DEV for tx channel, DEV2MEM for rx channel. Current DW DMA driver requires both tx and rx channel to be configured and functional for any kind of transfers to take effect including half duplex. Hence, check for both tx and rx direction and fail on unavailbility of either. Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-dma.c | 41 +++++++++++++++++++++++++++++++--------- 1 file changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index f19c092920a1..2363317a0dca 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -72,12 +72,22 @@ static void dw_spi_dma_maxburst_init(struct dw_spi *dws) dw_writel(dws, DW_SPI_DMATDLR, dws->txburst); } =20 -static void dw_spi_dma_sg_burst_init(struct dw_spi *dws) +static int dw_spi_dma_caps_init(struct dw_spi *dws) { - struct dma_slave_caps tx =3D {0}, rx =3D {0}; + struct dma_slave_caps tx, rx; + int ret; + + ret =3D dma_get_slave_caps(dws->txchan, &tx); + if (ret) + return ret; =20 - dma_get_slave_caps(dws->txchan, &tx); - dma_get_slave_caps(dws->rxchan, &rx); + ret =3D dma_get_slave_caps(dws->rxchan, &rx); + if (ret) + return ret; + + if (!(tx.directions & BIT(DMA_MEM_TO_DEV) && + rx.directions & BIT(DMA_DEV_TO_MEM))) + return -ENXIO; =20 if (tx.max_sg_burst > 0 && rx.max_sg_burst > 0) dws->dma_sg_burst =3D min(tx.max_sg_burst, rx.max_sg_burst); @@ -87,6 +97,8 @@ static void dw_spi_dma_sg_burst_init(struct dw_spi *dws) dws->dma_sg_burst =3D rx.max_sg_burst; else dws->dma_sg_burst =3D 0; + + return 0; } =20 static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws) @@ -95,6 +107,7 @@ static int dw_spi_dma_init_mfld(struct device *dev, stru= ct dw_spi *dws) struct dw_dma_slave dma_rx =3D { .src_id =3D 0 }, *rx =3D &dma_rx; struct pci_dev *dma_dev; dma_cap_mask_t mask; + int ret =3D -EBUSY; =20 /* * Get pci device for DMA controller, currently it could only @@ -124,20 +137,25 @@ static int dw_spi_dma_init_mfld(struct device *dev, s= truct dw_spi *dws) =20 init_completion(&dws->dma_completion); =20 - dw_spi_dma_maxburst_init(dws); + ret =3D dw_spi_dma_caps_init(dws); + if (ret) + goto free_txchan; =20 - dw_spi_dma_sg_burst_init(dws); + dw_spi_dma_maxburst_init(dws); =20 pci_dev_put(dma_dev); =20 return 0; =20 +free_txchan: + dma_release_channel(dws->txchan); + dws->txchan =3D NULL; free_rxchan: dma_release_channel(dws->rxchan); dws->rxchan =3D NULL; err_exit: pci_dev_put(dma_dev); - return -EBUSY; + return ret; } =20 static int dw_spi_dma_init_generic(struct device *dev, struct dw_spi *dws) @@ -163,12 +181,17 @@ static int dw_spi_dma_init_generic(struct device *dev= , struct dw_spi *dws) =20 init_completion(&dws->dma_completion); =20 - dw_spi_dma_maxburst_init(dws); + ret =3D dw_spi_dma_caps_init(dws); + if (ret) + goto free_txchan; =20 - dw_spi_dma_sg_burst_init(dws); + dw_spi_dma_maxburst_init(dws); =20 return 0; =20 +free_txchan: + dma_release_channel(dws->txchan); + dws->txchan =3D NULL; free_rxchan: dma_release_channel(dws->rxchan); dws->rxchan =3D NULL; --=20 2.40.1.521.gf1e218fcd8-goog From nobody Wed Feb 11 12:14:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BA6EC77B7C for ; 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Tue, 09 May 2023 01:23:09 -0700 (PDT) Date: Tue, 9 May 2023 08:22:43 +0000 In-Reply-To: <20230509082244.1069623-1-joychakr@google.com> Mime-Version: 1.0 References: <20230509082244.1069623-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.521.gf1e218fcd8-goog Message-ID: <20230509082244.1069623-5-joychakr@google.com> Subject: [PATCH v10 4/5] spi: dw: Add DMA address widths capability check From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Store address width capabilities of DMA controller during init and check the same per transfer to make sure the bits/word requirement can be met. Current DW DMA driver requires both tx and rx channel to be configured and functional hence a subset of both tx and rx channel address width capability is checked with the width requirement(n_bytes) for a transfer. Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-dma.c | 15 ++++++++++++++- drivers/spi/spi-dw.h | 1 + 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index 2363317a0dca..df819652901a 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -98,6 +98,13 @@ static int dw_spi_dma_caps_init(struct dw_spi *dws) else dws->dma_sg_burst =3D 0; =20 + /* + * Assuming both channels belong to the same DMA controller hence the + * peripheral side address width capabilities most likely would be + * the same. + */ + dws->dma_addr_widths =3D tx.dst_addr_widths & rx.src_addr_widths; + return 0; } =20 @@ -239,8 +246,14 @@ static bool dw_spi_can_dma(struct spi_controller *mast= er, struct spi_device *spi, struct spi_transfer *xfer) { struct dw_spi *dws =3D spi_controller_get_devdata(master); + enum dma_slave_buswidth dma_bus_width; + + if (xfer->len <=3D dws->fifo_len) + return false; + + dma_bus_width =3D dw_spi_dma_convert_width(dws->n_bytes); =20 - return xfer->len > dws->fifo_len; + return dws->dma_addr_widths & BIT(dma_bus_width); } =20 static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 9e8eb2b52d5c..3962e6dcf880 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -190,6 +190,7 @@ struct dw_spi { struct dma_chan *rxchan; u32 rxburst; u32 dma_sg_burst; + u32 dma_addr_widths; unsigned long dma_chan_busy; dma_addr_t dma_addr; /* phy address of the Data register */ const struct dw_spi_dma_ops *dma_ops; --=20 2.40.1.521.gf1e218fcd8-goog From nobody Wed Feb 11 12:14:17 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7370C77B75 for ; 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Tue, 09 May 2023 01:23:13 -0700 (PDT) Date: Tue, 9 May 2023 08:22:44 +0000 In-Reply-To: <20230509082244.1069623-1-joychakr@google.com> Mime-Version: 1.0 References: <20230509082244.1069623-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.521.gf1e218fcd8-goog Message-ID: <20230509082244.1069623-6-joychakr@google.com> Subject: [PATCH v10 5/5] spi: dw: Round of n_bytes to power of 2 From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" n_bytes variable in the driver represents the number of bytes per word that needs to be sent/copied to fifo. Bits/word can be between 8 and 32 bits from the client but in memory they are a power of 2, same is mentioned in spi.h header: " * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). * This may be changed by the device's driver, or left at the * default (0) indicating protocol words are eight bit bytes. * The spi_transfer.bits_per_word can override this for each transfer. " Hence, round of n_bytes to a power of 2 to avoid values like 3 which would generate unalligned/odd accesses to memory/fifo. Fixes: a51acc2400d4 ("spi: dw: Add support for 32-bits max xfer size") Suggested-by: Andy Shevchenko Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-core.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index c3bfb6c84cab..4976e3b8923e 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -426,7 +426,10 @@ static int dw_spi_transfer_one(struct spi_controller *= master, int ret; =20 dws->dma_mapped =3D 0; - dws->n_bytes =3D DIV_ROUND_UP(transfer->bits_per_word, BITS_PER_BYTE); + dws->n_bytes =3D + roundup_pow_of_two(DIV_ROUND_UP(transfer->bits_per_word, + BITS_PER_BYTE)); + dws->tx =3D (void *)transfer->tx_buf; dws->tx_len =3D transfer->len / dws->n_bytes; dws->rx =3D transfer->rx_buf; --=20 2.40.1.521.gf1e218fcd8-goog