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The motorcomm phy (YT8531) supports the ability to adjust the drive strength of the rx_clk/rx_data, and the default strength may not be suitable for all boards. So add configurable options to better match the boards.(e.g. StarFive VisionFive 2) The first patch adds a description of dt-bingding, and the second patch adds YT8531's parsing and settings for pad-driver-strength-cfg. Changes since v1: Patch 1: - Renamed "rx-xxx-driver-strength" to "motorcomm,rx-xxx-driver-strength" (by Frank Sae) Patch 2: - Added default values for rxc/rxd driver strength (by Frank Sea/Andrew Lunn) - Added range checking when val is in DT (by Frank Sea/Andrew Lunn) Previous versions: v1 - https://patchwork.kernel.org/project/netdevbpf/cover/20230426063541.15378-1-samin.guo@starfivetech.com Samin Guo (2): dt-bindings: net: motorcomm: Add pad driver strength cfg net: phy: motorcomm: Add pad drive strength cfg support .../bindings/net/motorcomm,yt8xxx.yaml | 12 +++++ drivers/net/phy/motorcomm.c | 46 +++++++++++++++++++ 2 files changed, 58 insertions(+) base-commit: d3e1ee0e67e7603d36f4fa2fec6b881c01aabe89 -- 2.17.1
The motorcomm phy (YT8531) supports the ability to adjust the drive strength of the rx_clk/rx_data, the value range of pad driver strength is 0 to 7. Signed-off-by: Samin Guo <samin.guo@starfivetech.com> --- .../devicetree/bindings/net/motorcomm,yt8xxx.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml b/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml index XXXXXXX..XXXXXXX 100644 --- a/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml +++ b/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml @@ -XXX,XX +XXX,XX @@ properties: for a timer. type: boolean + motorcomm,rx-clk-driver-strength: + description: drive strength of rx_clk pad. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ] + default: 3 + + motorcomm,rx-data-driver-strength: + description: drive strength of rx_data/rx_ctl rgmii pad. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ] + default: 3 + motorcomm,tx-clk-adj-enabled: description: | This configuration is mainly to adapt to VF2 with JH7110 SoC. -- 2.17.1
The motorcomm phy (YT8531) supports the ability to adjust the drive strength of the rx_clk/rx_data, and the default strength may not be suitable for all boards. So add configurable options to better match the boards.(e.g. StarFive VisionFive 2) Signed-off-by: Samin Guo <samin.guo@starfivetech.com> --- drivers/net/phy/motorcomm.c | 46 +++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index XXXXXXX..XXXXXXX 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -XXX,XX +XXX,XX @@ */ #define YTPHY_WCR_TYPE_PULSE BIT(0) +#define YTPHY_PAD_DRIVE_STRENGTH_REG 0xA010 #define YTPHY_SYNCE_CFG_REG 0xA012 #define YT8521_SCR_SYNCE_ENABLE BIT(5) /* 1b0 output 25m clock @@ -XXX,XX +XXX,XX @@ #define YT8531_SCR_CLK_SRC_REF_25M 4 #define YT8531_SCR_CLK_SRC_SSC_25M 5 +#define YT8531_RGMII_RXC_DS_DEFAULT 0x3 +#define YT8531_RGMII_RXC_DS_MAX 0x7 +#define YT8531_RGMII_RXC_DS GENMASK(15, 13) +#define YT8531_RGMII_RXD_DS_DEFAULT 0x3 +#define YT8531_RGMII_RXD_DS_MAX 0x7 +#define YT8531_RGMII_RXD_DS_LOW GENMASK(5, 4) /* Bit 1/0 of rxd_ds */ +#define YT8531_RGMII_RXD_DS_HI BIT(12) /* Bit 2 of rxd_ds */ + /* Extended Register end */ #define YTPHY_DTS_OUTPUT_CLK_DIS 0 @@ -XXX,XX +XXX,XX @@ static int yt8531_config_init(struct phy_device *phydev) { struct device_node *node = phydev->mdio.dev.of_node; int ret; + u32 ds, val; ret = ytphy_rgmii_clk_delay_config_with_lock(phydev); if (ret < 0) @@ -XXX,XX +XXX,XX @@ static int yt8531_config_init(struct phy_device *phydev) return ret; } + ds = YT8531_RGMII_RXC_DS_DEFAULT; + if (!of_property_read_u32(node, "motorcomm,rx-clk-driver-strength", &val)) { + if (val > YT8531_RGMII_RXC_DS_MAX) + return -EINVAL; + + ds = val; + } + + ret = ytphy_modify_ext_with_lock(phydev, + YTPHY_PAD_DRIVE_STRENGTH_REG, + YT8531_RGMII_RXC_DS, + FIELD_PREP(YT8531_RGMII_RXC_DS, ds)); + if (ret < 0) + return ret; + + ds = FIELD_PREP(YT8531_RGMII_RXD_DS_LOW, YT8531_RGMII_RXD_DS_DEFAULT); + if (!of_property_read_u32(node, "motorcomm,rx-data-driver-strength", &val)) { + if (val > YT8531_RGMII_RXD_DS_MAX) + return -EINVAL; + + if (val > FIELD_MAX(YT8531_RGMII_RXD_DS_LOW)) { + ds = val & FIELD_MAX(YT8531_RGMII_RXD_DS_LOW); + ds = FIELD_PREP(YT8531_RGMII_RXD_DS_LOW, ds); + ds |= YT8531_RGMII_RXD_DS_HI; + } else { + ds = FIELD_PREP(YT8531_RGMII_RXD_DS_LOW, val); + } + } + + ret = ytphy_modify_ext_with_lock(phydev, + YTPHY_PAD_DRIVE_STRENGTH_REG, + YT8531_RGMII_RXD_DS_LOW | YT8531_RGMII_RXD_DS_HI, + ds); + if (ret < 0) + return ret; + return 0; } -- 2.17.1
The motorcomm phy (YT8531) supports the ability to adjust the drive strength of the rx_clk/rx_data, and the default strength may not be suitable for all boards. So add configurable options to better match the boards.(e.g. StarFive VisionFive 2) The first patch adds a description of dt-bingding, and the second patch adds YT8531's parsing and settings for pad-driver-strength-cfg. 'Magic numbers' are used because we haven't been able to get real units from motorcomm yet, but similar usage has been found in Documentation/devicetree/bindings/net/qca,ar803x.yaml. qca,clk-out-strength: description: Clock output driver strength. $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 2] Changes since v2: Patch 2: - Readjusted the order of YT8531_RGMII_xxx to below YTPHY_PAD_DRIVE_STRENGTH_REG (by Frank Sae) - Reversed Christmas tree, sort these longest first, shortest last (by Andrew Lunn) - Rebased on tag v6.4 Changes since v1: Patch 1: - Renamed "rx-xxx-driver-strength" to "motorcomm,rx-xxx-driver-strength" (by Frank Sae) Patch 2: - Added default values for rxc/rxd driver strength (by Frank Sea/Andrew Lunn) - Added range checking when val is in DT (by Frank Sea/Andrew Lunn) Previous versions: v1 - https://patchwork.kernel.org/project/netdevbpf/cover/20230426063541.15378-1-samin.guo@starfivetech.com v2 - https://patchwork.kernel.org/project/netdevbpf/cover/20230505090558.2355-1-samin.guo@starfivetech.com Samin Guo (2): dt-bindings: net: motorcomm: Add pad driver strength cfg net: phy: motorcomm: Add pad drive strength cfg support .../bindings/net/motorcomm,yt8xxx.yaml | 12 +++++ drivers/net/phy/motorcomm.c | 46 +++++++++++++++++++ 2 files changed, 58 insertions(+) base-commit: 3201bee3a7171617da7cdbce06c428fb628c9944 -- 2.17.1
The motorcomm phy (YT8531) supports the ability to adjust the drive strength of the rx_clk/rx_data, the value range of pad driver strength is 0 to 7. Signed-off-by: Samin Guo <samin.guo@starfivetech.com> --- .../devicetree/bindings/net/motorcomm,yt8xxx.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml b/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml index XXXXXXX..XXXXXXX 100644 --- a/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml +++ b/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml @@ -XXX,XX +XXX,XX @@ properties: for a timer. type: boolean + motorcomm,rx-clk-driver-strength: + description: drive strength of rx_clk pad. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ] + default: 3 + + motorcomm,rx-data-driver-strength: + description: drive strength of rx_data/rx_ctl rgmii pad. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ] + default: 3 + motorcomm,tx-clk-adj-enabled: description: | This configuration is mainly to adapt to VF2 with JH7110 SoC. -- 2.17.1
The motorcomm phy (YT8531) supports the ability to adjust the drive strength of the rx_clk/rx_data, and the default strength may not be suitable for all boards. So add configurable options to better match the boards.(e.g. StarFive VisionFive 2) Signed-off-by: Samin Guo <samin.guo@starfivetech.com> --- drivers/net/phy/motorcomm.c | 46 +++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index XXXXXXX..XXXXXXX 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -XXX,XX +XXX,XX @@ */ #define YTPHY_WCR_TYPE_PULSE BIT(0) +#define YTPHY_PAD_DRIVE_STRENGTH_REG 0xA010 +#define YT8531_RGMII_RXC_DS_DEFAULT 0x3 +#define YT8531_RGMII_RXC_DS_MAX 0x7 +#define YT8531_RGMII_RXC_DS GENMASK(15, 13) +#define YT8531_RGMII_RXD_DS_DEFAULT 0x3 +#define YT8531_RGMII_RXD_DS_MAX 0x7 +#define YT8531_RGMII_RXD_DS_LOW GENMASK(5, 4) /* Bit 1/0 of rxd_ds */ +#define YT8531_RGMII_RXD_DS_HI BIT(12) /* Bit 2 of rxd_ds */ + #define YTPHY_SYNCE_CFG_REG 0xA012 #define YT8521_SCR_SYNCE_ENABLE BIT(5) /* 1b0 output 25m clock @@ -XXX,XX +XXX,XX @@ static int yt8521_config_init(struct phy_device *phydev) static int yt8531_config_init(struct phy_device *phydev) { struct device_node *node = phydev->mdio.dev.of_node; + u32 ds, val; int ret; ret = ytphy_rgmii_clk_delay_config_with_lock(phydev); @@ -XXX,XX +XXX,XX @@ static int yt8531_config_init(struct phy_device *phydev) return ret; } + ds = YT8531_RGMII_RXC_DS_DEFAULT; + if (!of_property_read_u32(node, "motorcomm,rx-clk-driver-strength", &val)) { + if (val > YT8531_RGMII_RXC_DS_MAX) + return -EINVAL; + + ds = val; + } + + ret = ytphy_modify_ext_with_lock(phydev, + YTPHY_PAD_DRIVE_STRENGTH_REG, + YT8531_RGMII_RXC_DS, + FIELD_PREP(YT8531_RGMII_RXC_DS, ds)); + if (ret < 0) + return ret; + + ds = FIELD_PREP(YT8531_RGMII_RXD_DS_LOW, YT8531_RGMII_RXD_DS_DEFAULT); + if (!of_property_read_u32(node, "motorcomm,rx-data-driver-strength", &val)) { + if (val > YT8531_RGMII_RXD_DS_MAX) + return -EINVAL; + + if (val > FIELD_MAX(YT8531_RGMII_RXD_DS_LOW)) { + ds = val & FIELD_MAX(YT8531_RGMII_RXD_DS_LOW); + ds = FIELD_PREP(YT8531_RGMII_RXD_DS_LOW, ds); + ds |= YT8531_RGMII_RXD_DS_HI; + } else { + ds = FIELD_PREP(YT8531_RGMII_RXD_DS_LOW, val); + } + } + + ret = ytphy_modify_ext_with_lock(phydev, + YTPHY_PAD_DRIVE_STRENGTH_REG, + YT8531_RGMII_RXD_DS_LOW | YT8531_RGMII_RXD_DS_HI, + ds); + if (ret < 0) + return ret; + return 0; } -- 2.17.1