From nobody Wed Feb 11 19:46:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B004C77B7C for ; Thu, 4 May 2023 20:40:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230361AbjEDUkV (ORCPT ); Thu, 4 May 2023 16:40:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53014 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229797AbjEDUjt (ORCPT ); Thu, 4 May 2023 16:39:49 -0400 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4333317DC7; Thu, 4 May 2023 13:34:33 -0700 (PDT) Received: from mx0.riseup.net (mx0-pn.riseup.net [10.0.1.42]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx1.riseup.net (Postfix) with ESMTPS id 4QC5BJ1WsCzDqLq; Thu, 4 May 2023 20:33:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1683232424; bh=HyW6f1Ejq4tIEj0Ox1OW5zxpUg9RZUeQecRE7TjEwF8=; h=From:Date:Subject:To:Cc:From; b=dAl8oQX2qAEHubEYq6oYv3DfQfX/+qJnsmMSiN5saAnk4kfl6/pBBvOmksVv0htu1 wW4ttzpct9SOdt1gFTaoG4fMq6LN6SHV3l6zmBqTSPgiytos55v1fPvfMb3yRnUl1t tMP9cjyJi4ZCC7TgP2O9/OgJxo000lqT0zmKAnKQ= Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx0.riseup.net (Postfix) with ESMTPS id 4QC5B55pNSz9sBP; Thu, 4 May 2023 20:33:33 +0000 (UTC) X-Riseup-User-ID: 17BAC0AD338C584C9D8A37E6AB80C09961D7D9D8A9766880A1B9198BED57A7C1 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4QC5B32NmnzJmmZ; Thu, 4 May 2023 20:33:31 +0000 (UTC) From: Dang Huynh Date: Fri, 05 May 2023 03:33:25 +0700 Subject: [PATCH] arm64: dts: qcom: Add Fxtec Pro1X (QX1050) DTS MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230505-fxtec-pro1x-support-v1-1-1d9473b4d6e4@riseup.net> X-B4-Tracking: v=1; b=H4sIAJQWVGQC/y2NQQrCMBBFr1Jm7cA0trR6FXGRxonNJgkzUQKld zdVlw/e+38DZQmscO02EH4HDSk26E8duNXGJ2N4NAZD5kwjjehrYYdZUl9RXzknKTj5aTaehpn 4Aq1crDIuYqNbj/YnR67lvzIcUhb2oX6vb/d9/wDvQu6uigAAAA== To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh X-Developer-Signature: v=1; a=openpgp-sha256; l=7528; i=danct12@riseup.net; h=from:subject:message-id; bh=HyW6f1Ejq4tIEj0Ox1OW5zxpUg9RZUeQecRE7TjEwF8=; b=owEBbQKS/ZANAwAIAWbKt+qkXdeBAcsmYgBkVBaaPpPJMYIY1wbiV1ji1jBAYSuMBqoO18GbO lXiN4rFR0KJAjMEAAEIAB0WIQTwmpM8D+AzHlWMpOFmyrfqpF3XgQUCZFQWmgAKCRBmyrfqpF3X gWPLD/0XkeWj9WmEuWXv7CvwienhcZvD6vBAsGlA8g21K7qT+CtfVQT/sBq/kwt0h9kun6MiL3o 8draZioUlagREn3E1YyrzzUpbnJlL1m40A/k0FAOS4q5QC+u9t6M1rboHDEBWTHdmIdYZ6YiTaH ogqO3cHkAD8gWDu9lyu2RgxlVvMfPxYhRA4JOf6ZJI8JoN/TgXdrRiDvgFUhElF/BvbE0EShEIw i2OCCXwlPjyDeBou6qJkHkhQFK9H4uGYzM+XGtWSJbnqaCfKpm6HdyxsJotVNfreUck0H+9na7K QeYn6OqoX+2o6uuuQOAW+IfkdGwvUco9op+q74ztjDJZdz3JR1GFnp6DKx8FggyEQPkWXlir6B9 Jn5m1sTFFOjvlgA5hUNJZ8HUwuf87S72ApoKOj1oHgE0h3KOlc+tRAgI18QBMFLKqfdylUCCX0x HlX0gC9MpzYacAfzMscJHAJ5NFx3cOf3EUVZMUbEexi59z/CS9IsXxHyQwFThKoI/gxatEXpN+c yCgNlYKL5kp8sNGCht4/869SF7DnsZ8Z5wuwrnZcp+65+ShNWZ1pjHIXRMF570XcSXMUVJeN8iE PWaWQju6dzg2QH5VVtw8eVmiyaB/TbNPZOaeGEb806duMjiFdZ7HS99mxdkYz7JFrXcbgluLoGb UjBD3LZPmcU4axw== X-Developer-Key: i=danct12@riseup.net; a=openpgp; fpr=F09A933C0FE0331E558CA4E166CAB7EAA45DD781 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The F(x)tec Pro1X is a mobile phone released by FX Technologies Ltd in 2022. The phone is exactly the same as the Pro1 released in 2019 with some changes: - MSM8998 -> SM6115 - Camera button is no longer multistate - Only one 48MP back camera - A new keyboard layout picked by the community. This commit has the following features working: - Display (using simplefb) - UFS - Power and volume buttons - Pinctrl - RPM Regulators - USB (Device Mode) To get a successful boot run: cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/\ sm6115-fxtec-pro1x.dtb > .Image.gz-dtb mkbootimg --kernel .Image.gz-dtb \ --ramdisk initrd.img \ --base 0x0 \ --kernel_offset 0x8000 \ --ramdisk_offset 0x1000000 \ --second_offset 0xf00000 \ --tags_offset 0x100 \ --pagesize 4096 \ --cmdline "CMDLINE HERE" \ -o qx1050-boot.img fastboot flash boot qx1050-boot.img fastboot erase dtbo fastboot reboot Signed-off-by: Dang Huynh Reviewed-by: Caleb Connolly --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 252 ++++++++++++++++++++= ++++ 2 files changed, 253 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index d42c59572ace..e311ba675f35 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -174,6 +174,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-shift-axolotl.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm850-lenovo-yoga-c630.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm850-samsung-w737.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm4250-oneplus-billie2.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sm6115-fxtec-pro1x.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm6115p-lenovo-j606f.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm6125-sony-xperia-seine-pdx201.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm6125-xiaomi-laurel-sprout.dtb diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/b= oot/dts/qcom/sm6115-fxtec-pro1x.dts new file mode 100644 index 000000000000..f1d18710d2f0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -0,0 +1,252 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023, Dang Huynh + */ + +/dts-v1/; + +#include "sm6115.dtsi" +#include "pm6125.dtsi" + +/ { + model =3D "F(x)tec Pro1 (QX1050)"; + compatible =3D "fxtec,pro1x", "qcom,sm6115"; + chassis-type =3D "handset"; + + /* required for bootloader to select correct board */ + qcom,msm-id =3D <417 0x10000>, <444 0x10000>; + qcom,board-id =3D <34 0>; + + aliases { + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + framebuffer0: framebuffer@5c000000 { + compatible =3D "simple-framebuffer"; + reg =3D <0 0x5c000000 0 (1080 * 2160 * 4)>; + width =3D <1080>; + height =3D <2160>; + stride =3D <(1080 * 4)>; + format =3D "a8r8g8b8"; + clocks =3D <&gcc GCC_DISP_HF_AXI_CLK>; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vol_up_n>; + + key-volume-up { + label =3D "Volume Up"; + linux,code =3D ; + gpios =3D <&pm6125_gpios 5 GPIO_ACTIVE_LOW>; + debounce-interval =3D <15>; + linux,can-disable; + gpio-key,wakeup; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges =3D <0 4>, <14 4>; +}; + +&pm6125_gpios { + vol_up_n: vol-up-n-state { + pins =3D "gpio5"; + function =3D "normal"; + power-source =3D <0>; + bias-pull-up; + input-enable; + }; +}; + +&dispcc { + /* HACK: disable until a panel driver is ready to retain simplefb */ + status =3D "disabled"; +}; + +&pon_pwrkey { + status =3D "okay"; +}; + +&pon_resin { + linux,code =3D ; + status =3D "okay"; +}; + +&rpm_requests { + pm6125-regulators { + compatible =3D "qcom,rpm-pm6125-regulators"; + + vreg_s6a: s6 { + regulator-min-microvolt =3D <304000>; + regulator-max-microvolt =3D <1456000>; + }; + + vreg_s7a: s7 { + regulator-min-microvolt =3D <1280000>; + regulator-max-microvolt =3D <2040000>; + }; + + vreg_s8a: s8 { + regulator-min-microvolt =3D <1064000>; + regulator-max-microvolt =3D <1304000>; + }; + + vreg_l1a: l1 { + regulator-min-microvolt =3D <952000>; + regulator-max-microvolt =3D <1152000>; + }; + + vreg_l4a: l4 { + regulator-min-microvolt =3D <488000>; + regulator-max-microvolt =3D <1000000>; + }; + + vreg_l5a: l5 { + regulator-min-microvolt =3D <1648000>; + regulator-max-microvolt =3D <3056000>; + }; + + vreg_l6a: l6 { + regulator-min-microvolt =3D <576000>; + regulator-max-microvolt =3D <656000>; + }; + + vreg_l7a: l7 { + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1304000>; + }; + + vreg_l8a: l8 { + regulator-min-microvolt =3D <400000>; + regulator-max-microvolt =3D <728000>; + }; + + vreg_l9a: l9 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2000000>; + }; + + vreg_l10a: l10 { + regulator-min-microvolt =3D <1704000>; + regulator-max-microvolt =3D <1904000>; + }; + + vreg_l11a: l11 { + regulator-min-microvolt =3D <1704000>; + regulator-max-microvolt =3D <1952000>; + }; + + vreg_l12a: l12 { + regulator-min-microvolt =3D <1624000>; + regulator-max-microvolt =3D <1984000>; + }; + + vreg_l13a: l13 { + regulator-min-microvolt =3D <1504000>; + regulator-max-microvolt =3D <1952000>; + }; + + vreg_l14a: l14 { + regulator-min-microvolt =3D <1704000>; + regulator-max-microvolt =3D <1904000>; + }; + + vreg_l15a: l15 { + regulator-min-microvolt =3D <2920000>; + regulator-max-microvolt =3D <3232000>; + }; + + vreg_l16a: l16 { + regulator-min-microvolt =3D <1704000>; + regulator-max-microvolt =3D <1904000>; + }; + + vreg_l17a: l17 { + regulator-min-microvolt =3D <1152000>; + regulator-max-microvolt =3D <1384000>; + }; + + vreg_l18a: l18 { + regulator-min-microvolt =3D <1104000>; + regulator-max-microvolt =3D <1312000>; + }; + + vreg_l19a: l19 { + regulator-min-microvolt =3D <1624000>; + regulator-max-microvolt =3D <3304000>; + }; + + vreg_l20a: l20 { + regulator-min-microvolt =3D <1624000>; + regulator-max-microvolt =3D <3304000>; + }; + + vreg_l21a: l21 { + regulator-min-microvolt =3D <2400000>; + regulator-max-microvolt =3D <3600000>; + }; + + vreg_l22a: l22 { + regulator-min-microvolt =3D <2952000>; + regulator-max-microvolt =3D <3304000>; + }; + + vreg_l23a: l23 { + regulator-min-microvolt =3D <3200000>; + regulator-max-microvolt =3D <3400000>; + }; + + vreg_l24a: l24 { + regulator-min-microvolt =3D <2704000>; + regulator-max-microvolt =3D <3600000>; + }; + }; +}; + +&xo_board { + clock-frequency =3D <19200000>; +}; + +&sleep_clk { + clock-frequency =3D <32764>; +}; + +&ufs_mem_hc { + vcc-supply =3D <&vreg_l24a>; + vcc-max-microamp =3D <600000>; + vccq2-supply =3D <&vreg_l11a>; + vccq2-max-microamp =3D <600000>; + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l4a>; + vdda-pll-supply =3D <&vreg_l12a>; + vddp-ref-clk-supply =3D <&vreg_l18a>; + status =3D "okay"; +}; + +&usb { + status =3D "okay"; +}; + +&usb_dwc3 { + maximum-speed =3D "high-speed"; + dr_mode =3D "peripheral"; +}; + +&usb_hsphy { + vdd-supply =3D <&vreg_l4a>; + vdda-pll-supply =3D <&vreg_l12a>; + vdda-phy-dpdm-supply =3D <&vreg_l15a>; + status =3D "okay"; +}; --- base-commit: 145e5cddfe8b4bf607510b2dcf630d95f4db420f change-id: 20230505-fxtec-pro1x-support-7f782f0480e9 Best regards, --=20 Dang Huynh