From nobody Tue Feb 10 20:06:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE146C77B7F for ; Wed, 3 May 2023 11:49:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229889AbjECLt4 (ORCPT ); Wed, 3 May 2023 07:49:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229822AbjECLti (ORCPT ); Wed, 3 May 2023 07:49:38 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D6775B84 for ; Wed, 3 May 2023 04:49:37 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6453866031E5; Wed, 3 May 2023 12:49:35 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683114576; bh=GI1WJxVOl3swr2e2GMbKqjPTZ/N2aCR8nJYx2FRWVnI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hm8mS3gOq5f7THMNCsmO2/mLQkNH3+9EZBs0U8T9hyOae8oEGwmkSwWpCHGCm1ZcF Y65nk2s8X5kmKfmkpOy626sLdwKFMaWxMf1QqlT9ExljujVUQOFuKkBc5r9uWO3aUh iBHplaTwCl355ckw7su+QW4cfKMODnZZqSH7bw9AcIkyGjZ+W8qHVYQV94e9HfNNX5 Ev8sm6krRsVtf7Ea0/e4ZOXfRFmQbxVBxTDAT13FHoXfC00knkeSlCr+4E84Rqukcx VIiwimnWS3LlC34Dgql289joce7Nec3Ut8xGoZKxVAWetDFuMiKgISW9HoRboRRKA0 C8twcgNDAf0QA== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, wenst@chromium.org, kernel@collabora.com Subject: [PATCH v2 07/11] drm/mediatek: gamma: Support specifying number of bits per LUT component Date: Wed, 3 May 2023 13:49:19 +0200 Message-Id: <20230503114923.156985-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230503114923.156985-1-angelogioacchino.delregno@collabora.com> References: <20230503114923.156985-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" New SoCs, like MT8195, not only may support bigger lookup tables, but have got a different register layout to support bigger precision: support specifying the number of `lut_bits` for each SoC and use it in mtk_gamma_set_common() to perform the right calculation. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/me= diatek/mtk_disp_gamma.c index 1436e2c860cb..a655373d568d 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -39,6 +39,7 @@ struct mtk_disp_gamma_data { bool has_dither; bool lut_diff; u16 lut_size; + u8 lut_bits; }; =20 /* @@ -84,6 +85,7 @@ void mtk_gamma_set_common(struct device *dev, void __iome= m *regs, struct drm_crt void __iomem *lut_base; bool lut_diff; u16 lut_size; + u8 lut_bits; u32 cfg_val, word; =20 /* If there's no gamma lut there's nothing to do here. */ @@ -92,9 +94,11 @@ void mtk_gamma_set_common(struct device *dev, void __iom= em *regs, struct drm_crt =20 if (gamma && gamma->data) { lut_diff =3D gamma->data->lut_diff; + lut_bits =3D gamma->data->lut_bits; lut_size =3D gamma->data->lut_size; } else { lut_diff =3D false; + lut_bits =3D LUT_BITS_DEFAULT; lut_size =3D LUT_SIZE_DEFAULT; } =20 @@ -104,9 +108,9 @@ void mtk_gamma_set_common(struct device *dev, void __io= mem *regs, struct drm_crt for (i =3D 0; i < lut_size; i++) { struct drm_color_lut diff, hwlut; =20 - hwlut.red =3D drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT); - hwlut.green =3D drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT); - hwlut.red =3D drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT); + hwlut.red =3D drm_color_lut_extract(lut[i].red, lut_bits); + hwlut.green =3D drm_color_lut_extract(lut[i].green, lut_bits); + hwlut.red =3D drm_color_lut_extract(lut[i].blue, lut_bits); =20 if (!lut_diff || (i % 2 =3D=3D 0)) { word =3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red); @@ -114,13 +118,13 @@ void mtk_gamma_set_common(struct device *dev, void __= iomem *regs, struct drm_crt word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue); } else { diff.red =3D lut[i].red - lut[i - 1].red; - diff.red =3D drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT); + diff.red =3D drm_color_lut_extract(diff.red, lut_bits); =20 diff.green =3D lut[i].green - lut[i - 1].green; - diff.green =3D drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT); + diff.green =3D drm_color_lut_extract(diff.green, lut_bits); =20 diff.blue =3D lut[i].blue - lut[i - 1].blue; - diff.blue =3D drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT); + diff.blue =3D drm_color_lut_extract(diff.blue, lut_bits); =20 word =3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red); word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green); @@ -237,10 +241,12 @@ static int mtk_disp_gamma_remove(struct platform_devi= ce *pdev) =20 static const struct mtk_disp_gamma_data mt8173_gamma_driver_data =3D { .has_dither =3D true, + .lut_bits =3D 10, .lut_size =3D 512, }; =20 static const struct mtk_disp_gamma_data mt8183_gamma_driver_data =3D { + .lut_bits =3D 10, .lut_diff =3D true, .lut_size =3D 512, }; --=20 2.40.1