From nobody Wed Feb 11 22:38:23 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96372C77B78 for ; Wed, 3 May 2023 15:20:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230421AbjECPUP (ORCPT ); Wed, 3 May 2023 11:20:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229490AbjECPUK (ORCPT ); Wed, 3 May 2023 11:20:10 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A09346AE for ; Wed, 3 May 2023 08:20:08 -0700 (PDT) Received: from dude02.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::28]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1puEH0-0004bF-U4; Wed, 03 May 2023 17:20:06 +0200 From: Marco Felsch Date: Wed, 03 May 2023 17:20:05 +0200 Subject: [PATCH 2/2] arm64: dts: add NXP i.MX8MM-EVKB support MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230503-b4-v6-3-topic-boards-imx8mm-evk-v1-2-1e15a371d374@pengutronix.de> References: <20230503-b4-v6-3-topic-boards-imx8mm-evk-v1-0-1e15a371d374@pengutronix.de> In-Reply-To: <20230503-b4-v6-3-topic-boards-imx8mm-evk-v1-0-1e15a371d374@pengutronix.de> To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Li Yang , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Johannes Schneider X-Mailer: b4 0.12.1 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::28 X-SA-Exim-Mail-From: m.felsch@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Johannes Schneider Add the i.MX8MM-EVKB [1] devicetree support. The EVKB is basically the same device except for the different used PMIC. [1] https://www.nxp.com/design/development-boards/ \ i-mx-evaluation-and-development-boards/ \ evaluation-kit-for-the-i-mx-8m-mini-applications-processor:8MMINILPD4-EVK Signed-off-by: Johannes Schneider [m.felsch@pengutronix.de: Adapt the commit message] [m.felsch@pengutronix.de: Include Shawns feedback] [m.felsch@pengutronix.de: Fix the regulator settings] Signed-off-by: Marco Felsch --- arch/arm64/boot/dts/freescale/Makefile | 1 + arch/arm64/boot/dts/freescale/imx8mm-evkb.dts | 128 ++++++++++++++++++++++= ++++ 2 files changed, 129 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 198fff3731ae..a054313761a4 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-data-modul-edm-sbc.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-ddr4-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-emcon-avari.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-evk.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-evkb.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-icore-mx8mm-ctouch2.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-icore-mx8mm-edimm2.2.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-innocomm-wb15-evk.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evkb.dts b/arch/arm64/boo= t/dts/freescale/imx8mm-evkb.dts new file mode 100644 index 000000000000..164df627a213 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-evkb.dts @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019-2020 NXP + */ + +/dts-v1/; + +#include "imx8mm-evk.dtsi" + +/ { + model =3D "FSL i.MX8MM EVKB"; + compatible =3D "fsl,imx8mm-evkb", "fsl,imx8mm"; +}; + +&i2c1 { + /delete-node/ pmic@4b; + + pmic@25 { + compatible =3D "nxp,pca9450a"; + reg =3D <0x25>; + pinctrl-0 =3D <&pinctrl_pmic>; + pinctrl-names =3D "default"; + interrupt-parent =3D <&gpio1>; + interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; + + regulators { + /* VDD_SOC with PCIe */ + buck1_reg: BUCK1 { + regulator-name =3D "BUCK1"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay =3D <3125>; + }; + + /* VDD_ARM */ + buck2_reg: BUCK2 { + regulator-name =3D "BUCK2"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay =3D <3125>; + nxp,dvs-standby-voltage =3D <850000>; + }; + + /* VDD_GPU, VDD_VPU, VDD_DRAM */ + buck3_reg: BUCK3 { + regulator-name =3D "BUCK3"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-boot-on; + regulator-always-on; + }; + + /* NVCC_3V3 */ + buck4_reg: BUCK4 { + regulator-name =3D "BUCK4"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_1V8, NVCC_1V8, NVCC_ENET */ + buck5_reg: BUCK5 { + regulator-name =3D "BUCK5"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + /* NVCC_DRAM for LPDDR4 */ + buck6_reg: BUCK6 { + regulator-name =3D "BUCK6"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + /* NVCC_SNVS_1P8 */ + ldo1_reg: LDO1 { + regulator-name =3D "LDO1"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_SNVS_0P8 */ + ldo2_reg: LDO2 { + regulator-name =3D "LDO2"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_*_1V8 */ + ldo3_reg: LDO3 { + regulator-name =3D "LDO3"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + /* VDD_PHY_0V9 */ + ldo4_reg: LDO4 { + regulator-name =3D "LDO4"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + regulator-boot-on; + regulator-always-on; + }; + + /* NVCC_SD2 */ + ldo5_reg: LDO5 { + regulator-name =3D "LDO5"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + }; + }; + }; +}; --=20 2.39.2