From nobody Thu Feb 12 03:19:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BECBC77B73 for ; Sun, 30 Apr 2023 09:22:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230325AbjD3JWj (ORCPT ); Sun, 30 Apr 2023 05:22:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230260AbjD3JW3 (ORCPT ); Sun, 30 Apr 2023 05:22:29 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 929222699 for ; Sun, 30 Apr 2023 02:22:24 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id 2adb3069b0e04-4f0108a7d20so1816612e87.3 for ; Sun, 30 Apr 2023 02:22:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682846542; x=1685438542; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=9UX6W3UfSa5ZRp8RtlXOP3rbOwpTJRUHBAtacedapPA=; b=K49pIBACcTBJG+8wY+XctIYgz9m7hvVAvkXHtirsNX1ThzYgORxbx9rX9y7bDg627F mMW0TZh+HkrJYpQd/8zq04wIXaEtOWBVeIM4rn3TJpDH2yhr3bdhyiJyEh0qSVHqzi6d 2zs4vO4b+FCDUt5qIku+KLEstriZcrdvZc5AbUuu1WV9UdovzGC3PFvs+t3i6seXaqnY p0sQi4CwZkttlYGoa39lFp5VY8koR9AYKxXsRiSE6t8MRXXVPyLT9ALlm51k6z0Bx7ly FwwJ198X1DrVW3P1xrYn15boUZNNeZcFV7xIERKC4JRjleyhnWFOw55+3ygY3FV+5GEw PhtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682846542; x=1685438542; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9UX6W3UfSa5ZRp8RtlXOP3rbOwpTJRUHBAtacedapPA=; b=b3YtAGBzilFRmlmqkekW5DiU6zhWq3VtqXnbtP/wlzor6e/4bVqATTzyMCPLlQU0uO RyiH6MY6mltsddxZrnxtf98LsTO5bLuc9q1J0LDjyU2c37y+WBH0uuq5BYArV+RHGdp/ 3ZonEJDKN266mgp8uOGSYJyc6q2E7tt3EaJpDkMQRbPTXYqUVp0wSCeP1Y4BGX1GfmXY dtuPwz6sLfVSccRv6VlJG4vnB1RaX9d+RhBuGv4JexrpEpRKY4mNw8z7Zw4KH/qxIcdf YbbWNXY1P6q6HLqUlguDRCPzGvnCR1HYHg5s/ABFQAAoeoLgCEDTwAu+8RFdjSWv1tTm nKvA== X-Gm-Message-State: AC+VfDxAQL1YcKOB3IL0FS2paFr75wYVLMkE2SvAqNOikkB1M9yYSKYx jUIr1uSf6gOFlQemFWvw5MV1HvP88dolXhDORno= X-Google-Smtp-Source: ACHHUZ5i1Hj12zld7832+ke0HKZEkcsm8zXYiACzaklV8NXfluT1ZrnmFfA5iGMDU41OJkgYcqf1fQ== X-Received: by 2002:ac2:51ae:0:b0:4ea:fabb:4db1 with SMTP id f14-20020ac251ae000000b004eafabb4db1mr2646875lfk.1.1682846542681; Sun, 30 Apr 2023 02:22:22 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id o2-20020a05651238a200b004ec62d9a7f9sm4077327lft.62.2023.04.30.02.22.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 30 Apr 2023 02:22:22 -0700 (PDT) From: Linus Walleij Date: Sun, 30 Apr 2023 11:22:19 +0200 Subject: [PATCH 4/4] ARM: omap1: Fix up the Nokia 770 board device IRQs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230430-nokia770-regression-v1-4-97704e36b094@linaro.org> References: <20230430-nokia770-regression-v1-0-97704e36b094@linaro.org> In-Reply-To: <20230430-nokia770-regression-v1-0-97704e36b094@linaro.org> To: Aaro Koskinen , Janusz Krzysztofik , Tony Lindgren , Russell King , Daniel Mack , Haojian Zhuang , Robert Jarzmik , Thomas Bogendoerfer , Dmitry Torokhov , Mark Brown , Bartosz Golaszewski , Andreas Kemnade , Helge Deller , Ulf Hansson Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-input@vger.kernel.org, linux-spi@vger.kernel.org, linux-fbdev@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mmc@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The platform devices on the Nokia 770 is using some board-specific IRQs that get statically assigned to platform devices in the boardfile. This does not work with dynamic IRQ chip bases. Utilize the NULL device to define some board-specific GPIO lookups and use these to immediately look up the same GPIOs, convert to IRQ numbers and pass as resources to the devices. This is ugly but should work. Fixes: 92bf78b33b0b ("gpio: omap: use dynamic allocation of base") Signed-off-by: Linus Walleij --- arch/arm/mach-omap1/board-nokia770.c | 58 +++++++++++++++++++++++++++-----= ---- 1 file changed, 44 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/boa= rd-nokia770.c index 53a4a44d5f4a..18a63c5a3dee 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -6,8 +6,8 @@ */ #include #include -#include #include +#include #include #include #include @@ -227,21 +227,28 @@ static struct i2c_board_info nokia770_i2c_board_info_= 2[] __initdata =3D { =20 static void __init nokia770_cbus_init(void) { - const int retu_irq_gpio =3D 62; - const int tahvo_irq_gpio =3D 40; - - if (gpio_request_one(retu_irq_gpio, GPIOF_IN, "Retu IRQ")) - return; - if (gpio_request_one(tahvo_irq_gpio, GPIOF_IN, "Tahvo IRQ")) { - gpio_free(retu_irq_gpio); - return; + struct gpio_desc *d; + int irq; + + d =3D gpiod_get(NULL, "retu_irq", GPIOD_IN); + if (IS_ERR(d)) { + pr_err("Unable to get CBUS Retu IRQ GPIO descriptor\n"); + } else { + irq =3D gpiod_to_irq(d); + irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); + nokia770_i2c_board_info_2[0].irq =3D irq; + } + d =3D gpiod_get(NULL, "tahvo_irq", GPIOD_IN); + if (IS_ERR(d)) { + pr_err("Unable to get CBUS Tahvo IRQ GPIO descriptor\n"); + } else { + irq =3D gpiod_to_irq(d); + irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); + nokia770_i2c_board_info_2[1].irq =3D irq; } - irq_set_irq_type(gpio_to_irq(retu_irq_gpio), IRQ_TYPE_EDGE_RISING); - irq_set_irq_type(gpio_to_irq(tahvo_irq_gpio), IRQ_TYPE_EDGE_RISING); - nokia770_i2c_board_info_2[0].irq =3D gpio_to_irq(retu_irq_gpio); - nokia770_i2c_board_info_2[1].irq =3D gpio_to_irq(tahvo_irq_gpio); i2c_register_board_info(2, nokia770_i2c_board_info_2, ARRAY_SIZE(nokia770_i2c_board_info_2)); + gpiod_add_lookup_table(&nokia770_cbus_gpio_table); platform_device_register(&nokia770_cbus_device); } @@ -251,8 +258,25 @@ static void __init nokia770_cbus_init(void) } #endif /* CONFIG_I2C_CBUS_GPIO */ =20 +static struct gpiod_lookup_table nokia770_irq_gpio_table =3D { + .dev_id =3D NULL, + .table =3D { + /* GPIO used by SPI device 1 */ + GPIO_LOOKUP("gpio-0-15", 15, "ads7846_irq", + GPIO_ACTIVE_HIGH), + /* GPIO used for retu IRQ */ + GPIO_LOOKUP("gpio-48-63", 15, "retu_irq", + GPIO_ACTIVE_HIGH), + /* GPIO used for tahvo IRQ */ + GPIO_LOOKUP("gpio-32-47", 8, "tahvo_irq", + GPIO_ACTIVE_HIGH), + }, +}; + static void __init omap_nokia770_init(void) { + struct gpio_desc *d; + /* On Nokia 770, the SleepX signal is masked with an * MPUIO line by default. It has to be unmasked for it * to become functional */ @@ -262,9 +286,15 @@ static void __init omap_nokia770_init(void) /* Unmask SleepX signal */ omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); =20 + gpiod_add_lookup_table(&nokia770_irq_gpio_table); platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); gpiod_add_lookup_table(&nokia770_ads7846_gpio_table); - nokia770_spi_board_info[1].irq =3D gpio_to_irq(15); + + d =3D gpiod_get(NULL, "ads7846_irq", GPIOD_IN); + if (IS_ERR(d)) + pr_err("Unable to get ADS7846 IRQ GPIO descriptor\n"); + else + nokia770_spi_board_info[1].irq =3D gpiod_to_irq(d); spi_register_board_info(nokia770_spi_board_info, ARRAY_SIZE(nokia770_spi_board_info)); omap_serial_init(); --=20 2.34.1