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Thu, 27 Apr 2023 17:21:07 +0200 From: Henning Schild To: Linus Walleij , Bartosz Golaszewski , , CC: Hans de Goede , Andy Shevchenko , Simon Guinot , Henning Schild , Xing Tong Wu Subject: [PATCH v2 1/1] gpio-f7188x: fix chip name and pin count on Nuvoton chip Date: Thu, 27 Apr 2023 17:20:55 +0200 Message-ID: <20230427152055.18380-2-henning.schild@siemens.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230427152055.18380-1-henning.schild@siemens.com> References: <20230427152055.18380-1-henning.schild@siemens.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [139.25.69.115] X-ClientProxiedBy: DEMCHDC8WBA.ad011.siemens.net (139.25.226.105) To DEMCHDC8WAA.ad011.siemens.net (139.25.226.104) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB5EUR01FT019:EE_|DB9PR10MB8076:EE_ X-MS-Office365-Filtering-Correlation-Id: d224baed-93d9-476f-61d9-08db47330690 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Apr 2023 15:21:08.1253 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d224baed-93d9-476f-61d9-08db47330690 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.76];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR01FT019.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR10MB8076 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In fact the device with chip id 0xD283 is called NCT6126D, and that is the chip id the Nuvoton code was written for. Correct that name to avoid confusion, because a NCT6116D in fact exists as well but has another chip id, and is currently not supported. The look at the spec also revealed that GPIO group7 in fact has 8 pins, so correct the pin count in that group as well. Fixes: d0918a84aff0 ("gpio-f7188x: Add GPIO support for Nuvoton NCT6116") Reported-by: Xing Tong Wu Signed-off-by: Henning Schild Acked-by: Simon Guinot --- drivers/gpio/Kconfig | 2 +- drivers/gpio/gpio-f7188x.c | 28 ++++++++++++++-------------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index badbe0582318..14b655411aa0 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -879,7 +879,7 @@ config GPIO_F7188X help This option enables support for GPIOs found on Fintek Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866. - As well as Nuvoton Super-I/O chip NCT6116D. + As well as Nuvoton Super-I/O chip NCT6126D. =20 To compile this driver as a module, choose M here: the module will be called f7188x-gpio. diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c index 9effa7769bef..f54ca5a1775e 100644 --- a/drivers/gpio/gpio-f7188x.c +++ b/drivers/gpio/gpio-f7188x.c @@ -48,7 +48,7 @@ /* * Nuvoton devices. */ -#define SIO_NCT6116D_ID 0xD283 /* NCT6116D chipset ID */ +#define SIO_NCT6126D_ID 0xD283 /* NCT6126D chipset ID */ =20 #define SIO_LD_GPIO_NUVOTON 0x07 /* GPIO logical device */ =20 @@ -62,7 +62,7 @@ enum chips { f81866, f81804, f81865, - nct6116d, + nct6126d, }; =20 static const char * const f7188x_names[] =3D { @@ -74,7 +74,7 @@ static const char * const f7188x_names[] =3D { "f81866", "f81804", "f81865", - "nct6116d", + "nct6126d", }; =20 struct f7188x_sio { @@ -187,8 +187,8 @@ static int f7188x_gpio_set_config(struct gpio_chip *chi= p, unsigned offset, /* Output mode register (0:open drain 1:push-pull). */ #define f7188x_gpio_out_mode(base) ((base) + 3) =20 -#define f7188x_gpio_dir_invert(type) ((type) =3D=3D nct6116d) -#define f7188x_gpio_data_single(type) ((type) =3D=3D nct6116d) +#define f7188x_gpio_dir_invert(type) ((type) =3D=3D nct6126d) +#define f7188x_gpio_data_single(type) ((type) =3D=3D nct6126d) =20 static struct f7188x_gpio_bank f71869_gpio_bank[] =3D { F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"), @@ -274,7 +274,7 @@ static struct f7188x_gpio_bank f81865_gpio_bank[] =3D { F7188X_GPIO_BANK(60, 5, 0x90, DRVNAME "-6"), }; =20 -static struct f7188x_gpio_bank nct6116d_gpio_bank[] =3D { +static struct f7188x_gpio_bank nct6126d_gpio_bank[] =3D { F7188X_GPIO_BANK(0, 8, 0xE0, DRVNAME "-0"), F7188X_GPIO_BANK(10, 8, 0xE4, DRVNAME "-1"), F7188X_GPIO_BANK(20, 8, 0xE8, DRVNAME "-2"), @@ -282,7 +282,7 @@ static struct f7188x_gpio_bank nct6116d_gpio_bank[] =3D= { F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"), F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"), F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"), - F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"), + F7188X_GPIO_BANK(70, 8, 0xFC, DRVNAME "-7"), }; =20 static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offs= et) @@ -490,9 +490,9 @@ static int f7188x_gpio_probe(struct platform_device *pd= ev) data->nr_bank =3D ARRAY_SIZE(f81865_gpio_bank); data->bank =3D f81865_gpio_bank; break; - case nct6116d: - data->nr_bank =3D ARRAY_SIZE(nct6116d_gpio_bank); - data->bank =3D nct6116d_gpio_bank; + case nct6126d: + data->nr_bank =3D ARRAY_SIZE(nct6126d_gpio_bank); + data->bank =3D nct6126d_gpio_bank; break; default: return -ENODEV; @@ -559,9 +559,9 @@ static int __init f7188x_find(int addr, struct f7188x_s= io *sio) case SIO_F81865_ID: sio->type =3D f81865; break; - case SIO_NCT6116D_ID: + case SIO_NCT6126D_ID: sio->device =3D SIO_LD_GPIO_NUVOTON; - sio->type =3D nct6116d; + sio->type =3D nct6126d; break; default: pr_info("Unsupported Fintek device 0x%04x\n", devid); @@ -569,7 +569,7 @@ static int __init f7188x_find(int addr, struct f7188x_s= io *sio) } =20 /* double check manufacturer where possible */ - if (sio->type !=3D nct6116d) { + if (sio->type !=3D nct6126d) { manid =3D superio_inw(addr, SIO_FINTEK_MANID); if (manid !=3D SIO_FINTEK_ID) { pr_debug("Not a Fintek device at 0x%08x\n", addr); @@ -581,7 +581,7 @@ static int __init f7188x_find(int addr, struct f7188x_s= io *sio) err =3D 0; =20 pr_info("Found %s at %#x\n", f7188x_names[sio->type], (unsigned int)addr); - if (sio->type !=3D nct6116d) + if (sio->type !=3D nct6126d) pr_info(" revision %d\n", superio_inb(addr, SIO_FINTEK_DEVREV)); =20 err: --=20 2.39.2