From nobody Thu Feb 12 08:01:34 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADF76C77B60 for ; Wed, 26 Apr 2023 10:30:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240454AbjDZK36 (ORCPT ); Wed, 26 Apr 2023 06:29:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229744AbjDZK3l (ORCPT ); Wed, 26 Apr 2023 06:29:41 -0400 Received: from mx.sberdevices.ru (mx.sberdevices.ru [45.89.227.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7504B49DD; Wed, 26 Apr 2023 03:29:39 -0700 (PDT) Received: from s-lin-edge02.sberdevices.ru (localhost [127.0.0.1]) by mx.sberdevices.ru (Postfix) with ESMTP id C65D65FD7B; Wed, 26 Apr 2023 13:29:37 +0300 (MSK) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sberdevices.ru; s=mail; t=1682504977; bh=2iTDEsndR82cnln9Q9SqkIaok7IFFDU8o3YeSEDTGF4=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type; b=UWTpX6duaX2IAVpAWjNY+DnGpWEl9biaL1HpLEZLhnPWQd/jmgFvtA3iUtcTECWhL jnvnlvuNHprUDG+ktoCUwdHZb13SylUlo9lKBdudwwuXH1Pe4slJqyZLo703hNW55g wXN5GtR7mKp5t7x2P4JhAKLRSNfa5ru9NSCj2csc86NG67suAlfUEuEhI4lTCM7r5z wUykuePqRAg2KKNoE5B8YbhGgvAhzn9+jdU6LIOQ7KnebKcDf26DQTkv6QDWmL35V/ 3kIS1G1C/lSsnHrIUsmOUGEtw1lJLjfiwMtJiO8cuY/tzdTbRMVKEbm6KbvDQhTI/r nSjkT05vE1vRA== Received: from S-MS-EXCH01.sberdevices.ru (S-MS-EXCH01.sberdevices.ru [172.16.1.4]) by mx.sberdevices.ru (Postfix) with ESMTP; Wed, 26 Apr 2023 13:29:37 +0300 (MSK) From: Dmitry Rokosov To: , , , , , , , , , , , CC: , , , , , , , , , , Dmitry Rokosov Subject: [PATCH v3 1/5] phy: amlogic: enable/disable clkin during Amlogic USB PHY init/exit Date: Wed, 26 Apr 2023 13:29:18 +0300 Message-ID: <20230426102922.19705-2-ddrokosov@sberdevices.ru> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20230426102922.19705-1-ddrokosov@sberdevices.ru> References: <20230426102922.19705-1-ddrokosov@sberdevices.ru> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [172.16.1.6] X-ClientProxiedBy: S-MS-EXCH02.sberdevices.ru (172.16.1.5) To S-MS-EXCH01.sberdevices.ru (172.16.1.4) X-KSMG-Rule-ID: 4 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Status: not scanned, disabled by settings X-KSMG-AntiSpam-Interceptor-Info: not scanned X-KSMG-AntiPhishing: not scanned, disabled by settings X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 1.1.2.30, bases: 2023/04/26 04:45:00 #21166225 X-KSMG-AntiVirus-Status: Clean, skipped Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Previously, all Amlogic boards used the XTAL clock as the default board clock for the USB PHY input, so there was no need to enable it. However, with the introduction of new Amlogic SoCs like the A1 family, the USB PHY now uses a gated clock. Hence, it is necessary to enable this gated clock during the PHY initialization sequence, or disable it during the PHY exit, as appropriate. Signed-off-by: Dmitry Rokosov Reviewed-by: Martin Blumenstingl --- drivers/phy/amlogic/phy-meson-g12a-usb2.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/phy/amlogic/phy-meson-g12a-usb2.c b/drivers/phy/amlogi= c/phy-meson-g12a-usb2.c index 9d1efa0d9394..ec2555bb83d5 100644 --- a/drivers/phy/amlogic/phy-meson-g12a-usb2.c +++ b/drivers/phy/amlogic/phy-meson-g12a-usb2.c @@ -172,10 +172,16 @@ static int phy_meson_g12a_usb2_init(struct phy *phy) int ret; unsigned int value; =20 - ret =3D reset_control_reset(priv->reset); + ret =3D clk_prepare_enable(priv->clk); if (ret) return ret; =20 + ret =3D reset_control_reset(priv->reset); + if (ret) { + clk_disable_unprepare(priv->clk); + return ret; + } + udelay(RESET_COMPLETE_TIME); =20 /* usb2_otg_aca_en =3D=3D 0 */ @@ -277,8 +283,13 @@ static int phy_meson_g12a_usb2_init(struct phy *phy) static int phy_meson_g12a_usb2_exit(struct phy *phy) { struct phy_meson_g12a_usb2_priv *priv =3D phy_get_drvdata(phy); + int ret; + + ret =3D reset_control_reset(priv->reset); + if (!ret) + clk_disable_unprepare(priv->clk); =20 - return reset_control_reset(priv->reset); + return ret; } =20 /* set_mode is not needed, mode setting is handled via the UTMI bus */ --=20 2.36.0