From nobody Thu Dec 18 10:35:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C20AC77B76 for ; Mon, 24 Apr 2023 19:50:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232947AbjDXTuS (ORCPT ); Mon, 24 Apr 2023 15:50:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232809AbjDXTtl (ORCPT ); Mon, 24 Apr 2023 15:49:41 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAA0D6EA1 for ; Mon, 24 Apr 2023 12:49:35 -0700 (PDT) Received: from ip4d1634d3.dynamic.kabel-deutschland.de ([77.22.52.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1pr2Bj-0006Mz-8z; Mon, 24 Apr 2023 21:49:27 +0200 From: Heiko Stuebner To: palmer@dabbelt.com, linux-riscv@lists.infradead.org, paul.walmsley@sifive.com Cc: heiko@sntech.de, kito.cheng@sifive.com, jrtc27@jrtc27.com, conor.dooley@microchip.com, matthias.bgg@gmail.com, heinrich.schuchardt@canonical.com, greentime.hu@sifive.com, nick.knight@sifive.com, christoph.muellner@vrull.eu, philipp.tomsich@vrull.eu, richard.henderson@linaro.org, arnd@arndb.de, linux-kernel@vger.kernel.org, Heiko Stuebner Subject: [PATCH 3/4] RISC-V: export the ISA string of the running machine in the aux vector Date: Mon, 24 Apr 2023 21:49:10 +0200 Message-Id: <20230424194911.264850-4-heiko.stuebner@vrull.eu> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230424194911.264850-1-heiko.stuebner@vrull.eu> References: <20230424194911.264850-1-heiko.stuebner@vrull.eu> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner Already defined aux-vectors regarding the machine type are AT_PLATFORM and AT_BASE_PLATFORM. PPC already uses AT_BASE_PLATFORM to identify the real platform the system is running on, so do a similar thing on RISC-V and export the ISA string of the running machine via this aux-vector element. This way userspace can possibly adapt to extensions that allow it to run certain loads more performantly. Signed-off-by: Heiko Stuebner Reviewed-by: Andrew Jones --- arch/riscv/include/asm/elf.h | 10 ++++++++++ arch/riscv/kernel/cpu.c | 12 ++++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index 30e7d2455960..820ef627e83d 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -78,6 +78,16 @@ extern unsigned long elf_hwcap; =20 #define COMPAT_ELF_PLATFORM (NULL) =20 +/* + * ELF_PLATFORM indicates the ISA supported by the platform, but has + * special meaning to ld.so . + * Expose the ISA string including all usable extensions via + * ELF_BASE_PLATFORM instead and allow userspace to adapt to them + * if needed. + */ +#define ELF_BASE_PLATFORM (riscv_base_platform) +extern const char *riscv_base_platform; + #ifdef CONFIG_MMU #define ARCH_DLINFO \ do { \ diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 06c2f587a176..71770563199f 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -118,8 +118,12 @@ static int riscv_cpuinfo_starting(unsigned int cpu) return 0; } =20 +const char *riscv_base_platform =3D NULL; +static char *riscv_create_isa_string(void); + static int __init riscv_cpuinfo_init(void) { + char *isa_str; int ret; =20 ret =3D cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "riscv/cpuinfo:starting", @@ -129,6 +133,14 @@ static int __init riscv_cpuinfo_init(void) return ret; } =20 + /* + * Create the isa-string with the common set of extensions over + * all harts, to expose as AT_BASE_PLATFORM in the aux vector. + */ + isa_str =3D riscv_create_isa_string(); + if (!IS_ERR(isa_str)) + riscv_base_platform =3D isa_str; + return 0; } arch_initcall(riscv_cpuinfo_init); --=20 2.39.0