From nobody Tue Dec 16 20:47:16 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1208C77B61 for ; Mon, 24 Apr 2023 08:40:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231312AbjDXIkQ (ORCPT ); Mon, 24 Apr 2023 04:40:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230072AbjDXIkN (ORCPT ); Mon, 24 Apr 2023 04:40:13 -0400 X-Greylist: delayed 1420 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Mon, 24 Apr 2023 01:40:10 PDT Received: from egress-ip4a.ess.de.barracuda.com (egress-ip4a.ess.de.barracuda.com [18.184.203.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BB131FD8 for ; Mon, 24 Apr 2023 01:40:10 -0700 (PDT) Received: from mail-io1-f71.google.com (mail-io1-f71.google.com [209.85.166.71]) by mx-outbound10-206.eu-central-1a.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 24 Apr 2023 08:39:28 +0000 Received: by mail-io1-f71.google.com with SMTP id ca18e2360f4ac-7606d6b2fddso702259939f.2 for ; Mon, 24 Apr 2023 01:39:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mistralsolutions.com; s=google; t=1682325567; x=1684917567; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EiE2A4//DbxZQ7lVU5qUMOosuU5KxI1VpQT9EEvu6k8=; b=Av6dCE6t80jplcMklvjZubwObZ9F8RwvGgag6D2xKRM5uW85QnvX2ROqzgX3gI7um5 hac9nkaf+2XhV/vJlnhn3wffeb0YqKkbIMgikxTarsOKmo9NjPRxsfScYJ0nB80HtOKy ubSNtIJrSAew7QTbizXyAt9HnpcoLf3NgdbD0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682325567; x=1684917567; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EiE2A4//DbxZQ7lVU5qUMOosuU5KxI1VpQT9EEvu6k8=; b=jIcqYqfA0+k1PYKQq5pF/yYbTMyJdh1vP86pZDQI5GYarXa6BwIJP2SA8ynSLdidgi 8r2YE0829D3KpFLicVAYltcooEHTVbZ/gmHx/JX9sVtbrYSDBwJCHgC5M7bCl2Xw5BUb roEWPJKtIfTFz+uBQce6QCJO8aY2Cg7O/fhb5n6OwN2G/6f2SAZyBQcSP9BR8x5wjmHk ROGb9wQcxD6hnndzFu92wW1/ncZ4zg59PzHq9mp8VGMWb86eb7v7gPco40cD0XVMyqJG GbmwNoPh+OuA5HBGiIwuTXN1tARx3eTlXsJVzY83J5r5X0widpxoQmLhUzyZDyAWtLIs oh7g== X-Gm-Message-State: AAQBX9fuo00HfHB4ohxCGpx5KL4mn886qOUb/0oq1n9kE/0g/Ruhqg66 MHjtjDv+OwCEX7lamGb3i9u5vqPMikKTAyINLV0mB4epJoQn6C1+KUkSth0T6IaVqw29DRQ2VMO tNLjjpVbI4yMaaeYCA8/MPpve4Qi6hYjdV2ycXbiXTfM01RGlfTICnVk3XmHv X-Received: by 2002:a17:902:aa87:b0:1a4:fc40:bef6 with SMTP id d7-20020a170902aa8700b001a4fc40bef6mr12715639plr.36.1682324154589; Mon, 24 Apr 2023 01:15:54 -0700 (PDT) X-Google-Smtp-Source: AKy350bd72n0dllaIWEHcGe5n8pW0pNoaRnxje5U6txXgl6lUStWkA6zPFgYvc5zPQRSCGluT8g3oQ== X-Received: by 2002:a17:902:aa87:b0:1a4:fc40:bef6 with SMTP id d7-20020a170902aa8700b001a4fc40bef6mr12715618plr.36.1682324154256; Mon, 24 Apr 2023 01:15:54 -0700 (PDT) Received: from localhost.localdomain ([49.207.195.237]) by smtp.gmail.com with ESMTPSA id x10-20020a1709029a4a00b001a9293597efsm6089868plv.246.2023.04.24.01.15.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Apr 2023 01:15:53 -0700 (PDT) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: Nishanth Menon , Tero Kristo , Rob Herring Cc: Vignesh Raghavendra , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sinthu Raja Subject: [PATCH V4 3/3] arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header Date: Mon, 24 Apr 2023 13:45:36 +0530 Message-Id: <20230424081536.12123-4-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230424081536.12123-1-sinthu.raja@ti.com> References: <20230424081536.12123-1-sinthu.raja@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-BESS-ID: 1682325567-302766-5454-1234-1 X-BESS-VER: 2019.1_20230419.1731 X-BESS-Apparent-Source-IP: 209.85.166.71 X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUirNy1bSUcovVrIyMTU1AbIygIIGBubGBsmpho kWZkaJlolGZuam5gZGaRaG5ikWJpapBkq1sQC+wbMHQQAAAA== X-BESS-BRTS-Status: 1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Sinthu Raja Add pinmux required to bring out the i2c and gpios on 40-pin RPi expansion header on the AM68 SK board. Signed-off-by: Sinthu Raja --- Changes in V4: * Correct the pinctrl node offsets as per the newly split wkup_pmx* and main_pmx* nodes. .../boot/dts/ti/k3-am68-sk-base-board.dts | 77 ++++++++++++++++++- 1 file changed, 76 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/= boot/dts/ti/k3-am68-sk-base-board.dts index a811a512262b..ff859b78def7 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -171,6 +171,32 @@ J721S2_IOPAD(0x0a0, PIN_INPUT, 0) /* (AB25) MCASP0_AXR= 12.MCAN7_RX */ J721S2_IOPAD(0x09c, PIN_INPUT, 0) /* (T24) MCASP0_AXR11.MCAN7_TX */ >; }; + + main_i2c4_pins_default: main-i2c4-pins-default { + pinctrl-single,pins =3D < + J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */ + J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */ + >; + }; + + rpi_header_gpio0_pins_default: rpi-header-gpio0-pins-default { + pinctrl-single,pins =3D < + J721S2_IOPAD(0x0a8, PIN_INPUT, 7) /* (U24) MCASP0_AXR14.GPIO0_42 */ + J721S2_IOPAD(0x090, PIN_INPUT, 7) /* (W24) MCASP0_AXR8.GPIO0_36 */ + J721S2_IOPAD(0x0bc, PIN_INPUT, 7) /* (V28) MCASP1_AFSX.GPIO0_47 */ + J721S2_IOPAD(0x06c, PIN_INPUT, 7) /* (V26) MCAN1_TX.GPIO0_27 */ + J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */ + J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */ + J721S2_IOPAD(0x0b8, PIN_INPUT, 7) /* (AA24) MCASP1_ACLKX.GPIO0_46 */ + J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */ + J721S2_IOPAD(0x034, PIN_INPUT, 7) /* (AD24) PMIC_WAKE0.GPIO0_13 */ + J721S2_IOPAD(0x0a4, PIN_INPUT, 7) /* (T23) MCASP0_AXR13.GPIO0_41 */ + J721S2_IOPAD(0x0c0, PIN_INPUT, 7) /* (T28) MCASP1_AXR0.GPIO0_48 */ + J721S2_IOPAD(0x0b4, PIN_INPUT, 7) /* (U25) MCASP1_AXR4.GPIO0_45 */ + J721S2_IOPAD(0x0cc, PIN_INPUT, 7) /* (AE27) SPI0_CS0.GPIO0_51 */ + J721S2_IOPAD(0x08c, PIN_INPUT, 7) /* (T25) MCASP0_AXR7.GPIO0_35 */ + >; + }; }; =20 &main_pmx1 { @@ -221,12 +247,46 @@ J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C23) WKUP= _GPIO0_4.MCU_MCAN1_TX*/ >; }; =20 + mcu_i2c0_pins_default: mcu-i2c0-pins-default { + pinctrl-single,pins =3D < + J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /*(H24) WKUP_GPIO0_63.MCU_I2C0_S= CL*/ + J721S2_WKUP_IOPAD(0x09C, PIN_INPUT, 0) /*(H27) WKUP_GPIO0_64.MCU_I2C0_S= DA*/ + >; + }; + mcu_i2c1_pins_default: mcu-i2c1-pins-default { pinctrl-single,pins =3D < J721S2_WKUP_IOPAD(0x078, PIN_INPUT, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_S= CL */ J721S2_WKUP_IOPAD(0x07c, PIN_INPUT, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_S= DA */ >; }; + + mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-pins0-default { + pinctrl-single,pins =3D < + J721S2_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */ + J721S2_WKUP_IOPAD(0x05C, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_= 1 */ + J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) MCU_SPI1_D1.WKUP_GPIO0_= 2 */ + J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) MCU_SPI1_CLK.WKUP_GPIO0= _0 */ + J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0= _15*/ + J721S2_WKUP_IOPAD(0x0B8, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */ + J721S2_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (J26) WKUP_GPIO0_57 */ + J721S2_WKUP_IOPAD(0x11C, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */ + J721S2_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (C27) MCU_SPI1_CS0.WKUP_GPIO0= _3 */ + >; + }; +}; + +&wkup_pmx3 { + mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-pins1-default { + pinctrl-single,pins =3D < + J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */ + >; + }; +}; + +&main_gpio0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rpi_header_gpio0_pins_default>; }; =20 &main_gpio2 { @@ -242,7 +302,8 @@ &main_gpio6 { }; =20 &wkup_gpio0 { - status =3D "disabled"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mcu_rpi_header_gpio0_pins0_default &mcu_rpi_header_gpio0_= pins1_default>; }; =20 &wkup_gpio1 { @@ -278,6 +339,20 @@ exp1: gpio@21 { }; }; =20 +&main_i2c4 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_i2c4_pins_default>; + clock-frequency =3D <400000>; +}; + +&mcu_i2c0 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mcu_i2c0_pins_default>; + clock-frequency =3D <400000>; +}; + &main_sdhci0 { /* Unused */ status =3D "disabled"; --=20 2.36.1