From nobody Sat Sep 21 00:14:28 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84DDDC77B71 for ; Fri, 21 Apr 2023 14:38:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232757AbjDUOit (ORCPT ); Fri, 21 Apr 2023 10:38:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232814AbjDUOhz (ORCPT ); Fri, 21 Apr 2023 10:37:55 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E1501446D; Fri, 21 Apr 2023 07:37:26 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-506bdf29712so12863101a12.0; Fri, 21 Apr 2023 07:37:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087846; x=1684679846; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BFh2cVYNVWNH2e/B2Q9MnHN00EOGUMNPev4l4KjaQPQ=; b=Eji7XoaMdAzuLZN23yCesTBFPa6Gx7VFBSGwOlbm/mx/yEJNkFWxiSoy9sZbvFQTDH R2EopPYhnBw+zEqsC4T4JFkh+694rd14o1UvM9MwCZf/PlBPn94u7J6jP9yQBjyXGtV/ zOqtHTFzvaAjPCUoWT2D32fCkRLRJm69Oac5h4L5mqxz8aWc2A27GxS/4rPBlkdn+J8B BBUQ9JlQkva8CaildHU7EdmGper61dY/YdcEp+vaEgCQpP8NuOhV3vjBE5B1592O4BcM J4lj4YYfzyhekhv78/Gah9fer+cNGvjrHJNLtUQHjurp1KtykNLJG5S50xOq1H4xv2Ui QJYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087846; x=1684679846; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BFh2cVYNVWNH2e/B2Q9MnHN00EOGUMNPev4l4KjaQPQ=; b=Xj46N0jlv92AzaryO6rgb+LZbItWyuvk9N5yQb9Jg8RdrVVLEb89u4WVXjvLEpvNPO KtIAfPPVD3K5TXLsRs1X1V649nY/quFULzBHv2d7msapGcDfyQckpxeDo8pwo+XL/42g huIHyczai39eK9mqC7OSkrImC/dXI0nH68OQdoaziMjqSPbDTWEMzgYV+kED4NIKW0zr ojAht8WuMGrr3rY6KJcn/py82qJ1eK2j0k0n5FERH1uPwD/zQm1nZKg0ItwOOg7QsA2d UBgpCoAoN0GLzoxaSMK+lAOweIpRbv84nS8qmaLe1v0yBmnS9fq12IQL1AVq0Y/BwcDV X65A== X-Gm-Message-State: AAQBX9dk/nLjvv/XwGXHUG/XO5bfIF2GCT9pikPfbcUutxCMzETmEEZU 6fAGcGU/7bl4dMA5wuV4UvA= X-Google-Smtp-Source: AKy350bbVTzvWAyw1Pzyv3JZvCjOYIu5BlzcjdfB57uvypsYM9/7E18cQ+2Yd/+fSMrEkeBkXKLRJA== X-Received: by 2002:a17:906:4557:b0:957:1dda:853b with SMTP id s23-20020a170906455700b009571dda853bmr2170790ejq.24.1682087845626; Fri, 21 Apr 2023 07:37:25 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:25 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 14/22] net: dsa: mt7530: switch to if/else statements on mt7530_setup_port6() Date: Fri, 21 Apr 2023 17:36:40 +0300 Message-Id: <20230421143648.87889-15-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL This code is from before this driver was converted to phylink API. Phylink deals with the unsupported interface cases before mt7530_setup_port6() is run. Therefore, the default case would never run. However, it must be defined nonetheless to handle all the remaining enumeration values, the phy-modes. Switch to if/else statements which simplifies the code. Change mt7530_setup_port6() to void now that there're no error cases left. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 35 +++++++++++------------------------ 1 file changed, 11 insertions(+), 24 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 8fe9b1e6932c..610828b56eac 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -400,11 +400,11 @@ static void mt7530_pll_setup(struct mt7530_priv *priv) } =20 /* Setup port 6 interface mode and TRGMII TX circuit */ -static int +static void mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; - u32 ncpo1, ssc_delta, trgint, xtal, val; + u32 ncpo1, ssc_delta, xtal, val; =20 val =3D mt7530_read(priv, MT7530_MHWTRAP); val &=3D ~MHWTRAP_P6_DIS; @@ -412,16 +412,18 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfa= ce_t interface) =20 xtal =3D mt7530_read(priv, MT7530_HWTRAP) & HWTRAP_XTAL_MASK; =20 - switch (interface) { - case PHY_INTERFACE_MODE_RGMII: - trgint =3D 0; - break; - case PHY_INTERFACE_MODE_TRGMII: - trgint =3D 1; + if (interface =3D=3D PHY_INTERFACE_MODE_RGMII) { + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, + P6_INTF_MODE(0)); + } else { + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, + P6_INTF_MODE(1)); + if (xtal =3D=3D HWTRAP_XTAL_25MHZ) ssc_delta =3D 0x57; else ssc_delta =3D 0x87; + if (priv->id =3D=3D ID_MT7621) { /* PLL frequency: 150MHz: 1.2GBit */ if (xtal =3D=3D HWTRAP_XTAL_40MHZ) @@ -434,17 +436,7 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfac= e_t interface) if (xtal =3D=3D HWTRAP_XTAL_25MHZ) ncpo1 =3D 0x1400; } - break; - default: - dev_err(priv->dev, "xMII interface %d not supported\n", - interface); - return -EINVAL; - } =20 - mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, - P6_INTF_MODE(trgint)); - - if (trgint) { /* Disable the MT7530 TRGMII clocks */ core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); =20 @@ -466,8 +458,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface= _t interface) /* Enable the MT7530 TRGMII clocks */ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); } - - return 0; } =20 static void @@ -2568,14 +2558,11 @@ mt7530_mac_config(struct dsa_switch *ds, int port, = unsigned int mode, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; - int ret; =20 if (port =3D=3D 5) { mt7530_setup_port5(priv->ds, interface); } else if (port =3D=3D 6) { - ret =3D mt7530_setup_port6(priv->ds, interface); - if (ret) - return ret; + mt7530_setup_port6(priv->ds, interface); } =20 return 0; --=20 2.37.2