From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9992FC7618E for ; Fri, 21 Apr 2023 14:37:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232819AbjDUOhV (ORCPT ); Fri, 21 Apr 2023 10:37:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232411AbjDUOhL (ORCPT ); Fri, 21 Apr 2023 10:37:11 -0400 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D42D13C3D; Fri, 21 Apr 2023 07:36:59 -0700 (PDT) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-506b20efd4cso2886999a12.3; Fri, 21 Apr 2023 07:36:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087817; x=1684679817; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Sx7QT+CfbRJuf7ipyvzI9VLyvr32Uv9zIwCFOCdllC4=; b=KqBupMCSod70Y958ehISGx6H0Hk58VkXRikprYBBIiecgLGS2MTLleCo9SvhmvEkKU jz8vsoBNeqrXcrN/Scju08aE8xCnHKNyPIlAli3EUe30khELo6b869qwOPDjJMGW4WSb Ok5wOYo8sXFwMCJsD50BKU1ISbchY0wIMPXyYBM6hn1lAWrZF9oLi24Y3npmGA6fKixt oP0dEmwcIby2+JVIyKO8PB1MREpqZ6FTmn6woSIsssN1H6QdVXY3MirHpdu/heK45XNT MHqCbJpAG+37GRfLIlTGePKQysSzWtbNtOQoec9KNjm5OpmtW43wlpJa3WZCZ85114/Y LxIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087817; x=1684679817; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Sx7QT+CfbRJuf7ipyvzI9VLyvr32Uv9zIwCFOCdllC4=; b=ElVCOlesKgPMjxTzNmsmYFHj2HefTHVBqF38yR+TfZuSGFIviD1mXPPv1XFXWLfWWU OTJWaTBfx9gIwXFuaycj7rJ5j4QE9TgvOOjMP/VJaT4aKSIVve3HO1EdFT31T+ggr76A auuTYAfkj6rqs7WIxtwbXwYZGtc/4SBAoMDKX9AUwjkU3tGY4O3iYoUtxzYFRRjYysKV 0Z7zOKXwZAX80CMd2khb2NzexaolpnAhC2KSflB8g/2tmqki3FzybdJhBIkLfO9Glv4K LCNIqmn4svYibN+w9DvbSeRCLtbJqDL/c1a0k4rIwUWBxn7XHC/dSX5PjU/f4H9luWdq yovw== X-Gm-Message-State: AAQBX9eoOJ7EjbPKfgDRfbrJAxO3YoO6BpAAnAt7yHpCV6s0BLwMDepD SkQkleWLElNHajNOtIzKx8s= X-Google-Smtp-Source: AKy350bB4/HdrT8woCCbxfnAVBekFnXUuEGFqFUKrXHi90jUUFu7MVJKe0mP9T5GsJvC/eqr454dDg== X-Received: by 2002:a17:907:9503:b0:92c:8e4a:1a42 with SMTP id ew3-20020a170907950300b0092c8e4a1a42mr2100787ejc.32.1682087817083; Fri, 21 Apr 2023 07:36:57 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.36.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:36:56 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 01/22] net: dsa: mt7530: add missing @p5_interface to mt7530_priv description Date: Fri, 21 Apr 2023 17:36:27 +0300 Message-Id: <20230421143648.87889-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Add the missing p5_interface field to the mt7530_priv description. Sort out the description in the process. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle --- drivers/net/dsa/mt7530.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 5084f48a8869..845f5dd16d83 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -746,7 +746,8 @@ struct mt753x_info { * @ports: Holding the state among ports * @reg_mutex: The lock for protecting among process accessing * registers - * @p6_interface Holding the current port 6 interface + * @p6_interface: Holding the current port 6 interface + * @p5_interface: Holding the current port 5 interface * @p5_intf_sel: Holding the current port 5 interface select * @irq: IRQ number of the switch * @irq_domain: IRQ domain of the switch irq_chip --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B56D4C77B76 for ; Fri, 21 Apr 2023 14:37:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232847AbjDUOh1 (ORCPT ); Fri, 21 Apr 2023 10:37:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232192AbjDUOhP (ORCPT ); Fri, 21 Apr 2023 10:37:15 -0400 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E69313FB2; Fri, 21 Apr 2023 07:37:01 -0700 (PDT) Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-50506111a6eso3063672a12.1; Fri, 21 Apr 2023 07:37:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087819; x=1684679819; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ky+vCKIfIiAses7wm+VhQnJsA7JRQIkV7aT9O8NnSM4=; b=JkNU3RYgFoSLMWgh/VBkhcwU7mLl8IiDCifX8wVnqze/zgB1CeEZGvERps4u1RBZFE M2R2OUPNjjEvXJA3Or//um/W0YjpmqUvwXxpNRpjytT3INQY8bnvf/3ZUe3Lsfu78XHt 0mNJXEdZkn3HLmOF+KmUiyEnYe6x9SVznI7dKN3bunN5qweRKS/o+0VQ7LaWs9HI7Raj 4TJD7/iRte+KdeyzVWCPvwSfhB28YqkxaJyHGTZzAs9DLFGqWShrI/ZYXCYzGdRij/LS Hx+7I4uLHvYorXR7XYC691xbyxAlqgpNmoY/78A5bmf5Xd7HTSxjS2JMeblqwtxXZDU/ 5dGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087819; x=1684679819; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ky+vCKIfIiAses7wm+VhQnJsA7JRQIkV7aT9O8NnSM4=; b=dYUUd4O1lLTLkEW1eUdYHngbeOuIqjyQNBB/+UsLYZ5QL0rwGRRCtxG0ZSrxl+DlUx RxKK7awKlCAsmjNKmyZS8P6xLE+SmLOca+XuYtJAJ5UJeGtw/Wp/VdmJylJpCWIGw+r/ ihd9qtjrU3eQ0SgsqAKqqM5EMRtZZhuAqnqM9R0qhkfdLPsbbGBSVb928qceFiht+fAh +ARBYH/k+cXdnlRv5Rfxsw+ypzGbP5RRKMrjHTHI0bSxInJnD4+9VH4kIBXh8RI1uGeD N5DreY16W6mBpLVgxrbLgUaTzNkFml+cXPRBAymtAGWX+0iyNrCUbMuNGxSPNgP5hDvD y4aw== X-Gm-Message-State: AAQBX9eXWFepiXh1cwbGUYAyu35A/2TfagAeNsqol9XJIgKamHhZ3mj8 hpVQF/8n+mW3NNRAAi9sBcY= X-Google-Smtp-Source: AKy350ZHGVK6DhQPdnGjNA5o+ZJP/s1xmVPUOGC6O2Hiw050NMaMz7fy8HuE7hXWqtji8iXZX9EFwg== X-Received: by 2002:a17:906:114c:b0:94f:3312:3daf with SMTP id i12-20020a170906114c00b0094f33123dafmr2160291eja.66.1682087819307; Fri, 21 Apr 2023 07:36:59 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.36.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:36:59 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 02/22] net: dsa: mt7530: use p5_interface_select as data type for p5_intf_sel Date: Fri, 21 Apr 2023 17:36:28 +0300 Message-Id: <20230421143648.87889-3-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Use the p5_interface_select enumeration as the data type for the p5_intf_sel field. This ensures p5_intf_sel can only take the values defined in the p5_interface_select enumeration. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 845f5dd16d83..703f8a528317 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -674,13 +674,13 @@ struct mt7530_port { }; =20 /* Port 5 interface select definitions */ -enum p5_interface_select { - P5_DISABLED =3D 0, +typedef enum { + P5_DISABLED, P5_INTF_SEL_PHY_P0, P5_INTF_SEL_PHY_P4, P5_INTF_SEL_GMAC5, P5_INTF_SEL_GMAC5_SGMII, -}; +} p5_interface_select; =20 struct mt7530_priv; =20 @@ -768,7 +768,7 @@ struct mt7530_priv { bool mcm; phy_interface_t p6_interface; phy_interface_t p5_interface; - unsigned int p5_intf_sel; + p5_interface_select p5_intf_sel; u8 mirror_rx; u8 mirror_tx; struct mt7530_port ports[MT7530_NUM_PORTS]; --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6F9EC7618E for ; Fri, 21 Apr 2023 14:37:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230472AbjDUOhY (ORCPT ); Fri, 21 Apr 2023 10:37:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232502AbjDUOhR (ORCPT ); Fri, 21 Apr 2023 10:37:17 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 705F69030; Fri, 21 Apr 2023 07:37:03 -0700 (PDT) Received: by mail-ed1-x533.google.com with SMTP id 4fb4d7f45d1cf-506b8c6bbdbso2563565a12.1; Fri, 21 Apr 2023 07:37:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087822; x=1684679822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zGGNzhXShPLMVaiTvqZE9O4HeSyZ18wv+0vr2UWbe/Q=; b=H4B75APs962gps+u8PNzSRdqU0ZnR1s9VCyva44nb9eU7BqoNCErWJTBGFB7xwwMow 5e2kFhbBTH8+WpttwJo9Ma+uxklJ0v1dgEPRdMNG7tBOQFn9XvXZBShc9s+hHwr+Y/xU 6kidxKt2u1TEwRG9UY4pZBv9UluTEiNL38JkO1VTJpdtqcVSZrt0cru4Lo3Zx347uqZQ 8NtBgdZ+qI6Qn5vmitfsBPhtxQRO8r0Pv00mMjJSFxbIBQoGYNhcSbNmNdjVkXQHrgcz JrskGLCIe8bPY8Ddmdwi2u/TOrCBO/nXfYfCxhfquwaET9tDtxTJ4phLeHceg9HKiNIR kARQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087822; x=1684679822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zGGNzhXShPLMVaiTvqZE9O4HeSyZ18wv+0vr2UWbe/Q=; b=hg45Q/LWYVhwqSEm634NhHykZ8pzojv4+sQW7WskUAlfajszQRu8ZJx953STuv95zM ORa3R9qZhS2Ng5++YoJOz+1imiVYTeMimPHwMwSkljgqM3eLEHaYVPRuJiz+ZkX7Oou3 ZRY3/OKBelESwF1KDdnTUuGMAQhMlLFHRG7IuxFp5RIpM+tcPbrGC+MnuCMFH2YGkfu+ fxnENDSf66jzxQSOqfmo6a1eKQcC1WGMPeK7v3Tyc3SV1+lFklln0tQlRXbfs5dM5WvM 6zTnGQySHyUdkGIwHPtoya2LAbS3KvNYV4vLSG3xhLY9dUcL3/djEkTm5mpBWw+AqEGi sL4w== X-Gm-Message-State: AAQBX9cVRiGncGTVy9mBTcJ1tUxKUiSCGwjwobmujOi4OzN1nfbPjRvc 1XyFAwUvMvZKdWoflOQXLws= X-Google-Smtp-Source: AKy350Zf2dmwIwSlIQVmIx3LcCmpPvSapslCHsJgVvA21Dh7lFd1teYYP0qB7uF9pMpAcGtkmTRFZQ== X-Received: by 2002:a17:906:2c58:b0:953:5eb4:fe45 with SMTP id f24-20020a1709062c5800b009535eb4fe45mr2338187ejh.23.1682087821491; Fri, 21 Apr 2023 07:37:01 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.36.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:01 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 03/22] net: dsa: mt7530: properly support MT7531AE and MT7531BE Date: Fri, 21 Apr 2023 17:36:29 +0300 Message-Id: <20230421143648.87889-4-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Introduce the p5_sgmii pointer to store the information for whether port 5 has got SGMII or not. Print "found MT7531AE" if it's got it, print "found MT7531BE" if it hasn't. Move the comment about MT7531AE and MT7531BE to mt7531_setup(), where the switch is identified. Get rid of mt7531_dual_sgmii_supported() now that priv->p5_sgmii stores the information. Address the code where mt7531_dual_sgmii_supported() is used. Get rid of mt7531_is_rgmii_port() which just prints the opposite of priv->p5_sgmii. Remove P5_INTF_SEL_GMAC5_SGMII. The p5_interface_select enum is supposed to represent the mode that port 5 is used in, not the hardware information of port 5. Set p5_intf_sel to P5_INTF_SEL_GMAC5 instead, if port 5 is not dsa_is_unused_port(). Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530-mdio.c | 7 ++--- drivers/net/dsa/mt7530.c | 49 +++++++++++++++-------------------- drivers/net/dsa/mt7530.h | 6 +++-- 3 files changed, 27 insertions(+), 35 deletions(-) diff --git a/drivers/net/dsa/mt7530-mdio.c b/drivers/net/dsa/mt7530-mdio.c index 088533663b83..fa3ee85a99c1 100644 --- a/drivers/net/dsa/mt7530-mdio.c +++ b/drivers/net/dsa/mt7530-mdio.c @@ -81,17 +81,14 @@ static const struct regmap_bus mt7530_regmap_bus =3D { }; =20 static int -mt7531_create_sgmii(struct mt7530_priv *priv, bool dual_sgmii) +mt7531_create_sgmii(struct mt7530_priv *priv) { struct regmap_config *mt7531_pcs_config[2] =3D {}; struct phylink_pcs *pcs; struct regmap *regmap; int i, ret =3D 0; =20 - /* MT7531AE has two SGMII units for port 5 and port 6 - * MT7531BE has only one SGMII unit for port 6 - */ - for (i =3D dual_sgmii ? 0 : 1; i < 2; i++) { + for (i =3D priv->p5_sgmii ? 0 : 1; i < 2; i++) { mt7531_pcs_config[i] =3D devm_kzalloc(priv->dev, sizeof(struct regmap_config), GFP_KERNEL); diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index c680873819b0..edc34be745b2 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -473,15 +473,6 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interf= ace_t interface) return 0; } =20 -static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv) -{ - u32 val; - - val =3D mt7530_read(priv, MT7531_TOP_SIG_SR); - - return (val & PAD_DUAL_SGMII_EN) !=3D 0; -} - static int mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) { @@ -496,7 +487,7 @@ mt7531_pll_setup(struct mt7530_priv *priv) u32 xtal; u32 val; =20 - if (mt7531_dual_sgmii_supported(priv)) + if (priv->p5_sgmii) return; =20 val =3D mt7530_read(priv, MT7531_CREV); @@ -907,8 +898,6 @@ static const char *p5_intf_modes(unsigned int p5_interf= ace) return "PHY P4"; case P5_INTF_SEL_GMAC5: return "GMAC5"; - case P5_INTF_SEL_GMAC5_SGMII: - return "GMAC5_SGMII"; default: return "unknown"; } @@ -2440,6 +2429,18 @@ mt7531_setup(struct dsa_switch *ds) return -ENODEV; } =20 + /* MT7531AE has got two SGMII units. One for port 5, one for port 6. + * MT7531BE has got only one SGMII unit which is for port 6. + */ + val =3D mt7530_read(priv, MT7531_TOP_SIG_SR); + + if ((val & PAD_DUAL_SGMII_EN) !=3D 0) { + priv->p5_sgmii =3D true; + dev_info(priv->dev, "found MT7531AE\n"); + } else { + dev_info(priv->dev, "found MT7531BE\n"); + } + /* all MACs must be forced link-down before sw reset */ for (i =3D 0; i < MT7530_NUM_PORTS; i++) mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); @@ -2451,19 +2452,16 @@ mt7531_setup(struct dsa_switch *ds) =20 mt7531_pll_setup(priv); =20 - if (mt7531_dual_sgmii_supported(priv)) { - priv->p5_intf_sel =3D P5_INTF_SEL_GMAC5_SGMII; - + if (priv->p5_sgmii) { /* Let ds->slave_mii_bus be able to access external phy. */ mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK, MT7531_EXT_P_MDC_11); mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK, MT7531_EXT_P_MDIO_12); - } else { - priv->p5_intf_sel =3D P5_INTF_SEL_GMAC5; } - dev_dbg(ds->dev, "P5 support %s interface\n", - p5_intf_modes(priv->p5_intf_sel)); + + if (!dsa_is_unused_port(ds, 5)) + priv->p5_intf_sel =3D P5_INTF_SEL_GMAC5; =20 mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, MT7531_GPIO0_INTERRUPT); @@ -2523,11 +2521,6 @@ static void mt7530_mac_port_get_caps(struct dsa_swit= ch *ds, int port, } } =20 -static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port) -{ - return (port =3D=3D 5) && (priv->p5_intf_sel !=3D P5_INTF_SEL_GMAC5_SGMII= ); -} - static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { @@ -2540,7 +2533,7 @@ static void mt7531_mac_port_get_caps(struct dsa_switc= h *ds, int port, break; =20 case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ - if (mt7531_is_rgmii_port(priv, port)) { + if (!priv->p5_sgmii) { phy_interface_set_rgmii(config->supported_interfaces); break; } @@ -2607,7 +2600,7 @@ static int mt7531_rgmii_setup(struct mt7530_priv *pri= v, u32 port, { u32 val; =20 - if (!mt7531_is_rgmii_port(priv, port)) { + if (priv->p5_sgmii) { dev_err(priv->dev, "RGMII mode is not available for port %d\n", port); return -EINVAL; @@ -2860,7 +2853,7 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int por= t) =20 switch (port) { case 5: - if (mt7531_is_rgmii_port(priv, port)) + if (!priv->p5_sgmii) interface =3D PHY_INTERFACE_MODE_RGMII; else interface =3D PHY_INTERFACE_MODE_2500BASEX; @@ -3019,7 +3012,7 @@ mt753x_setup(struct dsa_switch *ds) mt7530_free_irq_common(priv); =20 if (priv->create_sgmii) { - ret =3D priv->create_sgmii(priv, mt7531_dual_sgmii_supported(priv)); + ret =3D priv->create_sgmii(priv); if (ret && priv->irq) mt7530_free_irq(priv); } diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 703f8a528317..f58828577520 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -679,7 +679,6 @@ typedef enum { P5_INTF_SEL_PHY_P0, P5_INTF_SEL_PHY_P4, P5_INTF_SEL_GMAC5, - P5_INTF_SEL_GMAC5_SGMII, } p5_interface_select; =20 struct mt7530_priv; @@ -749,6 +748,8 @@ struct mt753x_info { * @p6_interface: Holding the current port 6 interface * @p5_interface: Holding the current port 5 interface * @p5_intf_sel: Holding the current port 5 interface select + * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch + * has got SGMII * @irq: IRQ number of the switch * @irq_domain: IRQ domain of the switch irq_chip * @irq_enable: IRQ enable bits, synced to SYS_INT_EN @@ -769,6 +770,7 @@ struct mt7530_priv { phy_interface_t p6_interface; phy_interface_t p5_interface; p5_interface_select p5_intf_sel; + bool p5_sgmii; u8 mirror_rx; u8 mirror_tx; struct mt7530_port ports[MT7530_NUM_PORTS]; @@ -778,7 +780,7 @@ struct mt7530_priv { int irq; struct irq_domain *irq_domain; u32 irq_enable; - int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); + int (*create_sgmii)(struct mt7530_priv *priv); }; =20 struct mt7530_hw_vlan_entry { --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0894C77B76 for ; Fri, 21 Apr 2023 14:37:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232801AbjDUOhb (ORCPT ); Fri, 21 Apr 2023 10:37:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232773AbjDUOhR (ORCPT ); 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Fri, 21 Apr 2023 07:37:03 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 04/22] net: dsa: mt7530: improve comments regarding port 5 and 6 Date: Fri, 21 Apr 2023 17:36:30 +0300 Message-Id: <20230421143648.87889-5-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL There's no logic to numerically order the CPU ports. State the port number and its capability of being used as a CPU port instead. Remove the irrelevant PHY muxing information from mt7530_mac_port_get_caps(). Explain the supported MII modes instead. Remove the out of place PHY muxing information from mt753x_phylink_mac_config(). The function is for both the MT7530 and MT7531 switches but there's no PHY muxing on MT7531. These comments were gradually introduced with the commits below. ca366d6c889b ("net: dsa: mt7530: Convert to PHYLINK API") 38f790a80560 ("net: dsa: mt7530: Add support for port 5") 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a new hardware") c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index edc34be745b2..e956ffa1eea8 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2504,7 +2504,9 @@ static void mt7530_mac_port_get_caps(struct dsa_switc= h *ds, int port, config->supported_interfaces); break; =20 - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ + case 5: /* Port 5 which can be used as a CPU port supports rgmii with + * delays, mii, and gmii. + */ phy_interface_set_rgmii(config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); @@ -2512,7 +2514,9 @@ static void mt7530_mac_port_get_caps(struct dsa_switc= h *ds, int port, config->supported_interfaces); break; =20 - case 6: /* 1st cpu port */ + case 6: /* Port 6 which can be used as a CPU port supports rgmii and + * trgmii. + */ __set_bit(PHY_INTERFACE_MODE_RGMII, config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_TRGMII, @@ -2532,14 +2536,17 @@ static void mt7531_mac_port_get_caps(struct dsa_swi= tch *ds, int port, config->supported_interfaces); break; =20 - case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ + case 5: /* Port 5 which can be used as a CPU port supports rgmii with + * delays on MT7531BE, sgmii/802.3z on MT7531AE. + */ if (!priv->p5_sgmii) { phy_interface_set_rgmii(config->supported_interfaces); break; } fallthrough; =20 - case 6: /* 1st cpu port supports sgmii/8023z only */ + case 6: /* Port 6 which can be used as a CPU port supports sgmii/802.3z. + */ __set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_1000BASEX, @@ -2731,7 +2738,7 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int = port, unsigned int mode, state->interface !=3D PHY_INTERFACE_MODE_INTERNAL) goto unsupported; break; - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ + case 5: /* Port 5, can be used as a CPU port. */ if (priv->p5_interface =3D=3D state->interface) break; =20 @@ -2741,7 +2748,7 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int = port, unsigned int mode, if (priv->p5_intf_sel !=3D P5_DISABLED) priv->p5_interface =3D state->interface; break; - case 6: /* 1st cpu port */ + case 6: /* Port 6, can be used as a CPU port. */ if (priv->p6_interface =3D=3D state->interface) break; =20 --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A3B7C77B76 for ; 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Fri, 21 Apr 2023 07:37:05 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:05 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 05/22] net: dsa: mt7530: read XTAL value from correct register Date: Fri, 21 Apr 2023 17:36:31 +0300 Message-Id: <20230421143648.87889-6-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL On commit 7ef6f6f8d237 ("net: dsa: mt7530: Add MT7621 TRGMII mode support") bit mask macros were added under the MT7530_HWTRAP register to read the crystal frequency. However, the value given to the xtal variable on mt7530_pad_clk_setup() is read from the MT7530_MHWTRAP register instead. It doesn't seem to matter as my testing on MCM and standalone MT7530 shows the value is correctly read from both registers but change it anyway. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index e956ffa1eea8..30553044d4b7 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -406,7 +406,7 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interfa= ce_t interface) struct mt7530_priv *priv =3D ds->priv; u32 ncpo1, ssc_delta, trgint, xtal; =20 - xtal =3D mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; + xtal =3D mt7530_read(priv, MT7530_HWTRAP) & HWTRAP_XTAL_MASK; =20 if (xtal =3D=3D HWTRAP_XTAL_20MHZ) { dev_err(priv->dev, --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD0BFC7EE20 for ; Fri, 21 Apr 2023 14:37:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232882AbjDUOhd (ORCPT ); Fri, 21 Apr 2023 10:37:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232781AbjDUOhS (ORCPT ); Fri, 21 Apr 2023 10:37:18 -0400 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1E4313F83; Fri, 21 Apr 2023 07:37:09 -0700 (PDT) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-94ed7e49541so236551866b.1; Fri, 21 Apr 2023 07:37:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087828; x=1684679828; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BEQa4/xHb6zNxlzp+nQz3Th+D0wsYwHJEzOMjCihAA0=; b=ZLiz7VI1LgCRTrl6vuhh0Ya1V50x4rqu6D/kmhJ4UHrdgB/mMJHYQkQYrsg+Y+kID2 ZrAzSyHbSBnBngaySNZZz6RJyf3nkcWbaV1Hc6qyoevLGH6nN8tEBZDCBewM0ovE+yTE 6vX5eR74L4i7Cvi3wCnjqggrtwXEPVds4Jzz64X2oJY35U+Qm9cf55rGYkPcqu8VXyhY 7ruEraMsbDx/1qDhyyzdJgfm4QQghUoPq2PSYtLkEIrzlkHlMk0baKzlgn6bTBh6NvX2 YXTq76Vpysm8U32kc8euQkRQS+9SWhtUrkTrjOBxEc9fkGsnKi8StkloxnLZwFM3WWPL ginw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087828; x=1684679828; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BEQa4/xHb6zNxlzp+nQz3Th+D0wsYwHJEzOMjCihAA0=; b=jBhCEdX2+T98v7oMkjOLecUEssRBEAwxQtbEA83h1G9keHHGaiOItefkf/rViNmh0s 6VU4Oq6UJ/EUB8KVIQ0iYzkBLIe3E6fh9W0yTCIsatXwXcdtcQEt2sRfbB30Cx0WqBSC OFQkC511v/O+ysGpCHlpF8a+Eg2FV6UUKOyFjP4171Us5zuPd/eojWR1O8Truniakd4n aZuVuspN8E4AU2HCg/XFysbqJEA9NYo22U/8VaNmqiWSiOgFPyyKykJ53ILYG3K2suFa k/ws36BHqRmgzGfoovk7Carp3u0bW8nK+/nO9PFTFrAMw/AKxOBUrlfWnlmWYNUbqDQR euEw== X-Gm-Message-State: AAQBX9fICvK4hQkWwF5cX4U+Ugu7BQw9ZQpuExsJ2rX86M1sfexjHoGG uFvwAiDDizZoB2pDn2aq2aI= X-Google-Smtp-Source: AKy350aYC8vZhVhjqQTuEMfzGSYTGJE29X38itrkcvfN2wPBmLh7N3Xsl7f7jIM8oO1qa+oppffqeA== X-Received: by 2002:a17:907:a40e:b0:94f:a292:20cc with SMTP id sg14-20020a170907a40e00b0094fa29220ccmr2834815ejc.41.1682087828142; Fri, 21 Apr 2023 07:37:08 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:07 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 06/22] net: dsa: mt7530: improve code path for setting up port 5 Date: Fri, 21 Apr 2023 17:36:32 +0300 Message-Id: <20230421143648.87889-7-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL There're two code paths for setting up port 5: mt7530_setup() -> mt7530_setup_port5() mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() Currently mt7530_setup_port5() from mt7530_setup() always runs. If port 5 is used as a CPU, DSA, or user port, mt7530_setup_port5() from mt753x_phylink_mac_config() won't run. That is because priv->p5_interface set on mt7530_setup_port5() will match state->interface on mt753x_phylink_mac_config() which will stop running mt7530_setup_port5() again. mt7530_setup_port5() from mt753x_phylink_mac_config() won't run when port 5 is disabled or used for PHY muxing as port 5 won't be defined on the devicetree. Therefore, mt7530_setup_port5() will never run from mt753x_phylink_mac_config(). Address this by not running mt7530_setup_port5() from mt7530_setup() if port 5 is used as a CPU, DSA, or user port. For the cases of PHY muxing or the port being disabled, call mt7530_setup_port5() from mt7530_setup(). Do not set priv->p5_interface on mt7530_setup_port5(). There won't be a case where mt753x_phylink_mac_config() runs after mt7530_setup_port5() anymore. Do not set priv->p5_intf_sel to P5_DISABLED. It is already set to that when "priv" is allocated. Move setting the interface to a more specific location. It's supposed to be overwritten if PHY muxing is detected. Improve the comment which explain the process. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 30553044d4b7..591df09c8bb5 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -968,8 +968,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) dev_dbg(ds->dev, "Setup P5, HWTRAP=3D0x%x, intf_sel=3D%s, phy-mode=3D%s\n= ", val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); =20 - priv->p5_interface =3D interface; - unlock_exit: mutex_unlock(&priv->reg_mutex); } @@ -2277,16 +2275,15 @@ mt7530_setup(struct dsa_switch *ds) return ret; =20 /* Setup port 5 */ - priv->p5_intf_sel =3D P5_DISABLED; - interface =3D PHY_INTERFACE_MODE_NA; - if (!dsa_is_unused_port(ds, 5)) { priv->p5_intf_sel =3D P5_INTF_SEL_GMAC5; - ret =3D of_get_phy_mode(dsa_to_port(ds, 5)->dn, &interface); - if (ret && ret !=3D -ENODEV) - return ret; } else { - /* Scan the ethernet nodes. look for GMAC1, lookup used phy */ + /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY. + * Set priv->p5_intf_sel to the appropriate value if PHY muxing + * is detected. + */ + interface =3D PHY_INTERFACE_MODE_NA; + for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) @@ -2317,6 +2314,8 @@ mt7530_setup(struct dsa_switch *ds) of_node_put(phy_node); break; } + + mt7530_setup_port5(ds, interface); } =20 #ifdef CONFIG_GPIOLIB @@ -2327,8 +2326,6 @@ mt7530_setup(struct dsa_switch *ds) } #endif /* CONFIG_GPIOLIB */ =20 - mt7530_setup_port5(ds, interface); - /* Flush the FDB table */ ret =3D mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); if (ret < 0) --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50011C77B76 for ; Fri, 21 Apr 2023 14:37:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232901AbjDUOhk (ORCPT ); Fri, 21 Apr 2023 10:37:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232784AbjDUOhT (ORCPT ); Fri, 21 Apr 2023 10:37:19 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DC25C17C; Fri, 21 Apr 2023 07:37:12 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-506bdf29712so12860929a12.0; Fri, 21 Apr 2023 07:37:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087830; x=1684679830; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VA0Xuk7MTgGa91dYwTC92d17A98m4rbax3BNrbxXgxg=; b=M4UWnciomcUE4HK+mDFOEhaQpLMON/yMq1egd2eGD0WjqLi+0EO8LKCpuYv/hx30WT nhwfgfnd8DOh+GrNePxRaULnUkLzivdzGvaE8i3r/QtreW8oXp68KJttbMRL/gv+4SqY q9hBwdaSa5lbn1G4FlJ0xKusB6GQET/Lw1o1BTFaSvho5tKvyql2BDBAnn0bj6QcMCDD HQTaxEG0hAMhP7kxEAhW8QOxumCzrHRruAk/Y2nXsU6dVu4zTFPF5e2/pk9wjnTCbdJW qBC0hiFpBRl3zD3KC9ZZVOA+LqLwQF3C1/0qrp2ADUL2DuRyPGWgi3d6hMS8AItrDZ7f thqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087830; x=1684679830; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VA0Xuk7MTgGa91dYwTC92d17A98m4rbax3BNrbxXgxg=; b=HsU8wTFEE0AhWD8M/u9/7coTKEV8Fnq+Cim7cC5eQerf79rOzdjqe1cz5sUTqbEP+j 35HFJwFpdbslai6jsuprMf2QLDuLjRe+pS1mfD3J1LF9lEuV9SVjA00rFuHY4Te8BCRV WewTpW7kNRL9SP4rhve+Q1HnfQb3oXG9UYdF40JmyiB9D9+mqz5BNwbsA3vnmSCc8aOn 2xslbh5IJlzu52hEapSP/CNT5cxItO0AKiHCPWACiElwOFgIublQfXMKf0Two2yjLF5l a1EA3NDp6NMFKGEO2DSE+ZfYo6fT3iWrBI14IjT1qwbkwfqz5y3qIZ+aCwDGa2NbPQb/ jy/g== X-Gm-Message-State: AAQBX9fTJwwhFz8Y7qnEUXsXTpMI5NcnLEHowla0GwSEJN7fzBiXdAgw JhnF8A4FwlIOJTiayspsWA8= X-Google-Smtp-Source: AKy350b1lI/7oYXC7o4YA2rNQhIhx/wnN+4LOaI5v5kCAlbObHDch3hFRAM8039Bj2AeoQ/vDBwLKw== X-Received: by 2002:a17:906:4ec5:b0:94e:80b2:51e3 with SMTP id i5-20020a1709064ec500b0094e80b251e3mr2310031ejv.27.1682087830425; Fri, 21 Apr 2023 07:37:10 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:10 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 07/22] net: dsa: mt7530: do not run mt7530_setup_port5() if port 5 is disabled Date: Fri, 21 Apr 2023 17:36:33 +0300 Message-Id: <20230421143648.87889-8-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL There's no need to run all the code on mt7530_setup_port5() if port 5 is disabled. The only case for calling mt7530_setup_port5() from mt7530_setup() is when PHY muxing is enabled. That is because port 5 is not defined as a port on the devicetree, therefore, it cannot be controlled by phylink. Because of this, run mt7530_setup_port5() if priv->p5_intf_sel is P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4. Remove the P5_DISABLED case from mt7530_setup_port5(). Stop initialising the interface variable as the remaining cases will always call mt7530_setup_port5() with it initialised. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 591df09c8bb5..bac2388319a3 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -932,9 +932,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ val &=3D ~MHWTRAP_P5_DIS; break; - case P5_DISABLED: - interface =3D PHY_INTERFACE_MODE_NA; - break; default: dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", priv->p5_intf_sel); @@ -2282,8 +2279,6 @@ mt7530_setup(struct dsa_switch *ds) * Set priv->p5_intf_sel to the appropriate value if PHY muxing * is detected. */ - interface =3D PHY_INTERFACE_MODE_NA; - for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) @@ -2315,7 +2310,9 @@ mt7530_setup(struct dsa_switch *ds) break; } =20 - mt7530_setup_port5(ds, interface); + if (priv->p5_intf_sel =3D=3D P5_INTF_SEL_PHY_P0 || + priv->p5_intf_sel =3D=3D P5_INTF_SEL_PHY_P4) + mt7530_setup_port5(ds, interface); } =20 #ifdef CONFIG_GPIOLIB --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29040C77B71 for ; Fri, 21 Apr 2023 14:37:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232777AbjDUOhp (ORCPT ); Fri, 21 Apr 2023 10:37:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232799AbjDUOhU (ORCPT ); Fri, 21 Apr 2023 10:37:20 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4283030E6; Fri, 21 Apr 2023 07:37:14 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-5055141a8fdso2485031a12.3; Fri, 21 Apr 2023 07:37:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087832; x=1684679832; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rqdViajAeNRKoM+fdqJjjwXsteiyCgJeOZmgusmlzx4=; b=Dg80eefg4baD6Cj47D57vpBsiKF6d5o7WWzYvZ3aouHw/GUuVslih+JSx5ay1XFeIy M82YmVWKmCFIDuE/rilLhKwuaUaBOQPWzQstA7BDz6kGsLdQTQQMmVaDuCrfoAn27Bx3 DOParXeqagyhjSNTuWSKYBPbOLwbGS6MYx++RZHJvW8amQ1f1sCNc4dQhH7x3eE0MXDF B/rUMIXebo2VzzbV4AbASrA4l3ImcoTVY1flXg4qEY2tgO8WKFppGP0Sowouzqseuq16 Cn6Wb/UyXitsxZzfcQv4zqmzLRSrt5WH8Y7ypwkygMJtQVF3hYn38STGe/A6/We9KDqf X7ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087832; x=1684679832; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rqdViajAeNRKoM+fdqJjjwXsteiyCgJeOZmgusmlzx4=; b=OlEAsxYyAt/0HpuFR0S717FH2syFs0UJ3gGQnULU+au0gg98+UUNsE9KABq+zdiZZ3 S1yiWYevJdyWCCMZPLGNb9MIHysQMVQo+WX5xt5Gwn+X3+pOzp8dH0iRko19q7H21hss aSeXwy/omUHaL/Dev3OzIcRcTtMxYxVnijKwWMaEtvdOGDr8msYHkm0yHeNGXV6tozNf ZCd7MN0YKR+e2qL5C0MdRwpCeReunaCjnjC7wXH6SmoEkWHeUH8SgIRsffwT+GW71cJ1 O8l6jK3ZiNu0t2cVVnejg7w0zhTBDhYgObv3TaFjEbrDzqDx1/g5p8DxHci2OKnuTIGs Wbzw== X-Gm-Message-State: AAQBX9dfXJ4VGaVe7qDetQmFMbtJo9YBh9APi1aLDAcV5briUqWGYX8D zRDVgTtxAAQEmROH0ksW2hI= X-Google-Smtp-Source: AKy350ahf3obWs94ix/YXjEXuZI1y8KeY5KkZOuNplbHTOqwHwb07LMntJ96k+NtedAjVDrnzuuMpw== X-Received: by 2002:a17:906:fcd4:b0:94f:50d:e16e with SMTP id qx20-20020a170906fcd400b0094f050de16emr2808682ejb.12.1682087832574; Fri, 21 Apr 2023 07:37:12 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:12 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 08/22] net: dsa: mt7530: change p{5,6}_interface to p{5,6}_configured Date: Fri, 21 Apr 2023 17:36:34 +0300 Message-Id: <20230421143648.87889-9-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL The idea of p5_interface and p6_interface pointers is to prevent mt753x_mac_config() from running twice for MT7531, as it's already run with mt753x_cpu_port_enable() from mt7531_setup_common(), if the port is used as a CPU port. Change p5_interface and p6_interface to p5_configured and p6_configured. Make them boolean. Do not set them for any other reason. The priv->p5_intf_sel check is useless as in this code path, it will always be P5_INTF_SEL_GMAC5. There was also no need to set priv->p5_interface and priv->p6_interface to PHY_INTERFACE_MODE_NA on mt7530_setup() and mt7531_setup() as they would already be set to that when "priv" is allocated. The pointers were of the phy_interface_t enumeration type, and the first element of the enum is PHY_INTERFACE_MODE_NA. There was nothing in between that would change this beforehand. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 19 ++++--------------- drivers/net/dsa/mt7530.h | 10 ++++++---- 2 files changed, 10 insertions(+), 19 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index bac2388319a3..2f670e512415 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2237,8 +2237,6 @@ mt7530_setup(struct dsa_switch *ds) val |=3D MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); =20 - priv->p6_interface =3D PHY_INTERFACE_MODE_NA; - /* Enable and reset MIB counters */ mt7530_mib_reset(ds); =20 @@ -2460,10 +2458,6 @@ mt7531_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, MT7531_GPIO0_INTERRUPT); =20 - /* Let phylink decide the interface later. */ - priv->p5_interface =3D PHY_INTERFACE_MODE_NA; - priv->p6_interface =3D PHY_INTERFACE_MODE_NA; - /* Enable PHY core PLL, since phy_device has not yet been created * provided for phy_[read,write]_mmd_indirect is called, we provide * our own mt7531_ind_mmd_phy_[read,write] to complete this @@ -2733,25 +2727,20 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, in= t port, unsigned int mode, goto unsupported; break; case 5: /* Port 5, can be used as a CPU port. */ - if (priv->p5_interface =3D=3D state->interface) + if (priv->p5_configured) break; =20 if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; - - if (priv->p5_intf_sel !=3D P5_DISABLED) - priv->p5_interface =3D state->interface; break; case 6: /* Port 6, can be used as a CPU port. */ - if (priv->p6_interface =3D=3D state->interface) + if (priv->p6_configured) break; =20 mt753x_pad_setup(ds, state); =20 if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; - - priv->p6_interface =3D state->interface; break; default: unsupported: @@ -2859,12 +2848,12 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int p= ort) else interface =3D PHY_INTERFACE_MODE_2500BASEX; =20 - priv->p5_interface =3D interface; + priv->p5_configured =3D true; break; case 6: interface =3D PHY_INTERFACE_MODE_2500BASEX; =20 - priv->p6_interface =3D interface; + priv->p6_configured =3D true; break; default: return -EINVAL; diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index f58828577520..c3a37a0f4843 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -745,8 +745,10 @@ struct mt753x_info { * @ports: Holding the state among ports * @reg_mutex: The lock for protecting among process accessing * registers - * @p6_interface: Holding the current port 6 interface - * @p5_interface: Holding the current port 5 interface + * @p6_configured: Flag for distinguishing if port 6 of the MT7531 switch + * is already configured + * @p5_configured: Flag for distinguishing if port 5 of the MT7531 switch + * is already configured * @p5_intf_sel: Holding the current port 5 interface select * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch * has got SGMII @@ -767,8 +769,8 @@ struct mt7530_priv { const struct mt753x_info *info; unsigned int id; bool mcm; - phy_interface_t p6_interface; - phy_interface_t p5_interface; + bool p6_configured; + bool p5_configured; p5_interface_select p5_intf_sel; bool p5_sgmii; u8 mirror_rx; --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82EC2C7618E for ; Fri, 21 Apr 2023 14:37:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231317AbjDUOht (ORCPT ); Fri, 21 Apr 2023 10:37:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232803AbjDUOhU (ORCPT ); Fri, 21 Apr 2023 10:37:20 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 854D310DD; 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bh=GIUfI9zYtHK2jC08JSP+sw+iUpDI1NVNrxb5eq8tcPY=; b=W00dq8GS3wgfK29ISk0WEEQ/rph3k9bFZTL1lJiq5/AP81j/VA5rLORYVC99l4EGqP MAqSV7nkfPp9F4Cpcw7U8nGEFGydiHEe7uUqKTPR9PTiVWj4rIymOiY/43m+accskQnU gaMi18M6rTW2+GOslfI3BHj15YZsd6YfYra/DGN0eF+zwyZRSRnd3lgdtXnsEjd70cYv P/mMyL39kWp8ERkt9WbyvqrWpaYbuqCOQVYWq0EL01Uuq3rmiy81I2L1pP0IGJxKnbJ0 +ITHs2E55XouT/hglZv3pXyDCA18TKTG6pBDN65ooynFTeMDAKtlYuPVYd5n+7exy9Mw xXtw== X-Gm-Message-State: AAQBX9djkrtEqcaqt7+sLS77UM8lfFqeLqMWdJKE2JvcnjwDHYt9sTlH YLdcL3nKYK+2+Z60hnXZmv0= X-Google-Smtp-Source: AKy350at4m7vdCl2YFdYMq3ekSHRb756GOmIXElLgvBQAuem9vck2/IxIws8+YBBhwPfX8U3p0vQdg== X-Received: by 2002:a17:906:5d0:b0:94e:ef09:544c with SMTP id t16-20020a17090605d000b0094eef09544cmr2370576ejt.10.1682087834761; Fri, 21 Apr 2023 07:37:14 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:14 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 09/22] net: dsa: mt7530: empty default case on mt7530_setup_port5() Date: Fri, 21 Apr 2023 17:36:35 +0300 Message-Id: <20230421143648.87889-10-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL There're two code paths for setting up port 5: mt7530_setup() -> mt7530_setup_port5() mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() On the first code path, priv->p5_intf_sel is either set to P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4 when mt7530_setup_port5() is run. On the second code path, priv->p5_intf_sel is set to P5_INTF_SEL_GMAC5 when mt7530_setup_port5() is run. Empty the default case which will never run but is needed nonetheless to handle all the remaining enumeration values. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 2f670e512415..be143da94add 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -933,9 +933,7 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) val &=3D ~MHWTRAP_P5_DIS; break; default: - dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", - priv->p5_intf_sel); - goto unlock_exit; + break; } =20 /* Setup RGMII settings */ @@ -965,7 +963,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) dev_dbg(ds->dev, "Setup P5, HWTRAP=3D0x%x, intf_sel=3D%s, phy-mode=3D%s\n= ", val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); =20 -unlock_exit: mutex_unlock(&priv->reg_mutex); } =20 --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABC5FC77B71 for ; Fri, 21 Apr 2023 14:38:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232873AbjDUOh7 (ORCPT ); Fri, 21 Apr 2023 10:37:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232766AbjDUOhV (ORCPT ); Fri, 21 Apr 2023 10:37:21 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9ED7DC660; Fri, 21 Apr 2023 07:37:18 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-5052caa1e32so2984504a12.2; Fri, 21 Apr 2023 07:37:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087837; x=1684679837; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dGp4Tpz0L6Hnx+AZWBjvMZvm9IQMQXkz0B/FgdPBTn4=; b=DKxnRcq+RzWJO70d64SCwn8dKlPjog49hc1bI/lDUd7zvlQYM1FDq/Uo0qUyQmhe6C XP29nVBG8TX2btLkfSZkKnuIZZD4/9USpgryKZHyukz1kwwLgkmrARL/z9tECfFyHF+C +L5anr9HLc5WuXgyatHdVLa7hvHrnr0L+MPIiofw/C25wuOmG2+0/ugEZuWQh7jdA8S1 DmqqAbadrq7BjVR3QyNXQiUHSw2pUsqQVFcj80FHg0Nh0QJwGfYGpGt8gCZJRPp1+F2m MztENz1X7w+8PIij286h4jj6YK7bG2T+D+RK3MZnbe2PcIauAxTTGMitEGzmGusGfDxN DRHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087837; x=1684679837; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dGp4Tpz0L6Hnx+AZWBjvMZvm9IQMQXkz0B/FgdPBTn4=; b=fvEG0Q46nZMeYQ/lf6hhf+/5eCSI+m0fgZvKlHFdBLtAk7XQh8ZQAc8dHvHS9xquW+ 6/XjXMGHHSTgcmA/xPW5FRe2XUj9vNJXUcDu1nNGVlCbluFnFm/sGdoKe+lyw9I8HbTy IaayyGVHnmLeDTI32eAE7wGVtuDuKJDvfqdzUgvfZItktl4X/KzjzAhluY6bJ0H/akoV IrtN2qOxUuMs5ULiMkQckw10bqzfk+5AcjrxUzL0hkB50dmfDD+nrU4l7uajfCmnCgmW 2+fN0RNhfUe6Bs3E55Q2fMGaTKugffT35NIjcnIxXCLaNtoW0LEMJvSe1Wz8dQFBYxt5 0Kbg== X-Gm-Message-State: AAQBX9eeIXKkv6D3u+T4NVihWgnuDCeuCefxcq8gwsmKq3/W20hpdxhG btLhWzLk6jTjKy7/uHBkWBU= X-Google-Smtp-Source: AKy350ZyJxzUXfFeHkyBC3lf1xyUpQmcxh9PNWSCXHCnxZOLSjFWKs9A4jyqL5PVYZjHgRPrZllv2g== X-Received: by 2002:a17:907:2090:b0:94a:5ecb:6ea7 with SMTP id pv16-20020a170907209000b0094a5ecb6ea7mr2424974ejb.43.1682087836909; Fri, 21 Apr 2023 07:37:16 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:16 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 10/22] net: dsa: mt7530: call port 6 setup from mt7530_mac_config() Date: Fri, 21 Apr 2023 17:36:36 +0300 Message-Id: <20230421143648.87889-11-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL mt7530_pad_clk_setup() is called if port 6 is enabled. It used to do more things than setting up port 6. That part was moved to more appropriate locations, mt7530_setup() and mt7530_pll_setup(). Now that all it does is set up port 6, rename it to mt7530_setup_port6(), and move it to a more appropriate location, under mt7530_mac_config(). Leave an empty mt7530_pad_clk_setup() to satisfy the pad_setup function pointer. This is the call path for setting up the ports before: mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() -> mt753x_pad_setup() -> mt7530_pad_clk_setup() This is after: mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() -> mt7530_setup_port6() Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index be143da94add..58eff6568d4c 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -401,7 +401,7 @@ static void mt7530_pll_setup(struct mt7530_priv *priv) =20 /* Setup port 6 interface mode and TRGMII TX circuit */ static int -mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; u32 ncpo1, ssc_delta, trgint, xtal; @@ -473,6 +473,12 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interf= ace_t interface) return 0; } =20 +static int +mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +{ + return 0; +} + static int mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) { @@ -2576,12 +2582,15 @@ mt7530_mac_config(struct dsa_switch *ds, int port, = unsigned int mode, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; + int ret; =20 - /* Only need to setup port5. */ - if (port !=3D 5) - return 0; - - mt7530_setup_port5(priv->ds, interface); + if (port =3D=3D 5) { + mt7530_setup_port5(priv->ds, interface); + } else if (port =3D=3D 6) { + ret =3D mt7530_setup_port6(priv->ds, interface); + if (ret) + return ret; + } =20 return 0; } --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2A99C7618E for ; Fri, 21 Apr 2023 14:38:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232853AbjDUOiZ (ORCPT ); Fri, 21 Apr 2023 10:38:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45726 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232786AbjDUOhY (ORCPT ); Fri, 21 Apr 2023 10:37:24 -0400 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE19F13FAF; Fri, 21 Apr 2023 07:37:20 -0700 (PDT) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-94eff00bcdaso288447666b.1; Fri, 21 Apr 2023 07:37:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087839; x=1684679839; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4KiBaVS3rBZL46ZkQA5szEuPGIfAQTTXY9i0okmVBlQ=; b=cZ6sRw0lbJpWLND6lATpwXgJ92zCE3aNNRpTtdZph7X3D7ft5vWHRKzIV5epNP1v96 2w2xjIsERO9EJOrPXYOnzYJpPx0Ce2umfFQz/dqR2dXzeU3o0VpnEsQSO3mBP5NBzUTW 5sU6pExF59smx7ZTWZsllRvG1fDZdmYBQjacd8AmP4BkRRXqRZVBvd42XzcYoYgx4ukO pEEM7emL57SXMJyMRQs8QV/fsxXTG5yHRzaOrS3xqqHrsxqdSKhWFz91Nt975t8/XLp5 Bsfaz26iztGa7H2Ndt1FENtsndXQGRGJxXj0SQfXNvkyYNc6ML3TbldTATqINp6c9ebG 9g9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087839; x=1684679839; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4KiBaVS3rBZL46ZkQA5szEuPGIfAQTTXY9i0okmVBlQ=; b=K7ZHXGYObO8lscymABqpRjwfglSYuFQ+27JhFkUY708b5JWNR/zXf8aZuwCTKmpA73 8MwAjMesDt15t+WdtIQXV1boGnLF8menxd6WeIBqx12AMPp3t9cLVEk4LeIyocpEprM1 61qDb1aEE6jOOqCQR4CUZIfVr1hIBqmRseF+wMBW2Y77Ca4oP7YNsoJMGjjpB1/YO8Js f+DrPNJdixJv6qqt3Rz4eZ6iNHCnLzfp82wl9wWqoeO6YGrV3oCHA33g3c3vkFC603QM SxE95IzoiVbUOJThnjxyVGQODBHBtMi8l+FrXl0DVjymW4eL2GsbmA+3BEITUBnBm0Xl 2C4w== X-Gm-Message-State: AAQBX9frv5ZB2qdUMG02iw1/XvO+YDkOYSnn1uT4epcWljucnSpgEpqu JuaVS7LaPlTpFJ8PeVZ8QVY= X-Google-Smtp-Source: AKy350YK6ZXedBig5mHmtOyoPrGMFSbVmiHuPdA1NfRLq4EnkOhsj3geYQNtVkOLVZKiA/kig5Xpcg== X-Received: by 2002:a17:906:f757:b0:94e:c142:df98 with SMTP id jp23-20020a170906f75700b0094ec142df98mr2497344ejb.60.1682087839104; Fri, 21 Apr 2023 07:37:19 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:18 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 11/22] net: dsa: mt7530: remove pad_setup function pointer Date: Fri, 21 Apr 2023 17:36:37 +0300 Message-Id: <20230421143648.87889-12-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL The pad_setup function pointer was introduced with 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a new hardware"). It was being used to set up the core clock and port 6 of the MT7530 switch, and pll of the MT7531 switch. All of these were moved to more appropriate locations, and it was never used for the switch on the MT7988 SoC. Therefore, this function pointer hasn't got a use anymore. Remove it. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 36 ++---------------------------------- drivers/net/dsa/mt7530.h | 3 --- 2 files changed, 2 insertions(+), 37 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 58eff6568d4c..a1627e20675d 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -473,18 +473,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfac= e_t interface) return 0; } =20 -static int -mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - -static int -mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - static void mt7531_pll_setup(struct mt7530_priv *priv) { @@ -2569,14 +2557,6 @@ static void mt7988_mac_port_get_caps(struct dsa_swit= ch *ds, int port, } } =20 -static int -mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *s= tate) -{ - struct mt7530_priv *priv =3D ds->priv; - - return priv->info->pad_setup(ds, state->interface); -} - static int mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) @@ -2743,8 +2723,6 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int = port, unsigned int mode, if (priv->p6_configured) break; =20 - mt753x_pad_setup(ds, state); - if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; break; @@ -3046,11 +3024,6 @@ static int mt753x_set_mac_eee(struct dsa_switch *ds,= int port, return 0; } =20 -static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interfa= ce) -{ - return 0; -} - static int mt7988_setup(struct dsa_switch *ds) { struct mt7530_priv *priv =3D ds->priv; @@ -3112,7 +3085,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7530_phy_write_c22, .phy_read_c45 =3D mt7530_phy_read_c45, .phy_write_c45 =3D mt7530_phy_write_c45, - .pad_setup =3D mt7530_pad_clk_setup, .mac_port_get_caps =3D mt7530_mac_port_get_caps, .mac_port_config =3D mt7530_mac_config, }, @@ -3124,7 +3096,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7530_phy_write_c22, .phy_read_c45 =3D mt7530_phy_read_c45, .phy_write_c45 =3D mt7530_phy_write_c45, - .pad_setup =3D mt7530_pad_clk_setup, .mac_port_get_caps =3D mt7530_mac_port_get_caps, .mac_port_config =3D mt7530_mac_config, }, @@ -3136,7 +3107,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7531_ind_c22_phy_write, .phy_read_c45 =3D mt7531_ind_c45_phy_read, .phy_write_c45 =3D mt7531_ind_c45_phy_write, - .pad_setup =3D mt7531_pad_setup, .cpu_port_config =3D mt7531_cpu_port_config, .mac_port_get_caps =3D mt7531_mac_port_get_caps, .mac_port_config =3D mt7531_mac_config, @@ -3149,7 +3119,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7531_ind_c22_phy_write, .phy_read_c45 =3D mt7531_ind_c45_phy_read, .phy_write_c45 =3D mt7531_ind_c45_phy_write, - .pad_setup =3D mt7988_pad_setup, .cpu_port_config =3D mt7988_cpu_port_config, .mac_port_get_caps =3D mt7988_mac_port_get_caps, .mac_port_config =3D mt7988_mac_config, @@ -3179,9 +3148,8 @@ mt7530_probe_common(struct mt7530_priv *priv) /* Sanity check if these required device operations are filled * properly. */ - if (!priv->info->sw_setup || !priv->info->pad_setup || - !priv->info->phy_read_c22 || !priv->info->phy_write_c22 || - !priv->info->mac_port_get_caps || + if (!priv->info->sw_setup || !priv->info->phy_read_c22 || + !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps || !priv->info->mac_port_config) return -EINVAL; =20 diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index c3a37a0f4843..cad9115de22b 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -696,8 +696,6 @@ struct mt753x_pcs { * @phy_write_c22: Holding the way writing PHY port using C22 * @phy_read_c45: Holding the way reading PHY port using C45 * @phy_write_c45: Holding the way writing PHY port using C45 - * @pad_setup: Holding the way setting up the bus pad for a certain - * MAC port * @phy_mode_supported: Check if the PHY type is being supported on a cert= ain * port * @mac_port_validate: Holding the way to set addition validate type for a @@ -718,7 +716,6 @@ struct mt753x_info { int regnum); int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad, int regnum, u16 val); - int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface); int (*cpu_port_config)(struct dsa_switch *ds, int port); void (*mac_port_get_caps)(struct dsa_switch *ds, int port, struct phylink_config *config); --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67944C77B76 for ; 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Fri, 21 Apr 2023 07:37:21 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:21 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 12/22] net: dsa: mt7530: move XTAL check to mt7530_setup() Date: Fri, 21 Apr 2023 17:36:38 +0300 Message-Id: <20230421143648.87889-13-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL The crystal frequency concerns the switch core. The frequency should be checked when the switch is being set up so the driver can reject the unsupported hardware earlier and without requiring port 6 to be used. Move it to mt7530_setup(). Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index a1627e20675d..eaa36d41e8b9 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -408,13 +408,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfac= e_t interface) =20 xtal =3D mt7530_read(priv, MT7530_HWTRAP) & HWTRAP_XTAL_MASK; =20 - if (xtal =3D=3D HWTRAP_XTAL_20MHZ) { - dev_err(priv->dev, - "%s: MT7530 with a 20MHz XTAL is not supported!\n", - __func__); - return -EINVAL; - } - switch (interface) { case PHY_INTERFACE_MODE_RGMII: trgint =3D 0; @@ -2136,7 +2129,7 @@ mt7530_setup(struct dsa_switch *ds) struct mt7530_dummy_poll p; phy_interface_t interface; struct dsa_port *cpu_dp; - u32 id, val; + u32 id, val, xtal; int ret, i; =20 /* The parent node of master netdev which holds the common system @@ -2206,6 +2199,15 @@ mt7530_setup(struct dsa_switch *ds) return -ENODEV; } =20 + xtal =3D mt7530_read(priv, MT7530_HWTRAP) & HWTRAP_XTAL_MASK; + + if (xtal =3D=3D HWTRAP_XTAL_20MHZ) { + dev_err(priv->dev, + "%s: MT7530 with a 20MHz XTAL is not supported!\n", + __func__); + return -EINVAL; + } + /* Reset the switch through internal reset */ mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A4B1C77B76 for ; Fri, 21 Apr 2023 14:38:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232973AbjDUOio (ORCPT ); Fri, 21 Apr 2023 10:38:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232930AbjDUOhu (ORCPT ); Fri, 21 Apr 2023 10:37:50 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6439414449; Fri, 21 Apr 2023 07:37:25 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-504ecbfddd5so2535011a12.0; Fri, 21 Apr 2023 07:37:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087844; x=1684679844; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Mjphz1SQ1OrOeSXiEFiIHbe85DtwLLcL9ymLDLdzxyQ=; b=cnBzdhaf0YmeisJZ6iXXODyfaLPtrxG+H99ayoHqrmFef08H+RwHTPatggPRoIdvBG DQk4Yi2+zGHRCvJiEcPGc2oiZwcTUa8iqjUOAVZvHKqRCPLAU0aHQ7c6QUdiZ00NJp0B IPk34XNVA9+9Y5KiIvzh01nys8UkR7KXDkZqGpowv+DLAZPrNhSwICIJWFCT2zZHSP/E m1oz5h0XYOXTeRQgkMj1A0UfAcWje8uJGtBNtFqetJNy+9vpGHOTefudrid6DXtaIH0v VbVu4EkfrPQv3PC5tb/PMFcN7N3pG0N/Iji2jbLcMTwFvgozWDF2q4/JOjvOwabqKWnL EKfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087844; x=1684679844; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Mjphz1SQ1OrOeSXiEFiIHbe85DtwLLcL9ymLDLdzxyQ=; b=M179Vv7onQGFSWnGCfkUxQ5zxSdowL+ohDH6GHmEQH/R9Hq4RNNiTlKHpydAE709Ha VaJ1pmlnQ1Sk/wlUXytsdqQFU1Ck3sMoxlh4gNSUDDVzi2vXssVawfnLw/EWsmyVlxU+ 0KsLLwOGRSDZmT9FuzEE854/jAfyXwzvp1i0L+XAtjRf28x5s+6eY9eZsoB7qJLRQrvx lFvLmQHt9bdO6Hdn3AMArKkT72NuS4n5plAnUMw+W1+llbzrIAW41mTQ8y74nPPgS0rE XY/X+JWp9R/bpdZ596qEsZUqaXsr7Qng2QiN03vgYZ0B+EMsN7A8AgtIbiSVkuvmZZB4 ODNg== X-Gm-Message-State: AAQBX9fz/r3l/XJHVRaieLv4soNbKvYnZHvyzYMKwThXrfQ9C0VYlPWM MqZQLDj0jwiZXcqV4FA63GU= X-Google-Smtp-Source: AKy350avDHrE1AHP0UASNUQGVphBKj5SjdYshuXQsFJQXaQYtBX6uitIm0GFXha004CfnFV37GEqeA== X-Received: by 2002:a17:906:bc43:b0:94d:cebe:691 with SMTP id s3-20020a170906bc4300b0094dcebe0691mr2481692ejv.69.1682087843438; Fri, 21 Apr 2023 07:37:23 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:23 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 13/22] net: dsa: mt7530: move enabling port 6 to mt7530_setup_port6() Date: Fri, 21 Apr 2023 17:36:39 +0300 Message-Id: <20230421143648.87889-14-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Enable port 6 only when port 6 is being used. Update the comment on mt7530_setup() with a better explanation. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index eaa36d41e8b9..8fe9b1e6932c 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -404,7 +404,11 @@ static int mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; - u32 ncpo1, ssc_delta, trgint, xtal; + u32 ncpo1, ssc_delta, trgint, xtal, val; + + val =3D mt7530_read(priv, MT7530_MHWTRAP); + val &=3D ~MHWTRAP_P6_DIS; + mt7530_write(priv, MT7530_MHWTRAP, val); =20 xtal =3D mt7530_read(priv, MT7530_HWTRAP) & HWTRAP_XTAL_MASK; =20 @@ -2224,9 +2228,9 @@ mt7530_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_MASK, RD_TAP(16)); =20 - /* Enable port 6 */ + /* Enable PHY access and operate in manual mode */ val =3D mt7530_read(priv, MT7530_MHWTRAP); - val &=3D ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; + val &=3D ~MHWTRAP_PHY_ACCESS; val |=3D MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); =20 --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84DDDC77B71 for ; Fri, 21 Apr 2023 14:38:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232757AbjDUOit (ORCPT ); Fri, 21 Apr 2023 10:38:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232814AbjDUOhz (ORCPT ); Fri, 21 Apr 2023 10:37:55 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E1501446D; Fri, 21 Apr 2023 07:37:26 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-506bdf29712so12863101a12.0; Fri, 21 Apr 2023 07:37:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087846; x=1684679846; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BFh2cVYNVWNH2e/B2Q9MnHN00EOGUMNPev4l4KjaQPQ=; b=Eji7XoaMdAzuLZN23yCesTBFPa6Gx7VFBSGwOlbm/mx/yEJNkFWxiSoy9sZbvFQTDH R2EopPYhnBw+zEqsC4T4JFkh+694rd14o1UvM9MwCZf/PlBPn94u7J6jP9yQBjyXGtV/ zOqtHTFzvaAjPCUoWT2D32fCkRLRJm69Oac5h4L5mqxz8aWc2A27GxS/4rPBlkdn+J8B BBUQ9JlQkva8CaildHU7EdmGper61dY/YdcEp+vaEgCQpP8NuOhV3vjBE5B1592O4BcM J4lj4YYfzyhekhv78/Gah9fer+cNGvjrHJNLtUQHjurp1KtykNLJG5S50xOq1H4xv2Ui QJYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087846; x=1684679846; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BFh2cVYNVWNH2e/B2Q9MnHN00EOGUMNPev4l4KjaQPQ=; b=Xj46N0jlv92AzaryO6rgb+LZbItWyuvk9N5yQb9Jg8RdrVVLEb89u4WVXjvLEpvNPO KtIAfPPVD3K5TXLsRs1X1V649nY/quFULzBHv2d7msapGcDfyQckpxeDo8pwo+XL/42g huIHyczai39eK9mqC7OSkrImC/dXI0nH68OQdoaziMjqSPbDTWEMzgYV+kED4NIKW0zr ojAht8WuMGrr3rY6KJcn/py82qJ1eK2j0k0n5FERH1uPwD/zQm1nZKg0ItwOOg7QsA2d UBgpCoAoN0GLzoxaSMK+lAOweIpRbv84nS8qmaLe1v0yBmnS9fq12IQL1AVq0Y/BwcDV X65A== X-Gm-Message-State: AAQBX9dk/nLjvv/XwGXHUG/XO5bfIF2GCT9pikPfbcUutxCMzETmEEZU 6fAGcGU/7bl4dMA5wuV4UvA= X-Google-Smtp-Source: AKy350bbVTzvWAyw1Pzyv3JZvCjOYIu5BlzcjdfB57uvypsYM9/7E18cQ+2Yd/+fSMrEkeBkXKLRJA== X-Received: by 2002:a17:906:4557:b0:957:1dda:853b with SMTP id s23-20020a170906455700b009571dda853bmr2170790ejq.24.1682087845626; Fri, 21 Apr 2023 07:37:25 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:25 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 14/22] net: dsa: mt7530: switch to if/else statements on mt7530_setup_port6() Date: Fri, 21 Apr 2023 17:36:40 +0300 Message-Id: <20230421143648.87889-15-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL This code is from before this driver was converted to phylink API. Phylink deals with the unsupported interface cases before mt7530_setup_port6() is run. Therefore, the default case would never run. However, it must be defined nonetheless to handle all the remaining enumeration values, the phy-modes. Switch to if/else statements which simplifies the code. Change mt7530_setup_port6() to void now that there're no error cases left. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 35 +++++++++++------------------------ 1 file changed, 11 insertions(+), 24 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 8fe9b1e6932c..610828b56eac 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -400,11 +400,11 @@ static void mt7530_pll_setup(struct mt7530_priv *priv) } =20 /* Setup port 6 interface mode and TRGMII TX circuit */ -static int +static void mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; - u32 ncpo1, ssc_delta, trgint, xtal, val; + u32 ncpo1, ssc_delta, xtal, val; =20 val =3D mt7530_read(priv, MT7530_MHWTRAP); val &=3D ~MHWTRAP_P6_DIS; @@ -412,16 +412,18 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfa= ce_t interface) =20 xtal =3D mt7530_read(priv, MT7530_HWTRAP) & HWTRAP_XTAL_MASK; =20 - switch (interface) { - case PHY_INTERFACE_MODE_RGMII: - trgint =3D 0; - break; - case PHY_INTERFACE_MODE_TRGMII: - trgint =3D 1; + if (interface =3D=3D PHY_INTERFACE_MODE_RGMII) { + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, + P6_INTF_MODE(0)); + } else { + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, + P6_INTF_MODE(1)); + if (xtal =3D=3D HWTRAP_XTAL_25MHZ) ssc_delta =3D 0x57; else ssc_delta =3D 0x87; + if (priv->id =3D=3D ID_MT7621) { /* PLL frequency: 150MHz: 1.2GBit */ if (xtal =3D=3D HWTRAP_XTAL_40MHZ) @@ -434,17 +436,7 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfac= e_t interface) if (xtal =3D=3D HWTRAP_XTAL_25MHZ) ncpo1 =3D 0x1400; } - break; - default: - dev_err(priv->dev, "xMII interface %d not supported\n", - interface); - return -EINVAL; - } =20 - mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, - P6_INTF_MODE(trgint)); - - if (trgint) { /* Disable the MT7530 TRGMII clocks */ core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); =20 @@ -466,8 +458,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface= _t interface) /* Enable the MT7530 TRGMII clocks */ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); } - - return 0; } =20 static void @@ -2568,14 +2558,11 @@ mt7530_mac_config(struct dsa_switch *ds, int port, = unsigned int mode, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; - int ret; =20 if (port =3D=3D 5) { mt7530_setup_port5(priv->ds, interface); } else if (port =3D=3D 6) { - ret =3D mt7530_setup_port6(priv->ds, interface); - if (ret) - return ret; + mt7530_setup_port6(priv->ds, interface); } =20 return 0; --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE261C7618E for ; Fri, 21 Apr 2023 14:38:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232986AbjDUOix (ORCPT ); Fri, 21 Apr 2023 10:38:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232766AbjDUOiE (ORCPT ); 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Fri, 21 Apr 2023 07:37:27 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 15/22] net: dsa: mt7530: set TRGMII RD TAP if trgmii is being used Date: Fri, 21 Apr 2023 17:36:41 +0300 Message-Id: <20230421143648.87889-16-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL This code sets the Read Data (RD) TAP value to 16 for all TRGMII control registers. The for loop iterates over all the TRGMII control registers, and mt7530_rmw() function is used to perform a read-modify-write operation on each register's RD_TAP field to set its value to 16. This operation is used to tune the timing of the read data signal in TRGMII to match the TX signal of the link partner. Run this if trgmii is being used. Since this code doesn't lower the driving, there's no apparent benefit to run this if trgmii is not being used. Add a comment to explain the code. Thanks to =E8=B6=99=E7=9A=8E=E5=AE=8F (Landen Chao) for pointing out what t= he code does. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 610828b56eac..029d3129bb8b 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -404,7 +404,7 @@ static void mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; - u32 ncpo1, ssc_delta, xtal, val; + u32 ncpo1, ssc_delta, i, xtal, val; =20 val =3D mt7530_read(priv, MT7530_MHWTRAP); val &=3D ~MHWTRAP_P6_DIS; @@ -457,6 +457,11 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfac= e_t interface) =20 /* Enable the MT7530 TRGMII clocks */ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); + + /* Set the Read Data TAP value of the MT7530 TRGMII */ + for (i =3D 0; i < NUM_TRGMII_CTRL; i++) + mt7530_rmw(priv, MT7530_TRGMII_RD(i), + RD_TAP_MASK, RD_TAP(16)); } } =20 @@ -2214,10 +2219,6 @@ mt7530_setup(struct dsa_switch *ds) mt7530_write(priv, MT7530_TRGMII_TD_ODT(i), TD_DM_DRVP(8) | TD_DM_DRVN(8)); =20 - for (i =3D 0; i < NUM_TRGMII_CTRL; i++) - mt7530_rmw(priv, MT7530_TRGMII_RD(i), - RD_TAP_MASK, RD_TAP(16)); - /* Enable PHY access and operate in manual mode */ val =3D mt7530_read(priv, MT7530_MHWTRAP); val &=3D ~MHWTRAP_PHY_ACCESS; --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82C8FC77B71 for ; Fri, 21 Apr 2023 14:39:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232837AbjDUOjI (ORCPT ); Fri, 21 Apr 2023 10:39:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232832AbjDUOiX (ORCPT ); Fri, 21 Apr 2023 10:38:23 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E33E2146D4; Fri, 21 Apr 2023 07:37:31 -0700 (PDT) Received: by mail-ed1-x533.google.com with SMTP id 4fb4d7f45d1cf-5050497df77so2590070a12.1; Fri, 21 Apr 2023 07:37:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087850; x=1684679850; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FZ8YgUYPk1BlgEuRR44l+Fg104ZW02BZsA3SV8H37Js=; b=U5NHcKalC4+8sMwdwp4mGjS2snuxVPW3Sugcax6GJMa+CeydeXKVqrErLFqKrDVhVN 3uNX7HHL0dyhzkWY2Y/lc80X+qcMts66PadQIDeNLn/hvpm6un2kHwLRz14Jv0JX/2Vl lNnKIvyDaIjxleo+ixSeNoxEPUcOwNvxMJ7860/DchZ/nUQnNkMNBj4dK+bD/UQvgoRN bA/IB4W/AvS7ZYwFC+JWqhbFS/zwsFQyV3REmIlx356/ZbBSRPc8QOJcIup1ZLcmxcK+ CgGqdv6/WM4RuOi1zpaFuMyrTpym1krNVMGyZl3ztXQ43Tyy6rSP1RRSOY+fVgWnP06T U5dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087850; x=1684679850; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FZ8YgUYPk1BlgEuRR44l+Fg104ZW02BZsA3SV8H37Js=; b=j3Zzyw4unjEviEsWCCLr6yCnhZAOWQDD7yhquCYG13fCf1U8uXjmppMSv9aW6zHgdm l+4OPs4xUhB6T6TZfDvpE4nTFxKw/4sIhGn2+neUWg1YtqMAxc7xzRMhD7eIzOBJjiuY UmYv87CZyNL58GNnIHl5RwQNLWXfXDKEvTlIAyhfq0KDz3IhbWx8PJhsdoumjzHAStwT DNMAI6o4wHPMabgSynGBx6CYeBzgFWNvP7Uqp/TlYNKdp6+NyOGLYp0KEvqsp0T8uEy3 LgaTte+Ywt6sktwBf37tkPcHQzADhsevUVgWE+1Ygg3W/DT5DmGb9Kp8oQqL88U8LXLr G8sA== X-Gm-Message-State: AAQBX9d0mklPr7xzBJmnQnX6bLZj4HxRVSjN+iueGNu/harEYJd97HhM kMsWlDTfF72WB+8fUIdi5uI= X-Google-Smtp-Source: AKy350Yn9RipJy2SbwmUEVL08A6pIXKIY+5qeS1WhOyzZ8b43mMhNv+4vGwG7GeisZVmC8rSXNgzdg== X-Received: by 2002:a17:907:9603:b0:94e:6dc8:7ba7 with SMTP id gb3-20020a170907960300b0094e6dc87ba7mr2959685ejc.34.1682087850021; Fri, 21 Apr 2023 07:37:30 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:29 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 16/22] net: dsa: mt7530: move lowering port 5 RGMII driving to mt7530_setup() Date: Fri, 21 Apr 2023 17:36:42 +0300 Message-Id: <20230421143648.87889-17-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Move lowering Tx driving of rgmii on port 5 to right before lowering of Tx driving of trgmii on port 6 on mt7530_setup(). This way, the switch should consume less power regardless of port 5 being used. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 029d3129bb8b..5466259fd99b 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -938,10 +938,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, = phy_interface_t interface) /* P5 RGMII TX Clock Control: delay x */ mt7530_write(priv, MT7530_P5RGMIITXCR, CSR_RGMII_TXC_CFG(0x10 + tx_delay)); - - /* reduce P5 RGMII Tx driving, 8mA */ - mt7530_write(priv, MT7530_IO_DRV_CR, - P5_IO_CLK_DRV(1) | P5_IO_DATA_DRV(1)); } =20 mt7530_write(priv, MT7530_MHWTRAP, val); @@ -2214,6 +2210,10 @@ mt7530_setup(struct dsa_switch *ds) =20 mt7530_pll_setup(priv); =20 + /* Lower P5 RGMII Tx driving, 8mA */ + mt7530_write(priv, MT7530_IO_DRV_CR, + P5_IO_CLK_DRV(1) | P5_IO_DATA_DRV(1)); + /* Lower Tx driving for TRGMII path */ for (i =3D 0; i < NUM_TRGMII_CTRL; i++) mt7530_write(priv, MT7530_TRGMII_TD_ODT(i), --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D185C77B71 for ; Fri, 21 Apr 2023 14:39:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232854AbjDUOjM (ORCPT ); Fri, 21 Apr 2023 10:39:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232855AbjDUOiZ (ORCPT ); Fri, 21 Apr 2023 10:38:25 -0400 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D944610DD; Fri, 21 Apr 2023 07:37:33 -0700 (PDT) Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-5066ce4f725so2508061a12.1; Fri, 21 Apr 2023 07:37:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087852; x=1684679852; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QL82S92PhjBdYfMxindC7dNu43LqusGvD9gOD5L3A2g=; b=bKD2PiaWlSQ8fki7UcZX0yKrc00KrG55tW4wCF3mwt+64q32ybCgNLbl1ad+5I5avz oGYmtQU12vKk7tUHMxqOgP+rPs0fOnOwCUKUlzVKB5c8FD85wUc0fLnzCwWAXEhIG8ZP USVps0ZH6DAcGtUD1LwBymYbYCWG3nriM0pcCfO2fmSOuzruQ1RaM6bUy1didxjJwPPZ sMclDWOM5wSOo6C14S5eoVBXT+JImitb+GV7pomFNjjcqT8wwH1W5GkgUi2iWgEwENq3 e7k6JritmPMtrB/wkStkMxoxklPEmfSzTmEZIFGFUPMBdzoBBJCBnxeIKmoyVpbzoLpE f2sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087852; x=1684679852; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QL82S92PhjBdYfMxindC7dNu43LqusGvD9gOD5L3A2g=; b=a4PhkpYELgjx2AOvU67Djq2ewOjp33/LCv1T0rjZzrojU2AiQx+zrTaypKI82O+nb5 TsSk42EuAwdbTLV5xx9MVJC+yVzSg1+68RQtE2Boz1/EcPhrxB+fSZfj07UQwGDvIf7+ 5vyyi5Ho/vzmkgmKePe8+1E9Ww0WLkLoq1giJsTS6CZfGpFPdIi7RqzGjCw+2cTs4CRR xDlsSDurZT3Q3b9suvkI7Z//LV4Npd/e6w/8exhFP8SvFq1VV6R0jRFLFq4mwhBQU/81 uHsFVTGb6lE7c4QSeoHpBXW5jaQvbscz/c12GYcdTjFw4hvKKfoyh4CR5vVpOnCiFFf4 vngw== X-Gm-Message-State: AAQBX9cLpE4lIf6PDnr6utUxXhnhkfQ4c9q3w8I3f25OEnNjYb2KJs7h b62nuFaG/EUoMuDPH9m55aQ= X-Google-Smtp-Source: AKy350Zz7vHaBqbcCW8whFHVzYvj2/PnK3KBZofM+qOcv70sDcdPH+IJR6ZEBIq25sled6qYWm94nA== X-Received: by 2002:a17:906:10ce:b0:94f:5242:a03a with SMTP id v14-20020a17090610ce00b0094f5242a03amr3010132ejv.63.1682087852178; Fri, 21 Apr 2023 07:37:32 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:31 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 17/22] net: dsa: mt7530: fix port capabilities for MT7988 Date: Fri, 21 Apr 2023 17:36:43 +0300 Message-Id: <20230421143648.87889-18-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL On the switch on the MT7988 SoC, there are only 4 PHYs. That's port 0 to 3. Set the internal phy cases to '0 ... 3'. There's no need to clear the config->supported_interfaces bitmap before reporting the supported interfaces as all bits in the bitmap will already be initialized to zero when the phylink_config structure is allocated. There's no code that would change the bitmap beforehand. Remove it. Fixes: 110c18bfed41 ("net: dsa: mt7530: introduce driver for MT7988 built-i= n switch") Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 5466259fd99b..899fc52193e1 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2538,10 +2538,8 @@ static void mt7531_mac_port_get_caps(struct dsa_swit= ch *ds, int port, static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { - phy_interface_zero(config->supported_interfaces); - switch (port) { - case 0 ... 4: /* Internal phy */ + case 0 ... 3: /* Internal phy */ __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); break; --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30BF6C7618E for ; Fri, 21 Apr 2023 14:39:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232280AbjDUOja (ORCPT ); Fri, 21 Apr 2023 10:39:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232926AbjDUOim (ORCPT ); Fri, 21 Apr 2023 10:38:42 -0400 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 174AD6A64; Fri, 21 Apr 2023 07:37:36 -0700 (PDT) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-95316faa3a8so290889866b.2; Fri, 21 Apr 2023 07:37:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087854; x=1684679854; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jH8yEvnmoXsEC6mwOHxF9ajbBlURmLh7zMT6HCy7q6s=; b=ENF4e5isJoqDkxBVkvDe8GJi2ftvSaFaD9Evi4Dpli45lx1araC/pu5qZV+/ri9OtW aLau62aVwy1AxwQ40Q861kxGjJrGhSrI1L4hqchjhCa90Ei2Ilsgnjfz9Z95jOiSfSYn f6UXow6rBZMOv2mKFxv/FKlTe6VZ2HfQHmnuKMaVE6tKv6oyVGmqx+QH2UQEDTeJSn0p ep5Ni6mPdJFC95jJgJK0wy4PHbT/ixsdvFwW7mRUDeUb7AlmtPDOmfvt236IFJLLXMeH wrDdQUbMEHPFIOhUAAz9tAIca0emd32Y/WkYY/01pNXqm+JlfHzGj/rNQmTURFQWIHMT UKDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087854; x=1684679854; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jH8yEvnmoXsEC6mwOHxF9ajbBlURmLh7zMT6HCy7q6s=; b=IUulgBCUdvnzRjf/ZxlTQOq0Y3SQN8/ZaxUa7hY9sZvSS7lZPwwfXEvI0r/pIuzHgy BoI8dZZEz+Lrz8zdSD3DjEAZZOa/8ludBnNc6oe2TOchv8f5XYcJQ+BrtF6HPsTdmakQ I0dxg+b/BqjrkMlyxQA++lSGUtZA9LOqTBD7sp7/HIebjh5rRMDchydlkF09EgbvXccs Zu+UTKh77X+yEsSMz5AsZjQDeExdpsaiyjZsyxZm0QJsklJ1t4hFx3tsQkGyzo1k2Ccf mHVKs1omC5h/zq3b5hJT4G6VZvJlZPhXnUuURd0e1JeC7XvXnMVpOfS8b5ixSjWLS0ZY /iHQ== X-Gm-Message-State: AAQBX9dm7o1Xxvi3p1fKBeG7FrP0u2j4hc0kzh2wez9Ba5d9KxFclhKx 8Ta8FP5dtCZNKoLjgkeC1eQ= X-Google-Smtp-Source: AKy350b2NWrqoFCF1UDO3y+zEU6fJrF42fw4MyZhMWLq7M5pUTgsmJD+/3oPcIpL57kyJxjWUvr7Mg== X-Received: by 2002:a17:906:9b45:b0:94e:5679:d950 with SMTP id ep5-20020a1709069b4500b0094e5679d950mr2004270ejc.72.1682087854350; Fri, 21 Apr 2023 07:37:34 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:34 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 18/22] net: dsa: mt7530: remove .mac_port_config for MT7988 and make it optional Date: Fri, 21 Apr 2023 17:36:44 +0300 Message-Id: <20230421143648.87889-19-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL For the switch on the MT7988 SoC, the code in mac_port_config for MT7988 is not needed as the interface of the CPU port is already handled on mt7988_mac_port_get_caps(). Make .mac_port_config optional. Before calling priv->info->mac_port_config(), if there's no mac_port_config member in the priv->info table, exit mt753x_mac_config() successfully. Remove mac_port_config from the sanity check as the sanity check requires a pointer to a mac_port_config function to be non-NULL. This will fail for MT7988 as mac_port_config won't be a member of its info table. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Co-authored-by: Daniel Golle Signed-off-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 899fc52193e1..a66a762cb5db 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2619,17 +2619,6 @@ static bool mt753x_is_mac_port(u32 port) return (port =3D=3D 5 || port =3D=3D 6); } =20 -static int -mt7988_mac_config(struct dsa_switch *ds, int port, unsigned int mode, - phy_interface_t interface) -{ - if (dsa_is_cpu_port(ds, port) && - interface =3D=3D PHY_INTERFACE_MODE_INTERNAL) - return 0; - - return -EINVAL; -} - static int mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) @@ -2670,6 +2659,9 @@ mt753x_mac_config(struct dsa_switch *ds, int port, un= signed int mode, { struct mt7530_priv *priv =3D ds->priv; =20 + if (!priv->info->mac_port_config) + return 0; + return priv->info->mac_port_config(ds, port, mode, state->interface); } =20 @@ -3113,7 +3105,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c45 =3D mt7531_ind_c45_phy_write, .cpu_port_config =3D mt7988_cpu_port_config, .mac_port_get_caps =3D mt7988_mac_port_get_caps, - .mac_port_config =3D mt7988_mac_config, }, }; EXPORT_SYMBOL_GPL(mt753x_table); @@ -3141,8 +3132,7 @@ mt7530_probe_common(struct mt7530_priv *priv) * properly. */ if (!priv->info->sw_setup || !priv->info->phy_read_c22 || - !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps || - !priv->info->mac_port_config) + !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps) return -EINVAL; =20 priv->id =3D priv->info->id; --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C08EBC77B7D for ; Fri, 21 Apr 2023 14:39:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233018AbjDUOjc (ORCPT ); Fri, 21 Apr 2023 10:39:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232976AbjDUOiq (ORCPT ); Fri, 21 Apr 2023 10:38:46 -0400 Received: from mail-ed1-x535.google.com (mail-ed1-x535.google.com [IPv6:2a00:1450:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46CFC146F1; Fri, 21 Apr 2023 07:37:38 -0700 (PDT) Received: by mail-ed1-x535.google.com with SMTP id 4fb4d7f45d1cf-506b8c6bbdbso2564776a12.1; Fri, 21 Apr 2023 07:37:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087856; x=1684679856; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pJixOmbyU63hr3o8Ny5bPEY6KG/MRULhsuG3NEyY2DA=; b=Az8QzgGdCSu60O6ATgA/rltMAPtJHOIM/fNgqvUDwljrF188OKCwkUXZsu9TgceVlb XJkSkwuYk0q0LODKP0Ys/gPMEnMs9C7UjYnIRN2N2nUjxcSEfGJV5UOJaNW14e4cnTYS YYp2rdotxte5IvfGjycuGpQ4F0+Bt1P7PL7yLDSziXrWL+u+6Mhk9Y28soqpLcZy2kyl a7qeOJUJqOqXZDshLZd/zrlM0EyAayg+R+R9eZLdjHd+ki27hhuw/u3u1c3kY2DzOkpQ slACzNFllLRnXORAQTxHP8XqHNQ5mNJVS40wnXF5bfsNVrvW0XRlQPB711YFwXXbW8rJ 1lHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087856; x=1684679856; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pJixOmbyU63hr3o8Ny5bPEY6KG/MRULhsuG3NEyY2DA=; b=KSFeu6suJF2oYKV+JXYTRU41t6eAa0sra7p2HoYAUQC5VKXF8QRK3T2NI4Mz/Y+sUe hvht1Px5j6fUf9acrsaYYXISVxNwlxsive7oRif/rTf6vFcxArQsZia/BoPwnuT7IYMh ltB66TFN/epHQ4aLgB6zF3lF80wM7+bEWOmD/l7X8psPWuof09LGRxDn4GJ/v1vnLMr+ M1E+B+DtPwmZViYRp552SNMkyKGDd8sZAkId2glRIO45lK++szi9DTLsgqmFY2PjXpaD iKAJ/VfyWJM6rCa/gGPFccuDVJTzfhCgfGj13+n+UqpIOWe3VPe5HN3OeB1HMrYEJG8M PbGQ== X-Gm-Message-State: AAQBX9dpdMjjpuOPDvWvuqQcT4Tp9p+ca8iJHbtoE0PCSUPKKZsNtXyh +1GFguuIiue7t1GAXoqfV0o= X-Google-Smtp-Source: AKy350Z4aXH6j521XmbeT5SJQ3g67clUrR3I/0wqCunsH6aDT41k5hSTcXbseqGcd/WUsvruZjAStw== X-Received: by 2002:a17:906:250b:b0:94f:a309:67b9 with SMTP id i11-20020a170906250b00b0094fa30967b9mr2483806ejb.6.1682087856476; Fri, 21 Apr 2023 07:37:36 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:36 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 19/22] net: dsa: mt7530: set interrupt register only for MT7530 Date: Fri, 21 Apr 2023 17:36:45 +0300 Message-Id: <20230421143648.87889-20-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Setting this register related to interrupts is only needed for the MT7530 switch. Make an exclusive check to ensure this. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle Tested-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index a66a762cb5db..ac1e3c58aaac 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2034,7 +2034,7 @@ mt7530_setup_irq(struct mt7530_priv *priv) } =20 /* This register must be set for MT7530 to properly fire interrupts */ - if (priv->id !=3D ID_MT7531) + if (priv->id =3D=3D ID_MT7530 || priv->id =3D=3D ID_MT7621) mt7530_set(priv, MT7530_TOP_SIG_CTRL, TOP_SIG_CTRL_NORMAL); =20 ret =3D request_threaded_irq(priv->irq, NULL, mt7530_irq_thread_fn, --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 143FEC7618E for ; Fri, 21 Apr 2023 14:39:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233046AbjDUOjp (ORCPT ); Fri, 21 Apr 2023 10:39:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232991AbjDUOjH (ORCPT ); Fri, 21 Apr 2023 10:39:07 -0400 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D708014F58; Fri, 21 Apr 2023 07:37:41 -0700 (PDT) Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-508418b6d59so3056896a12.3; Fri, 21 Apr 2023 07:37:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087858; x=1684679858; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JzoT/KmMIWGXd84HSAhqqXVj6Wxc4XH+Xw/4O9lmsTc=; b=g2RMVEYoRmsDAMKPmJikqWI/qnDOB9DlBY+ZE8gvCNAJmL69pKinZmG5PGjxPlNaat FTWjOESJcCtRVa42iaqGgREtxXe/2zUwhh26Nt9+tH02uyx8hD8O190M+LojA7xrxD9y OD3L+gKvVz1qDjeAUNtKtbdHmXt10VXP+kq71avQ0r517UivyBICqRNbV03ElgqCMdjT d+1DNJdpNqtywk8N9ID7u+8gE0wt7JTY2osrVaBPH+G8uWrzChl9NB2CKIkgIi7vab4g ELXN93NH4I42ueYQhveL8CZc68I4fI96lU+FV5FMKNXb2u6ZOcEddkK8Qip8v4GEgB0Z pgcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087858; x=1684679858; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JzoT/KmMIWGXd84HSAhqqXVj6Wxc4XH+Xw/4O9lmsTc=; b=cC5LoGK2CRmBcCxdU91F1xm1OAxG+7uJmjHBOWz82AvDJ5rV9cfR0VUzi9hPTf6G7Y xIlQDoyfsYRfZ+bm6McIN/3vlBzubyyi0YtuobTkglLKeLyPFEorN3gl2RXe/2SjfCJH toQHjhoIIGZwrBHXTJoqHjXosfrV++JpzY5/o8DAQdxEkg1FuBapYcAPQxIyMyaNT09e Ugxuv79e6JGc8vqTDFvIzO3KwhbVEeM6pVOPR1JUCq55yvPg2qunX34DnLVNMIA3fxkL ZZpr3oJ1XiDWoXaG7xy89HGhiHte8LeYKZxr00aFzz9D2HrlpvaMhqn2do5dFOzXMdPj CfPQ== X-Gm-Message-State: AAQBX9cOUBB0h+6u4bRCvhfK/IP8JXqQP9pYEMzy3UBfyVd+QVKAwwtv Cu2UC9d6jW4BJmoITBU1NU4= X-Google-Smtp-Source: AKy350bvezXZMnE6qY8pddEadrjpfPhij7bGJMvQiC8tz2+VfLMVSEi3Ck1X+2zbazpQV9tGb8ihvQ== X-Received: by 2002:a17:906:cb94:b0:94a:826c:df57 with SMTP id mf20-20020a170906cb9400b0094a826cdf57mr2385888ejb.39.1682087858639; Fri, 21 Apr 2023 07:37:38 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:38 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 20/22] net: dsa: mt7530: force link-down on MACs before reset on MT7530 Date: Fri, 21 Apr 2023 17:36:46 +0300 Message-Id: <20230421143648.87889-21-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Force link-down on all MACs before internal reset. Let's follow suit commit 728c2af6ad8c ("net: mt7531: ensure all MACs are powered down before reset"). Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index ac1e3c58aaac..8ece3d0d820c 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2203,6 +2203,10 @@ mt7530_setup(struct dsa_switch *ds) return -EINVAL; } =20 + /* Force link-down on all MACs before internal reset */ + for (i =3D 0; i < MT7530_NUM_PORTS; i++) + mt7530_write(priv, MT7530_PMCR_P(i), PMCR_FORCE_LNK); + /* Reset the switch through internal reset */ mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 477BEC77B71 for ; Fri, 21 Apr 2023 14:40:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232675AbjDUOkB (ORCPT ); Fri, 21 Apr 2023 10:40:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231858AbjDUOjM (ORCPT ); Fri, 21 Apr 2023 10:39:12 -0400 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E6E7146F7; Fri, 21 Apr 2023 07:37:48 -0700 (PDT) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-956ff2399b1so215486766b.3; Fri, 21 Apr 2023 07:37:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682087861; x=1684679861; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W0SY+q/k+wS5cublkhfKHLZdZ3m6Ag++oyfwsyKHc0g=; b=kBf0AAsjHp4U5y3+MzkHRrO38ehIlSzJRXNBJqmpaXFoVzhpsimVNyS8UHd1xGBHr2 gTcfIZdepaVGARInpgJvzntBu+s5R3ue33aLGWNBGXiXwQDIMyPHEi9tFytdm4odsh+2 NGNw9H25bNGOIEt0UH+lA8SllwREVDIHz8TUvI8zUS54CiPm/Y4zlszpWScf+xvVSC0X tNk5LqGeb3XzyCYXiCiEhRFRxeGUTZy/wbXMxS5fgRlvtivhoRF5mygNsfzrMtv60AYK NRui5IZJG79rW+mA+C9yp7NTPcSrWKGBQ186gH4G3ishsrYbgXmlAlKp9PSx5dTEPQCt 8neQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682087861; x=1684679861; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W0SY+q/k+wS5cublkhfKHLZdZ3m6Ag++oyfwsyKHc0g=; b=YppCcWn2xH+YXVHyCgmv5IvfWYX+18AeRZfysBmSuzLv8cnQfeoi4phJUrdi8AFSMQ 04kXqCOcJkhWz17K+013BvcN3oST+QpZNCGUZSTSww66k3VcRa2CDDdQkyKuj9rTZUtA dxVFm9hEEUo/IrajfrQYg53PwRqWz/KM4/6c8Tu4/GrsVF9uNS7U7N+cPr6jYNGiiOQ/ 8TaxN7+nUu35Qw5Gn05H2GlBGbmlLlEqH1INdnTOsqdtMNDsbQ4HKVkDjo4AIrQChEfn iMbgBHH4Vpne0SBvX1NRz78vqmkbM7orRp80f00g+UlN9ueQh3fmqI66wNXJ240dkMDE d/cg== X-Gm-Message-State: AAQBX9dBgoyT3E3Eec0LFcajTrP4bjLGLZ/tZxO3Bie2USe1v5UN7hYA cmpT5Ov2v8UhblCTyam9SzM= X-Google-Smtp-Source: AKy350YEJ9c4wS6IdmP5YmcPkF6gbz9rvCYvFkcpxmG8P7rEekcu6rw6pnjDiWPAczyEs8Fii33FuA== X-Received: by 2002:a17:907:70a:b0:957:2e48:5657 with SMTP id xb10-20020a170907070a00b009572e485657mr1745618ejb.68.1682087860787; Fri, 21 Apr 2023 07:37:40 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id q27-20020a170906361b00b0094e1026bc66sm2168244ejb.140.2023.04.21.07.37.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 07:37:40 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 21/22] net: dsa: mt7530: get rid of useless error returns on phylink code path Date: Fri, 21 Apr 2023 17:36:47 +0300 Message-Id: <20230421143648.87889-22-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Remove error returns on the cases where they are already handled with the function the mac_port_get_caps member points to. mt7531_mac_config() is also called from mt7531_cpu_port_config() outside of phylink but the port and interface modes are already handled there. Change the functions and the mac_port_config function pointer to void now that there're no error returns anymore. Remove mt753x_is_mac_port() that used to help the said error returns. On mt7531_mac_config(), switch to if statements to simplify the code. Remove internal phy cases from mt753x_phylink_mac_config() as there is no configuration to be done for them. There's also no need to check the interface mode as that's already handled with the function the mac_port_get_caps member points to. Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle Tested-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 81 ++++++++-------------------------------- drivers/net/dsa/mt7530.h | 2 +- 2 files changed, 17 insertions(+), 66 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 8ece3d0d820c..3d19e06061cb 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2556,7 +2556,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switc= h *ds, int port, } } =20 -static int +static void mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { @@ -2567,22 +2567,14 @@ mt7530_mac_config(struct dsa_switch *ds, int port, = unsigned int mode, } else if (port =3D=3D 6) { mt7530_setup_port6(priv->ds, interface); } - - return 0; } =20 -static int mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port, - phy_interface_t interface, - struct phy_device *phydev) +static void mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port, + phy_interface_t interface, + struct phy_device *phydev) { u32 val; =20 - if (priv->p5_sgmii) { - dev_err(priv->dev, "RGMII mode is not available for port %d\n", - port); - return -EINVAL; - } - val =3D mt7530_read(priv, MT7531_CLKGEN_CTRL); val |=3D GP_CLK_EN; val &=3D ~GP_MODE_MASK; @@ -2610,20 +2602,14 @@ static int mt7531_rgmii_setup(struct mt7530_priv *p= riv, u32 port, case PHY_INTERFACE_MODE_RGMII_ID: break; default: - return -EINVAL; + break; } } - mt7530_write(priv, MT7531_CLKGEN_CTRL, val); =20 - return 0; -} - -static bool mt753x_is_mac_port(u32 port) -{ - return (port =3D=3D 5 || port =3D=3D 6); + mt7530_write(priv, MT7531_CLKGEN_CTRL, val); } =20 -static int +static void mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { @@ -2631,42 +2617,21 @@ mt7531_mac_config(struct dsa_switch *ds, int port, = unsigned int mode, struct phy_device *phydev; struct dsa_port *dp; =20 - if (!mt753x_is_mac_port(port)) { - dev_err(priv->dev, "port %d is not a MAC port\n", port); - return -EINVAL; - } - - switch (interface) { - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_RXID: - case PHY_INTERFACE_MODE_RGMII_TXID: + if (phy_interface_mode_is_rgmii(interface)) { dp =3D dsa_to_port(ds, port); phydev =3D dp->slave->phydev; - return mt7531_rgmii_setup(priv, port, interface, phydev); - case PHY_INTERFACE_MODE_SGMII: - case PHY_INTERFACE_MODE_NA: - case PHY_INTERFACE_MODE_1000BASEX: - case PHY_INTERFACE_MODE_2500BASEX: - /* handled in SGMII PCS driver */ - return 0; - default: - return -EINVAL; + mt7531_rgmii_setup(priv, port, interface, phydev); } - - return -EINVAL; } =20 -static int +static void mt753x_mac_config(struct dsa_switch *ds, int port, unsigned int mode, const struct phylink_link_state *state) { struct mt7530_priv *priv =3D ds->priv; =20 - if (!priv->info->mac_port_config) - return 0; - - return priv->info->mac_port_config(ds, port, mode, state->interface); + if (priv->info->mac_port_config) + priv->info->mac_port_config(ds, port, mode, state->interface); } =20 static struct phylink_pcs * @@ -2695,30 +2660,18 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, in= t port, unsigned int mode, u32 mcr_cur, mcr_new; =20 switch (port) { - case 0 ... 4: /* Internal phy */ - if (state->interface !=3D PHY_INTERFACE_MODE_GMII && - state->interface !=3D PHY_INTERFACE_MODE_INTERNAL) - goto unsupported; - break; case 5: /* Port 5, can be used as a CPU port. */ if (priv->p5_configured) break; =20 - if (mt753x_mac_config(ds, port, mode, state) < 0) - goto unsupported; + mt753x_mac_config(ds, port, mode, state); break; case 6: /* Port 6, can be used as a CPU port. */ if (priv->p6_configured) break; =20 - if (mt753x_mac_config(ds, port, mode, state) < 0) - goto unsupported; + mt753x_mac_config(ds, port, mode, state); break; - default: -unsupported: - dev_err(ds->dev, "%s: unsupported %s port: %i\n", - __func__, phy_modes(state->interface), port); - return; } =20 mcr_cur =3D mt7530_read(priv, MT7530_PMCR_P(port)); @@ -2811,7 +2764,6 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int por= t) struct mt7530_priv *priv =3D ds->priv; phy_interface_t interface; int speed; - int ret; =20 switch (port) { case 5: @@ -2836,9 +2788,8 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int por= t) else speed =3D SPEED_1000; =20 - ret =3D mt7531_mac_config(ds, port, MLO_AN_FIXED, interface); - if (ret) - return ret; + mt7531_mac_config(ds, port, MLO_AN_FIXED, interface); + mt7530_write(priv, MT7530_PMCR_P(port), PMCR_CPU_PORT_SETTING(priv->id)); mt753x_phylink_pcs_link_up(&priv->pcs[port].pcs, MLO_AN_FIXED, diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index cad9115de22b..ee2b3d2d6258 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -722,7 +722,7 @@ struct mt753x_info { void (*mac_port_validate)(struct dsa_switch *ds, int port, phy_interface_t interface, unsigned long *supported); - int (*mac_port_config)(struct dsa_switch *ds, int port, + void (*mac_port_config)(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface); }; --=20 2.37.2 From nobody Fri Sep 20 20:38:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77E93C7618E for ; Fri, 21 Apr 2023 14:40:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232855AbjDUOkF (ORCPT ); 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Fri, 21 Apr 2023 07:37:42 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Daniel Golle , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 22/22] net: dsa: mt7530: rename p5_intf_sel and use only for MT7530 switch Date: Fri, 21 Apr 2023 17:36:48 +0300 Message-Id: <20230421143648.87889-23-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230421143648.87889-1-arinc.unal@arinc9.com> References: <20230421143648.87889-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL The p5_intf_sel pointer is used to store the information of whether PHY muxing is used or not. PHY muxing is a feature specific to port 5 of the MT7530 switch. Do not use it for other switch models. Rename the pointer to p5_mode to store the mode the port is being used in. Rename the p5_interface_select enum to mt7530_p5_mode, the string representation to mt7530_p5_mode_str, and the enum elements. If PHY muxing is not detected, the default mode, GMAC5, will be used. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 61 ++++++++++++++++------------------------ drivers/net/dsa/mt7530.h | 15 +++++----- 2 files changed, 32 insertions(+), 44 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 3d19e06061cb..63b108ef5e0e 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -873,19 +873,15 @@ mt7530_set_ageing_time(struct dsa_switch *ds, unsigne= d int msecs) return 0; } =20 -static const char *p5_intf_modes(unsigned int p5_interface) -{ - switch (p5_interface) { - case P5_DISABLED: - return "DISABLED"; - case P5_INTF_SEL_PHY_P0: - return "PHY P0"; - case P5_INTF_SEL_PHY_P4: - return "PHY P4"; - case P5_INTF_SEL_GMAC5: - return "GMAC5"; +static const char *mt7530_p5_mode_str(unsigned int mode) +{ + switch (mode) { + case MUX_PHY_P0: + return "MUX PHY P0"; + case MUX_PHY_P4: + return "MUX PHY P4"; default: - return "unknown"; + return "GMAC5"; } } =20 @@ -902,23 +898,21 @@ static void mt7530_setup_port5(struct dsa_switch *ds,= phy_interface_t interface) val |=3D MHWTRAP_MANUAL | MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS; val &=3D ~MHWTRAP_P5_RGMII_MODE & ~MHWTRAP_PHY0_SEL; =20 - switch (priv->p5_intf_sel) { - case P5_INTF_SEL_PHY_P0: - /* MT7530_P5_MODE_GPHY_P0: 2nd GMAC -> P5 -> P0 */ + switch (priv->p5_mode) { + case MUX_PHY_P0: + /* MUX_PHY_P0: P0 -> P5 -> SoC MAC */ val |=3D MHWTRAP_PHY0_SEL; fallthrough; - case P5_INTF_SEL_PHY_P4: - /* MT7530_P5_MODE_GPHY_P4: 2nd GMAC -> P5 -> P4 */ + case MUX_PHY_P4: + /* MUX_PHY_P4: P4 -> P5 -> SoC MAC */ val &=3D ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS; =20 /* Setup the MAC by default for the cpu port */ mt7530_write(priv, MT7530_PMCR_P(5), 0x56300); break; - case P5_INTF_SEL_GMAC5: - /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ - val &=3D ~MHWTRAP_P5_DIS; - break; default: + /* GMAC5: P5 -> SoC MAC or external PHY */ + val &=3D ~MHWTRAP_P5_DIS; break; } =20 @@ -942,8 +936,8 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) =20 mt7530_write(priv, MT7530_MHWTRAP, val); =20 - dev_dbg(ds->dev, "Setup P5, HWTRAP=3D0x%x, intf_sel=3D%s, phy-mode=3D%s\n= ", - val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); + dev_dbg(ds->dev, "Setup P5, HWTRAP=3D0x%x, mode=3D%s, phy-mode=3D%s\n", v= al, + mt7530_p5_mode_str(priv->p5_mode), phy_modes(interface)); =20 mutex_unlock(&priv->reg_mutex); } @@ -2261,13 +2255,11 @@ mt7530_setup(struct dsa_switch *ds) if (ret) return ret; =20 - /* Setup port 5 */ - if (!dsa_is_unused_port(ds, 5)) { - priv->p5_intf_sel =3D P5_INTF_SEL_GMAC5; - } else { + /* Check for PHY muxing on port 5 */ + if (dsa_is_unused_port(ds, 5)) { /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY. - * Set priv->p5_intf_sel to the appropriate value if PHY muxing - * is detected. + * Set priv->p5_mode to the appropriate value if PHY muxing is + * detected. */ for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, @@ -2291,17 +2283,17 @@ mt7530_setup(struct dsa_switch *ds) } id =3D of_mdio_parse_addr(ds->dev, phy_node); if (id =3D=3D 0) - priv->p5_intf_sel =3D P5_INTF_SEL_PHY_P0; + priv->p5_mode =3D MUX_PHY_P0; if (id =3D=3D 4) - priv->p5_intf_sel =3D P5_INTF_SEL_PHY_P4; + priv->p5_mode =3D MUX_PHY_P4; } of_node_put(mac_np); of_node_put(phy_node); break; } =20 - if (priv->p5_intf_sel =3D=3D P5_INTF_SEL_PHY_P0 || - priv->p5_intf_sel =3D=3D P5_INTF_SEL_PHY_P4) + if (priv->p5_mode =3D=3D MUX_PHY_P0 || + priv->p5_mode =3D=3D MUX_PHY_P4) mt7530_setup_port5(ds, interface); } =20 @@ -2444,9 +2436,6 @@ mt7531_setup(struct dsa_switch *ds) MT7531_EXT_P_MDIO_12); } =20 - if (!dsa_is_unused_port(ds, 5)) - priv->p5_intf_sel =3D P5_INTF_SEL_GMAC5; - mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, MT7531_GPIO0_INTERRUPT); =20 diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index ee2b3d2d6258..8187d77603f8 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -673,13 +673,12 @@ struct mt7530_port { struct phylink_pcs *sgmii_pcs; }; =20 -/* Port 5 interface select definitions */ +/* Port 5 mode definitions of the MT7530 switch */ typedef enum { - P5_DISABLED, - P5_INTF_SEL_PHY_P0, - P5_INTF_SEL_PHY_P4, - P5_INTF_SEL_GMAC5, -} p5_interface_select; + GMAC5, + MUX_PHY_P0, + MUX_PHY_P4, +} mt7530_p5_mode; =20 struct mt7530_priv; =20 @@ -746,7 +745,7 @@ struct mt753x_info { * is already configured * @p5_configured: Flag for distinguishing if port 5 of the MT7531 switch * is already configured - * @p5_intf_sel: Holding the current port 5 interface select + * @p5_mode: Holding the current port 5 mode of the MT7530 switch * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch * has got SGMII * @irq: IRQ number of the switch @@ -768,7 +767,7 @@ struct mt7530_priv { bool mcm; bool p6_configured; bool p5_configured; - p5_interface_select p5_intf_sel; + mt7530_p5_mode p5_mode; bool p5_sgmii; u8 mirror_rx; u8 mirror_tx; --=20 2.37.2