From nobody Sat Sep 21 00:04:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 601ACC77B76 for ; Fri, 21 Apr 2023 03:48:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233730AbjDUDsD (ORCPT ); Thu, 20 Apr 2023 23:48:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233699AbjDUDr5 (ORCPT ); Thu, 20 Apr 2023 23:47:57 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71D374481 for ; Thu, 20 Apr 2023 20:47:54 -0700 (PDT) X-UUID: 4814df98dff711edb6b9f13eb10bd0fe-20230421 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=53j2Zr5g1CHI4OUeg0l8fF8afX2h7OOtLqGtKgBQpXk=; b=FppUqMuU4gcz0NMiKgDRxxsoMasocPzdOVEdDOh/ogmK0x/LBuVOGAtFYtc9FlnOBHR/oXMlC8HB8JWF+XEynP2jv42YHL3QVBFdBkjWIJIXjI6SkGrZzeuu6Poam07d6PKIB8J+mDJ/q9nWZi/1ul2hF1GRZ+O3mh4CKVjpFbk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22,REQID:e2c56df9-0e1e-4870-b85a-a8417bedd029,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:90 X-CID-INFO: VERSION:1.1.22,REQID:e2c56df9-0e1e-4870-b85a-a8417bedd029,IP:0,URL :0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:90 X-CID-META: VersionHash:120426c,CLOUDID:b398c684-cd9c-45f5-8134-710979e3df0e,B ulkID:230421114749ZN2FUYUP,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-UUID: 4814df98dff711edb6b9f13eb10bd0fe-20230421 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 977640144; Fri, 21 Apr 2023 11:47:47 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 21 Apr 2023 11:47:46 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 21 Apr 2023 11:47:46 +0800 From: To: Daniel Lezcano , Thomas Gleixner , Matthias Brugger , AngeloGioacchino Del Regno , "Maciej W . Rozycki" , John Stultz CC: , , , , , Chun-Hung Wu , , , Subject: [PATCH linux-next v4 2/4] clocksource/drivers/mmio: Export clocksource_mmio_init() Date: Fri, 21 Apr 2023 11:46:47 +0800 Message-ID: <20230421034649.15247-3-walter.chang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230421034649.15247-1-walter.chang@mediatek.com> References: <20230421034649.15247-1-walter.chang@mediatek.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chun-Hung Wu Export clocksource_mmio_init() and clocksource_mmio_readl_up() to support building clocksource driver as module, such as timer-mediatek.c. Signed-off-by: Chun-Hung Wu --- drivers/clocksource/mmio.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c index 9de751531831..b08b2f9d7a8b 100644 --- a/drivers/clocksource/mmio.c +++ b/drivers/clocksource/mmio.c @@ -21,6 +21,7 @@ u64 clocksource_mmio_readl_up(struct clocksource *c) { return (u64)readl_relaxed(to_mmio_clksrc(c)->reg); } +EXPORT_SYMBOL_GPL(clocksource_mmio_readl_up); =20 u64 clocksource_mmio_readl_down(struct clocksource *c) { @@ -46,9 +47,9 @@ u64 clocksource_mmio_readw_down(struct clocksource *c) * @bits: Number of valid bits * @read: One of clocksource_mmio_read*() above */ -int __init clocksource_mmio_init(void __iomem *base, const char *name, - unsigned long hz, int rating, unsigned bits, - u64 (*read)(struct clocksource *)) +int clocksource_mmio_init(void __iomem *base, const char *name, + unsigned long hz, int rating, unsigned bits, + u64 (*read)(struct clocksource *)) { struct clocksource_mmio *cs; =20 @@ -68,3 +69,4 @@ int __init clocksource_mmio_init(void __iomem *base, cons= t char *name, =20 return clocksource_register_hz(&cs->clksrc, hz); } +EXPORT_SYMBOL_GPL(clocksource_mmio_init); --=20 2.18.0