From nobody Wed Dec 17 14:01:39 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92985C6FD18 for ; Wed, 19 Apr 2023 23:49:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232558AbjDSXtv (ORCPT ); Wed, 19 Apr 2023 19:49:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52366 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230087AbjDSXtt (ORCPT ); Wed, 19 Apr 2023 19:49:49 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C668E422B; Wed, 19 Apr 2023 16:49:48 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33JMxEJt122545; Wed, 19 Apr 2023 17:59:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1681945154; bh=s+OQWFCu3zyAaFAhgfkOp5nAc2yoSWeX9OpLH/9boQU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xQL5F6OxBJB9XnyqwbwK3xyKYJCO1pQ83flM3B3mt/BbpAFT3lTwA9CmqYLKFdZtx pJ3Pk9y/XzP1G50Qrp5dY2R5FoND2mT7bW6XptT6GBN2Tiic7z9tc+SuMXq6xdjV+V p5K9Q4g1XDhiGfpcpzpxE+tVxWsYkQAgvQvT79FU= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33JMxExq012970 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 19 Apr 2023 17:59:14 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 19 Apr 2023 17:59:14 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 19 Apr 2023 17:59:14 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33JMxEWx058344; Wed, 19 Apr 2023 17:59:14 -0500 From: Nishanth Menon To: Krzysztof Kozlowski , Rob Herring , Vignesh Raghavendra CC: , , , Tero Kristo , Nishanth Menon , Jan Kiszka Subject: [PATCH 1/7] arm64: dts: ti: k3-am654-base-board: Add missing pinmux wkup_uart, mcu_uart and mcu_i2c Date: Wed, 19 Apr 2023 17:59:07 -0500 Message-ID: <20230419225913.663448-2-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230419225913.663448-1-nm@ti.com> References: <20230419225913.663448-1-nm@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Many of the definitions depend on pinmux done by the bootloader. Be explicit about the pinmux for functionality and completeness. Signed-off-by: Nishanth Menon --- .../arm64/boot/dts/ti/k3-am654-base-board.dts | 34 +++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/bo= ot/dts/ti/k3-am654-base-board.dts index 592ab2b54cb3..7a79ef51bcc8 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -120,6 +120,15 @@ vdd_mmc1_sd: fixedregulator-sd { }; =20 &wkup_pmx0 { + wkup_uart0_pins_default: wkup-uart0-pins-default { + pinctrl-single,pins =3D < + AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */ + AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */ + AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0= _CTSn */ + AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART= 0_RTSn */ + >; + }; + wkup_i2c0_pins_default: wkup-i2c0-pins-default { pinctrl-single,pins =3D < AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ @@ -156,6 +165,15 @@ AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSP= I1_CLK.WKUP_GPIO0_25 */ >; }; =20 + mcu_uart0_pins_default: mcu-uart0-pins-default { + pinctrl-single,pins =3D < + AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_R= XD */ + AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_= TXD */ + AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_C= TSn */ + AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART= 0_RTSn */ + >; + }; + mcu_cpsw_pins_default: mcu-cpsw-pins-default { pinctrl-single,pins =3D < AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */ @@ -179,6 +197,13 @@ AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MD= IO0_MDC */ AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ >; }; + + mcu_i2c0_pins_default: mcu-i2c0-pins-default { + pinctrl-single,pins =3D < + AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */ + AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */ + >; + }; }; =20 &main_pmx0 { @@ -269,11 +294,14 @@ AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_A= PWM_OUT */ &wkup_uart0 { /* Wakeup UART is used by System firmware */ status =3D "reserved"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wkup_uart0_pins_default>; }; =20 &mcu_uart0 { status =3D "okay"; - /* Default pinmux */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mcu_uart0_pins_default>; }; =20 &main_uart0 { @@ -305,7 +333,9 @@ pca9554: gpio@39 { =20 &mcu_i2c0 { status =3D "okay"; - /* Default pinmux */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mcu_i2c0_pins_default>; + clock-frequency =3D <400000>; }; =20 &main_i2c0 { --=20 2.40.0