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[213.36.7.13]) by smtp.gmail.com with ESMTPSA id m22-20020a7bcb96000000b003f17131952fsm2388519wmi.29.2023.04.19.07.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Apr 2023 07:41:59 -0700 (PDT) From: Arnaud Vrac Date: Wed, 19 Apr 2023 16:41:14 +0200 Subject: [PATCH 07/11] drm/msm/dpu: add sspp cursor blocks to msm8998 hw catalog MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230419-dpu-tweaks-v1-7-d1bac46db075@freebox.fr> References: <20230419-dpu-tweaks-v1-0-d1bac46db075@freebox.fr> In-Reply-To: <20230419-dpu-tweaks-v1-0-d1bac46db075@freebox.fr> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Arnaud Vrac X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3909; i=avrac@freebox.fr; h=from:subject:message-id; bh=ipqD9/zdMktG6jZ1bu4phPRN971JkBvc1JQ2BoirwDo=; b=owEBbQKS/ZANAwAIAXED/9m7NDSrAcsmYgBkP/2l9vG3IDNbhr+jhjy4oTIFGSW36RdaDadrV 86j61QWHFOJAjMEAAEIAB0WIQSUwb/ndwkXHdZ/QQZxA//ZuzQ0qwUCZD/9pQAKCRBxA//ZuzQ0 q8FhEACdwf8oEgYArrqf178JDo2Lso4yghQW7d+5aHzqw5icxRDKOQ+2nbEnyR6Y8hk2r0t+Y2F GhWBQpncaZL1tqDzAGnG2O8hxNG+J34LZlqaXdD51p+Ksmmd+Vyvji9TrYhsNdPLjRhLAjUV2gd NfHlUU06QerURwjrCJjiIVOlUzoUyWIMFQIakQtxpYB0LnBPS+WDASAYzT511FThnuf57ayLh9G Vs05zPmzHllDQ7TJpbF/UvoN/8yQh2k/1m+gs5EtDcia0HdcsZoZtLX9JtwA/Piw2hjOZ9eVDvA flcGI3183GRrfyeVKC+7AW9B8ttL6d7ou1c1wZPK4ZauMgvMUlW1PTRESP7UFLbPv0mWIIywgDu DwCd6WW+GsGUpOhCD3HGPRyIYjHTF53x2c6YQa09a/E/kW5CjpKaTjpNnENWTGEac2d0MoGJROT qOXZH75BWv2mNjQYAdoKNlt6vSlZy5+FKSZdfYrNKd5ZxS0rEnZLJCsjXAAJPGO+I/RhlpJ4X2o CK4ZEmPkOp2w8UKmBXGgo+/4UMQkQRfwYqfWvui3dVDFiobcS2PmTikKGXLz863AWN+bMNgRULl i1CsHl8O8INZjKgnDMQjKdAeWZcD8ihSTYqSxiaotCnkgUH5OLA9kHPD/pKRit4yWDNselmFtGk 5n4VAVHk4hbV6Ww== X-Developer-Key: i=avrac@freebox.fr; a=openpgp; fpr=6225092072BB58E3CEEC091E75392A176D952DB4 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that cursor sspp blocks can be used for cursor planes, enable them on msm8998. The dma sspp blocks that were assigned to cursor planes can now be used for overlay planes instead. Signed-off-by: Arnaud Vrac Reviewed-by: Dmitry Baryshkov --- .../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 8 +++-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 34 ++++++++++++++++++= ++++ 2 files changed, 40 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h b/driv= ers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h index b07e8a9941f79..7de393b0f91d7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h @@ -90,10 +90,14 @@ static const struct dpu_sspp_cfg msm8998_sspp[] =3D { sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, 0x1ac, DMA_MSM8998_MASK, sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1), - SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, 0x1ac, DMA_CURSOR_MSM8998_MASK, + SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, 0x1ac, DMA_MSM8998_MASK, sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA2), - SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, 0x1ac, DMA_CURSOR_MSM8998_MASK, + SSPP_BLK("sspp_11", SSPP_DMA3, 0x2a000, 0x1ac, DMA_MSM8998_MASK, sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA3), + SSPP_BLK("sspp_12", SSPP_CURSOR0, 0x34000, 0x1ac, DMA_CURSOR_MSM8998_MASK, + msm8998_cursor_sblk_0, 2, SSPP_TYPE_CURSOR, DPU_CLK_CTRL_CURSOR0), + SSPP_BLK("sspp_13", SSPP_CURSOR1, 0x36000, 0x1ac, DMA_CURSOR_MSM8998_MASK, + msm8998_cursor_sblk_1, 10, SSPP_TYPE_CURSOR, DPU_CLK_CTRL_CURSOR1), }; =20 static const struct dpu_lm_cfg msm8998_lm[] =3D { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/d= rm/msm/disp/dpu1/dpu_hw_catalog.c index 8d5d782a43398..f34fa704936bc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -242,6 +242,22 @@ static const uint32_t wb2_formats[] =3D { DRM_FORMAT_XBGR4444, }; =20 +static const uint32_t cursor_formats[] =3D { + DRM_FORMAT_ARGB8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_RGBA8888, + DRM_FORMAT_BGRA8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_ABGR1555, + DRM_FORMAT_RGBA5551, + DRM_FORMAT_BGRA5551, + DRM_FORMAT_ARGB4444, + DRM_FORMAT_ABGR4444, + DRM_FORMAT_RGBA4444, + DRM_FORMAT_BGRA4444, +}; + /************************************************************* * SSPP sub blocks config *************************************************************/ @@ -300,6 +316,19 @@ static const uint32_t wb2_formats[] =3D { .virt_num_formats =3D ARRAY_SIZE(plane_formats), \ } =20 +#define _CURSOR_SBLK(num) \ + { \ + .maxdwnscale =3D SSPP_UNITY_SCALE, \ + .maxupscale =3D SSPP_UNITY_SCALE, \ + .smart_dma_priority =3D 0, \ + .src_blk =3D {.name =3D STRCAT("sspp_src_", num), \ + .id =3D DPU_SSPP_SRC, .base =3D 0x00, .len =3D 0x150,}, \ + .format_list =3D cursor_formats, \ + .num_formats =3D ARRAY_SIZE(cursor_formats), \ + .virt_format_list =3D cursor_formats, \ + .virt_num_formats =3D ARRAY_SIZE(cursor_formats), \ + } + static const struct dpu_sspp_sub_blks msm8998_vig_sblk_0 =3D _VIG_SBLK("0", 0, DPU_SSPP_SCALER_QSEED3); static const struct dpu_sspp_sub_blks msm8998_vig_sblk_1 =3D @@ -309,6 +338,11 @@ static const struct dpu_sspp_sub_blks msm8998_vig_sblk= _2 =3D static const struct dpu_sspp_sub_blks msm8998_vig_sblk_3 =3D _VIG_SBLK("3", 0, DPU_SSPP_SCALER_QSEED3); =20 +static const struct dpu_sspp_sub_blks msm8998_cursor_sblk_0 =3D + _CURSOR_SBLK("12"); +static const struct dpu_sspp_sub_blks msm8998_cursor_sblk_1 =3D + _CURSOR_SBLK("13"); + static const struct dpu_rotation_cfg dpu_rot_sc7280_cfg_v2 =3D { .rot_maxheight =3D 1088, .rot_num_formats =3D ARRAY_SIZE(rotation_v2_formats), --=20 2.40.0