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[83.8.121.70]) by smtp.gmail.com with ESMTPSA id r20-20020a056402019400b0050476da5160sm4427443edv.45.2023.04.16.03.18.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Apr 2023 03:18:32 -0700 (PDT) From: Artur Weber To: Krzysztof Kozlowski Cc: Alim Akhtar , Rob Herring , Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Michael Turquette , Stephen Boyd , Arnd Bergmann , Olof Johansson , soc@kernel.org, Russell King , Daniel Lezcano , Kukjin Kim , Mauro Carvalho Chehab , Vinod Koul , Kishon Vijay Abraham I , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, linux-media@vger.kernel.org, linux-phy@lists.infradead.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber Subject: [PATCH 12/12] ARM: dts: exynos: Add Samsung Galaxy Tab 3 8.0 boards Date: Sun, 16 Apr 2023 12:16:24 +0200 Message-Id: <20230416101624.15866-13-aweber.kernel@gmail.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230416101624.15866-1-aweber.kernel@gmail.com> References: <20230416101624.15866-1-aweber.kernel@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Introduce support for the Galaxy Tab 3 8.0 series of boards: - Samsung Galaxy Tab 3 8.0 WiFi (SM-T310/lt01wifi) - Samsung Galaxy Tab 3 8.0 3G (SM-T311/lt013g) - Samsung Galaxy Tab 3 8.0 LTE (SM-T315/lt01lte) What works: - Display and backlight - Touchscreen (without touchkeys) - GPIO buttons, hall sensor - WiFi and Bluetooth - USB, fuel gauge, charging (partial) - Accelerometer and magnetometer - WiFi model only: light sensor Signed-off-by: Artur Weber --- arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/exynos4212-tab3-3g8.dts | 30 + arch/arm/boot/dts/exynos4212-tab3-lte8.dts | 43 + arch/arm/boot/dts/exynos4212-tab3-wifi8.dts | 25 + arch/arm/boot/dts/exynos4212-tab3.dtsi | 1175 +++++++++++++++++++ 5 files changed, 1276 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4212-tab3-3g8.dts create mode 100644 arch/arm/boot/dts/exynos4212-tab3-lte8.dts create mode 100644 arch/arm/boot/dts/exynos4212-tab3-wifi8.dts create mode 100644 arch/arm/boot/dts/exynos4212-tab3.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index efe4152e5846..e5f63b636637 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -217,6 +217,9 @@ dtb-$(CONFIG_ARCH_EXYNOS4) +=3D \ exynos4210-smdkv310.dtb \ exynos4210-trats.dtb \ exynos4210-universal_c210.dtb \ + exynos4212-tab3-3g8.dtb \ + exynos4212-tab3-lte8.dtb \ + exynos4212-tab3-wifi8.dtb \ exynos4412-i9300.dtb \ exynos4412-i9305.dtb \ exynos4412-itop-elite.dtb \ diff --git a/arch/arm/boot/dts/exynos4212-tab3-3g8.dts b/arch/arm/boot/dts/= exynos4212-tab3-3g8.dts new file mode 100644 index 000000000000..c503a2d351dd --- /dev/null +++ b/arch/arm/boot/dts/exynos4212-tab3-3g8.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 WiFi board device tree + * source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos4212-tab3.dtsi" + +/ { + model =3D "Samsung Galaxy Tab 3 8.0 3G (SM-T311) based on Exynos4212"; + compatible =3D "samsung,t311", "samsung,tab3", "samsung,exynos4212", "sam= sung,exynos4"; + chassis-type =3D "tablet"; +}; + +/* Pin control sleep state overrides */ + +&sleep0 { + PIN_SLP(gpb-5, INPUT, UP); +}; + +&sleep1 { + PIN_SLP(gpl0-0, OUT0, NONE); + PIN_SLP(gpl1-0, OUT0, NONE); + PIN_SLP(gpl2-4, OUT0, NONE); + PIN_SLP(gpm3-3, OUT1, NONE); +}; diff --git a/arch/arm/boot/dts/exynos4212-tab3-lte8.dts b/arch/arm/boot/dts= /exynos4212-tab3-lte8.dts new file mode 100644 index 000000000000..158c6a2e24bf --- /dev/null +++ b/arch/arm/boot/dts/exynos4212-tab3-lte8.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 WiFi board device tree + * source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos4212-tab3.dtsi" + +/ { + model =3D "Samsung Galaxy Tab 3 8.0 LTE (SM-T315) based on Exynos4212"; + compatible =3D "samsung,t315", "samsung,tab3", "samsung,exynos4212", "sam= sung,exynos4"; + chassis-type =3D "tablet"; +}; + +&sleep0 { + PIN_SLP(gpa0-4, INPUT, UP); + PIN_SLP(gpa0-5, INPUT, UP); + + PIN_SLP(gpb-5, INPUT, UP); + + PIN_SLP(gpc0-0, PREV, NONE); + PIN_SLP(gpc1-3, INPUT, NONE); + + PIN_SLP(gpf1-6, INPUT, NONE); + PIN_SLP(gpf2-2, PREV, NONE); +}; + +&sleep1 { + PIN_SLP(gpl0-0, PREV, NONE); + + PIN_SLP(gpl1-0, PREV, NONE); + + PIN_SLP(gpl2-1, INPUT, DOWN); + PIN_SLP(gpl2-2, INPUT, DOWN); + PIN_SLP(gpl2-4, OUT0, NONE); + PIN_SLP(gpl2-5, PREV, NONE); + + PIN_SLP(gpm3-3, OUT1, NONE); +}; diff --git a/arch/arm/boot/dts/exynos4212-tab3-wifi8.dts b/arch/arm/boot/dt= s/exynos4212-tab3-wifi8.dts new file mode 100644 index 000000000000..0527a75710d8 --- /dev/null +++ b/arch/arm/boot/dts/exynos4212-tab3-wifi8.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 WiFi board device tree + * source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos4212-tab3.dtsi" + +/ { + model =3D "Samsung Galaxy Tab 3 8.0 WiFi (SM-T310) based on Exynos4212"; + compatible =3D "samsung,t310", "samsung,tab3", "samsung,exynos4212", "sam= sung,exynos4"; + chassis-type =3D "tablet"; +}; + +&i2c_lightsensor { + /* Capella Micro CM3323 color light sensor */ + colorsensor@10 { + compatible =3D "capella,cm3323"; + reg =3D <0x10>; + }; +}; diff --git a/arch/arm/boot/dts/exynos4212-tab3.dtsi b/arch/arm/boot/dts/exy= nos4212-tab3.dtsi new file mode 100644 index 000000000000..b8ad5497506c --- /dev/null +++ b/arch/arm/boot/dts/exynos4212-tab3.dtsi @@ -0,0 +1,1175 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos4212 based Galaxy Tab 3 board common source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos4212.dtsi" +#include "exynos4412-ppmu-common.dtsi" +#include "exynos-mfc-reserved-memory.dtsi" +#include +#include +#include +#include +#include +#include "exynos-pinctrl.h" + +/ { + compatible =3D "samsung,tab3", "samsung,exynos4212", "samsung,exynos4"; + + memory@40000000 { + device_type =3D "memory"; + + /* Technically 2GB, but last 1GB is flaky, so we ignore it for now */ + reg =3D <0x40000000 0x3FC00000>; + }; + + chosen { + stdout-path =3D &serial_2; + + /* Default S-BOOT bootloader loads initramfs here */ + linux,initrd-start =3D <0x42000000>; + linux,initrd-end =3D <0x42800000>; + }; + + firmware@204f000 { + compatible =3D "samsung,secure-firmware"; + reg =3D <0x0204F000 0x1000>; + }; + + fixed-rate-clocks { + xxti { + compatible =3D "samsung,clock-xxti"; + clock-frequency =3D <0>; + }; + + xusbxti { + compatible =3D "samsung,clock-xusbxti"; + clock-frequency =3D <24000000>; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpio_keys>; + + key-power { + gpios =3D <&gpx2 7 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "power"; + debounce-interval =3D <10>; + wakeup-source; + }; + + key-up { + gpios =3D <&gpx2 2 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "volume down"; + debounce-interval =3D <10>; + }; + + key-down { + gpios =3D <&gpx3 3 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "volume up"; + debounce-interval =3D <10>; + }; + + key-home { + gpios =3D <&gpx1 2 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "home"; + debounce-interval =3D <10>; + }; + + switch-hall-sensor { + gpios =3D <&gpx2 4 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + linux,can-disable; + label =3D "hall effect sensor"; + debounce-interval =3D <10>; + wakeup-source; + }; + }; + + vbatt_reg: voltage-regulator-1 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VBATT"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-always-on; + }; + + backlight_reset_supply: voltage-regulator-2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "BACKLIGHT_ENVDDIO"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&backlight_reset>; + gpio =3D <&gpm0 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + lcd_enable_supply: voltage-regulator-3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "LCD_VDD_2.2V"; + regulator-min-microvolt =3D <2200000>; + regulator-max-microvolt =3D <2200000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lcd_en>; + gpio =3D <&gpc0 1 GPIO_ACTIVE_HIGH>; /* LCD_EN */ + enable-active-high; + }; + + i2c_max77693: i2c-gpio-1 { + compatible =3D "i2c-gpio"; + sda-gpios =3D <&gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios =3D <&gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + pmic@66 { + compatible =3D "maxim,max77693"; + interrupt-parent =3D <&gpx1>; + interrupts =3D <5 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&max77693_irq>; + reg =3D <0x66>; + + regulators { + esafeout1_reg: ESAFEOUT1 { + regulator-name =3D "ESAFEOUT1"; + regulator-boot-on; + }; + + esafeout2_reg: ESAFEOUT2 { + regulator-name =3D "ESAFEOUT2"; + }; + + charger_reg: CHARGER { + regulator-name =3D "CHARGER"; + regulator-min-microamp =3D <60000>; + regulator-max-microamp =3D <2580000>; + regulator-boot-on; + }; + }; + + charger { + compatible =3D "maxim,max77693-charger"; + + maxim,constant-microvolt =3D <4350000>; + maxim,min-system-microvolt =3D <3600000>; + maxim,thermal-regulation-celsius =3D <100>; + maxim,battery-overcurrent-microamp =3D <3500000>; + maxim,charge-input-threshold-microvolt =3D <4300000>; + }; + }; + }; + + i2c_max77693_fuel: i2c-gpio-2 { + compatible =3D "i2c-gpio"; + sda-gpios =3D <&gpy0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios =3D <&gpy0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + fuel-gauge@36 { + compatible =3D "maxim,max17050"; + interrupt-parent =3D <&gpx2>; + interrupts =3D <3 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&max77693_fuel_irq>; + reg =3D <0x36>; + + maxim,over-heat-temp =3D <500>; + maxim,over-volt =3D <4500>; + }; + }; + + i2c_yas532_magnetometer: i2c-gpio-3 { + compatible =3D "i2c-gpio"; + sda-gpios =3D <&gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios =3D <&gpy2 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + /* Magnetometer: Yamaha YAS532 */ + magnetometer@2e { + compatible =3D "yamaha,yas532"; + reg =3D <0x2e>; + iovdd-supply =3D <&ldo3_reg>; /* VCC_1.8V_AP */ + mount-matrix =3D "-1", "0", "0", + "0", "1", "0", + "0", "0", "-1"; + }; + }; + + i2c_lightsensor: i2c-gpio-4 { + compatible =3D "i2c-gpio"; + sda-gpios =3D <&gpl0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios =3D <&gpl0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + /* WiFi model uses CM3323, 3G/LTE use CM36653 */ + }; + + i2c_bl: i2c-gpio-24 { + compatible =3D "i2c-gpio"; + sda-gpios =3D <&gpm4 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios =3D <&gpm4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + backlight: backlight@2c { + compatible =3D "ti,lp8556"; + reg =3D <0x2c>; + status =3D "okay"; + + bl-name =3D "lcd-bl"; + dev-ctrl =3D /bits/ 8 <0x80>; + init-brt =3D /bits/ 8 <0x78>; /* 120 */ + + power-supply =3D <&vbatt_reg>; + enable-supply =3D <&backlight_reset_supply>; + + pwms =3D <&pwm 1 78770 0>; + pwm-names =3D "lp8556"; + pwm-period =3D <78770>; + + rom_a3h { + rom-addr =3D /bits/ 8 <0xa3>; + rom-val =3D /bits/ 8 <0x5e>; + }; + + rom_a5h { + rom-addr =3D /bits/ 8 <0xa5>; + rom-val =3D /bits/ 8 <0x34>; + }; + + rom_a7h { + rom-addr =3D /bits/ 8 <0xa7>; + rom-val =3D /bits/ 8 <0xfa>; + }; + }; + }; + + wlan_pwrseq: sdhci3-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + reset-gpios =3D <&gpm3 5 GPIO_ACTIVE_LOW>; + }; +}; + +&bus_dmc { + devfreq-events =3D <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; + vdd-supply =3D <&buck1_reg>; + status =3D "okay"; +}; + +&bus_acp { + devfreq =3D <&bus_dmc>; + status =3D "okay"; +}; + +&bus_c2c { + devfreq =3D <&bus_dmc>; + status =3D "okay"; +}; + +&bus_leftbus { + devfreq-events =3D <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; + vdd-supply =3D <&buck3_reg>; + status =3D "okay"; +}; + +&bus_rightbus { + devfreq =3D <&bus_leftbus>; + status =3D "okay"; +}; + +&bus_display { + devfreq =3D <&bus_leftbus>; + status =3D "okay"; +}; + +&bus_fsys { + devfreq =3D <&bus_leftbus>; + status =3D "okay"; +}; + +&bus_peri { + devfreq =3D <&bus_leftbus>; + status =3D "okay"; +}; + +&bus_mfc { + devfreq =3D <&bus_leftbus>; + status =3D "okay"; +}; + +&cpu0 { + cpu0-supply =3D <&buck2_reg>; +}; + +&dsi_0 { + vddcore-supply =3D <&ldo8_reg>; + vddio-supply =3D <&ldo10_reg>; + samsung,burst-clock-frequency =3D <500000000>; + samsung,esc-clock-frequency =3D <20000000>; + samsung,pll-clock-frequency =3D <24000000>; + status =3D "okay"; + + panel@0 { + compatible =3D "samsung,s6d7aa0-lsl080al02"; + reg =3D <0>; + enable-supply =3D <&lcd_enable_supply>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lcd_nrst>; + reset-gpios =3D <&gpf0 4 GPIO_ACTIVE_LOW>; + backlight =3D <&backlight>; + }; +}; + +&exynos_usbphy { + vbus-supply =3D <&esafeout1_reg>; + status =3D "okay"; +}; + +&fimd { + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&buck4_reg>; + status =3D "okay"; +}; + +&hsotg { + vusb_d-supply =3D <&ldo15_reg>; + vusb_a-supply =3D <&ldo12_reg>; + dr_mode =3D "peripheral"; + status =3D "okay"; +}; + +/* Accelerometer: K2DH/K3DH */ +&i2c_1 { + pinctrl-0 =3D <&i2c1_bus>; + pinctrl-names =3D "default"; + status =3D "okay"; + + lis3dh: accelerometer@19 { + /* K2DH seems to be the same as lis2dh12 in terms of registers */ + compatible =3D "st,lis2dh12-accel"; + reg =3D <0x19>; + + interrupt-parent =3D <&gpx0>; + interrupts =3D <0 IRQ_TYPE_EDGE_FALLING>; + + vdd-supply =3D <&ldo17_reg>; /* VCC_2.8V_AP */ + vddio-supply =3D <&ldo3_reg>; /* VCC_1.8V_AP */ + + mount-matrix =3D "-1", "0", "0", + "0", "1", "0", + "0", "0", "-1"; + }; +}; + +/* Touchscreen: MMS252 */ +&i2c_3 { + samsung,i2c-sda-delay =3D <100>; + samsung,i2c-slave-addr =3D <0x10>; + samsung,i2c-max-bus-freq =3D <400000>; + pinctrl-0 =3D <&i2c3_bus>; + pinctrl-names =3D "default"; + status =3D "okay"; + + touchscreen@48 { + /* Using mms114 compatible for now */ + compatible =3D "melfas,mms114"; + reg =3D <0x48>; + interrupt-parent =3D <&gpb>; + interrupts =3D <4 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x =3D <800>; + touchscreen-size-y =3D <1280>; + avdd-supply =3D <&ldo21_reg>; + vdd-supply =3D <&ldo25_reg>; + }; +}; + +/* PMIC: s5m8767 */ +&i2c_7 { + samsung,i2c-sda-delay =3D <100>; + samsung,i2c-slave-addr =3D <0x10>; + samsung,i2c-max-bus-freq =3D <100000>; + pinctrl-0 =3D <&i2c7_bus>; + pinctrl-names =3D "default"; + status =3D "okay"; + + s5m8767: pmic@66 { + compatible =3D "samsung,s5m8767-pmic"; + reg =3D <0x66>; + interrupt-parent =3D <&gpx0>; + interrupts =3D <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&s5m8767_irq &s5m8767_dvs &s5m8767_ds>; + wakeup-source; + + s5m8767,pmic-buck2-ramp-enable; + s5m8767,pmic-buck3-ramp-enable; + s5m8767,pmic-buck4-ramp-enable; + + s5m8767,pmic-buck-ramp-delay =3D <25>; + s5m8767,pmic-buck-default-dvs-idx =3D <1>; + + s5m8767,pmic-buck-dvs-gpios =3D <&gpm3 0 GPIO_ACTIVE_HIGH>, + <&gpm3 1 GPIO_ACTIVE_HIGH>, + <&gpm3 2 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck-ds-gpios =3D <&gpf3 1 GPIO_ACTIVE_HIGH>, + <&gpf3 2 GPIO_ACTIVE_HIGH>, + <&gpf3 3 GPIO_ACTIVE_HIGH>; + + s5m8767,pmic-buck2-dvs-voltage =3D <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>; + + s5m8767,pmic-buck3-dvs-voltage =3D <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>; + + s5m8767,pmic-buck4-dvs-voltage =3D <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>, + <1100000>, <1100000>; + + regulators { + ldo1_reg: LDO1 { + regulator-name =3D "VALIVE_1.0V_AP"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1000000>; + regulator-always-on; + regulator-boot-on; + op_mode =3D <1>; + }; + + ldo2_reg: LDO2 { + regulator-name =3D "VM1M2_1.2V_AP"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-always-on; + regulator-boot-on; + op_mode =3D <1>; + }; + + ldo3_reg: LDO3 { + regulator-name =3D "VCC_1.8V_AP"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + op_mode =3D <1>; + }; + + ldo5_reg: LDO5 { + regulator-name =3D "VCC_3.3V_MHL"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + op_mode =3D <1>; + }; + + ldo8_reg: LDO8 { + regulator-name =3D "VMIPI_1.0V"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1000000>; + op_mode =3D <3>; + }; + + ldo9_reg: LDO9 { + regulator-name =3D "VSIL_1.2V"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + op_mode =3D <1>; + }; + + ldo10_reg: LDO10 { + regulator-name =3D "VMIPI_1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + op_mode =3D <3>; + }; + + ldo12_reg: LDO12 { + regulator-name =3D "VUOTG_3.0V"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + op_mode =3D <1>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo13_reg: LDO13 { + regulator-name =3D "VCC_1.8V_MHL"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + op_mode =3D <1>; + }; + + ldo15_reg: LDO15 { + regulator-name =3D "VHSIC_1.0V"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1000000>; + op_mode =3D <1>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo17_reg: LDO17 { + regulator-name =3D "VCC_2.8V_AP"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + op_mode =3D <1>; + regulator-always-on; + }; + + ldo19_reg: LDO19 { + regulator-name =3D "VLED_IC_1.9V"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + op_mode =3D <1>; + regulator-always-on; + }; + + ldo20_reg: LDO20 { + regulator-name =3D "VTOUCH_3.3V"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + op_mode =3D <1>; + }; + + ldo21_reg: LDO21 { + regulator-name =3D "TSP_VDD_3.3V"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + op_mode =3D <1>; + }; + + ldo22_reg: LDO22 { + regulator-name =3D "5M_AF_2.8V"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + op_mode =3D <1>; + }; + + ldo23_reg: LDO23 { + regulator-name =3D "VTF_2.8V"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + op_mode =3D <3>; + }; + + ldo24_reg: LDO24 { + regulator-name =3D "LEDA_2.8V"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + op_mode =3D <1>; + }; + + ldo25_reg: LDO25 { + regulator-name =3D "TSP_VDD_1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + op_mode =3D <1>; + }; + + ldo26_reg: LDO26 { + regulator-name =3D "CAM_IO_1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + op_mode =3D <1>; + }; + + ldo27_reg: LDO27 { + regulator-name =3D "VTCAM_1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + op_mode =3D <1>; + }; + + buck1_reg: BUCK1 { + regulator-name =3D "VDD_MIF"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1100000>; + regulator-always-on; + regulator-boot-on; + op_mode =3D <3>; + }; + + buck2_reg: BUCK2 { + regulator-name =3D "VDD_ARM"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1500000>; + regulator-always-on; + regulator-boot-on; + op_mode =3D <3>; + }; + + buck3_reg: BUCK3 { + regulator-name =3D "VDD_INT"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1300000>; + regulator-always-on; + regulator-boot-on; + op_mode =3D <3>; + }; + + buck4_reg: BUCK4 { + regulator-name =3D "VDD_G3D"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1150000>; + regulator-boot-on; + op_mode =3D <3>; + }; + + buck5_reg: BUCK5 { + regulator-name =3D "VMEM_1.2V_AP"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-always-on; + regulator-boot-on; + op_mode =3D <1>; + }; + + buck6_reg: BUCK6 { + regulator-name =3D "CAM_ISP_CORE_1.2V"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + op_mode =3D <1>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + s5m8767_osc: clocks { + compatible =3D "samsung,s5m8767-clk"; + #clock-cells =3D <1>; + clock-output-names =3D "en32khz_ap", + "en32khz_cp", + "en32khz_bt"; + }; + }; +}; + +&mshc_0 { + broken-cd; + non-removable; + card-detect-delay =3D <200>; + vmmc-supply =3D <&ldo22_reg>; + clock-frequency =3D <400000000>; + samsung,dw-mshc-ciu-div =3D <0>; + samsung,dw-mshc-sdr-timing =3D <2 3>; + samsung,dw-mshc-ddr-timing =3D <1 2>; + pinctrl-0 =3D <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; + pinctrl-names =3D "default"; + status =3D "okay"; + bus-width =3D <8>; + cap-mmc-highspeed; +}; + +&pinctrl_0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sleep0>; + + s5m8767_ds: s5m8767-ds { + samsung,pins =3D "gpf3-1", "gpf3-2", "gpf3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + lcd_en: lcd-en { + samsung,pins =3D "gpc0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + lcd_nrst: lcd-nrst { + samsung,pins =3D "gpf0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + sleep0: sleep-state { + PIN_SLP(gpa0-0, INPUT, NONE); + PIN_SLP(gpa0-1, OUT0, NONE); + PIN_SLP(gpa0-2, INPUT, NONE); + PIN_SLP(gpa0-3, INPUT, UP); + PIN_SLP(gpa0-4, INPUT, DOWN); /* UP on LTE model */ + PIN_SLP(gpa0-5, INPUT, DOWN); /* UP on LTE model */ + PIN_SLP(gpa0-6, INPUT, DOWN); + PIN_SLP(gpa0-7, INPUT, DOWN); + + PIN_SLP(gpa1-0, INPUT, DOWN); + PIN_SLP(gpa1-1, INPUT, DOWN); + PIN_SLP(gpa1-2, INPUT, DOWN); + PIN_SLP(gpa1-3, INPUT, DOWN); + PIN_SLP(gpa1-4, INPUT, DOWN); + PIN_SLP(gpa1-5, INPUT, DOWN); + + PIN_SLP(gpb-0, INPUT, NONE); + PIN_SLP(gpb-1, INPUT, NONE); + PIN_SLP(gpb-2, INPUT, NONE); + PIN_SLP(gpb-3, INPUT, NONE); + PIN_SLP(gpb-4, INPUT, DOWN); + PIN_SLP(gpb-5, INPUT, DOWN); /* UP on all models with modem */ + PIN_SLP(gpb-6, INPUT, DOWN); + PIN_SLP(gpb-7, INPUT, DOWN); + + PIN_SLP(gpc0-0, INPUT, DOWN); /* PREV, NONE on LTE model */ + PIN_SLP(gpc0-1, INPUT, DOWN); + PIN_SLP(gpc0-2, INPUT, DOWN); + PIN_SLP(gpc0-3, INPUT, DOWN); + PIN_SLP(gpc0-4, INPUT, DOWN); + + PIN_SLP(gpc1-0, INPUT, DOWN); + PIN_SLP(gpc1-1, INPUT, DOWN); + PIN_SLP(gpc1-2, INPUT, DOWN); + PIN_SLP(gpc1-3, INPUT, DOWN); /* NONE on LTE model */ + PIN_SLP(gpc1-4, INPUT, DOWN); + + PIN_SLP(gpd0-0, INPUT, DOWN); + PIN_SLP(gpd0-1, OUT0, NONE); + PIN_SLP(gpd0-2, INPUT, NONE); + PIN_SLP(gpd0-3, INPUT, NONE); + + PIN_SLP(gpd1-0, INPUT, DOWN); + PIN_SLP(gpd1-1, INPUT, DOWN); + PIN_SLP(gpd1-2, INPUT, NONE); + PIN_SLP(gpd1-3, INPUT, NONE); + + PIN_SLP(gpf0-0, INPUT, DOWN); + PIN_SLP(gpf0-1, INPUT, DOWN); + PIN_SLP(gpf0-2, INPUT, DOWN); + PIN_SLP(gpf0-3, INPUT, DOWN); + PIN_SLP(gpf0-4, OUT0, NONE); + PIN_SLP(gpf0-5, OUT0, NONE); + PIN_SLP(gpf0-6, INPUT, DOWN); + PIN_SLP(gpf0-7, INPUT, DOWN); + + PIN_SLP(gpf1-0, INPUT, DOWN); + PIN_SLP(gpf1-1, INPUT, DOWN); + PIN_SLP(gpf1-2, INPUT, DOWN); + PIN_SLP(gpf1-3, INPUT, DOWN); + PIN_SLP(gpf1-4, INPUT, DOWN); + PIN_SLP(gpf1-5, INPUT, DOWN); + PIN_SLP(gpf1-6, INPUT, DOWN); /* NONE on LTE model */ + PIN_SLP(gpf1-7, INPUT, DOWN); + + PIN_SLP(gpf2-0, INPUT, DOWN); + PIN_SLP(gpf2-1, INPUT, DOWN); + PIN_SLP(gpf2-2, INPUT, DOWN); /* PREV, NONE on LTE model */ + PIN_SLP(gpf2-3, INPUT, DOWN); + PIN_SLP(gpf2-4, INPUT, DOWN); + PIN_SLP(gpf2-5, INPUT, DOWN); + PIN_SLP(gpf2-6, INPUT, DOWN); + PIN_SLP(gpf2-7, INPUT, DOWN); + + PIN_SLP(gpf3-0, INPUT, DOWN); + PIN_SLP(gpf3-1, INPUT, DOWN); + PIN_SLP(gpf3-2, INPUT, DOWN); + PIN_SLP(gpf3-3, INPUT, DOWN); + PIN_SLP(gpf3-4, PREV, NONE); + PIN_SLP(gpf3-5, OUT0, DOWN); + + PIN_SLP(gpj0-0, INPUT, DOWN); + PIN_SLP(gpj0-1, INPUT, DOWN); + PIN_SLP(gpj0-2, INPUT, DOWN); + PIN_SLP(gpj0-3, OUT0, NONE); + PIN_SLP(gpj0-4, INPUT, DOWN); + PIN_SLP(gpj0-5, INPUT, DOWN); + PIN_SLP(gpj0-6, OUT0, NONE); + PIN_SLP(gpj0-7, OUT0, NONE); + + PIN_SLP(gpj1-0, OUT0, NONE); + PIN_SLP(gpj1-1, INPUT, DOWN); + PIN_SLP(gpj1-2, PREV, NONE); + PIN_SLP(gpj1-3, INPUT, DOWN); + PIN_SLP(gpj1-4, INPUT, DOWN); + }; +}; + +&pinctrl_1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sleep1>; + + max77693_irq: max77693-irq { + samsung,pins =3D "gpx1-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + max77693_fuel_irq: max77693-fuel-irq { + samsung,pins =3D "gpx2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + s5m8767_dvs: s5m8767-dvs { + samsung,pins =3D "gpm3-0", "gpm3-1", "gpm3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + s5m8767_irq: s5m8767-irq { + samsung,pins =3D "gpx0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sdhci2_cd: sdhci2-cd-irq { + samsung,pins =3D "gpx3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + bt_shutdown: bt-shutdown-pins { + samsung,pins =3D "gpl0-6"; + samsung,pin-pud =3D ; + }; + + bt_host_wakeup: bt-host-wakeup-pins { + samsung,pins =3D "gpx2-6"; + samsung,pin-pud =3D ; + }; + + bt_device_wakeup: bt-device-wakeup-pins { + samsung,pins =3D "gpx3-1"; + samsung,pin-pud =3D ; + }; + + backlight_reset: backlight-reset { + samsung,pins =3D "gpm0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + gpio_keys: gpio-keys-pins { + samsung,pins =3D "gpx1-2", "gpx2-2", "gpx2-4", "gpx2-7", "gpx3-3"; + samsung,pin-pud =3D ; + }; + + sleep1: sleep-state { + PIN_SLP(gpk0-0, PREV, NONE); + PIN_SLP(gpk0-1, PREV, NONE); + PIN_SLP(gpk0-2, PREV, NONE); + PIN_SLP(gpk0-3, PREV, NONE); + PIN_SLP(gpk0-4, PREV, NONE); + PIN_SLP(gpk0-5, PREV, NONE); + PIN_SLP(gpk0-6, PREV, NONE); + + PIN_SLP(gpk1-0, INPUT, DOWN); + PIN_SLP(gpk1-1, INPUT, DOWN); + PIN_SLP(gpk1-2, INPUT, DOWN); + PIN_SLP(gpk1-3, PREV, NONE); + PIN_SLP(gpk1-4, PREV, NONE); + PIN_SLP(gpk1-5, PREV, NONE); + PIN_SLP(gpk1-6, PREV, NONE); + + PIN_SLP(gpk2-0, INPUT, DOWN); + PIN_SLP(gpk2-1, INPUT, DOWN); + PIN_SLP(gpk2-2, INPUT, DOWN); + PIN_SLP(gpk2-3, INPUT, DOWN); + PIN_SLP(gpk2-4, INPUT, DOWN); + PIN_SLP(gpk2-5, INPUT, DOWN); + PIN_SLP(gpk2-6, INPUT, DOWN); + + PIN_SLP(gpk3-0, OUT0, NONE); + PIN_SLP(gpk3-1, INPUT, NONE); + PIN_SLP(gpk3-2, INPUT, DOWN); + PIN_SLP(gpk3-3, INPUT, NONE); + PIN_SLP(gpk3-4, INPUT, NONE); + PIN_SLP(gpk3-5, INPUT, NONE); + PIN_SLP(gpk3-6, INPUT, NONE); + + PIN_SLP(gpl0-0, INPUT, DOWN); /* OUT0 on 3G, PREV on LTE; NONE on both */ + PIN_SLP(gpl0-1, INPUT, NONE); + PIN_SLP(gpl0-2, INPUT, NONE); + PIN_SLP(gpl0-3, INPUT, DOWN); + PIN_SLP(gpl0-4, INPUT, DOWN); + PIN_SLP(gpl0-6, PREV, NONE); + + PIN_SLP(gpl1-0, INPUT, DOWN); /* OUT0 on 3G, PREV on LTE; NONE on both */ + PIN_SLP(gpl1-1, OUT0, NONE); + PIN_SLP(gpl2-0, INPUT, DOWN); + PIN_SLP(gpl2-1, PREV, NONE); /* INPUT, DOWN on LTE */ + PIN_SLP(gpl2-2, PREV, NONE); /* INPUT, DOWN on LTE */ + PIN_SLP(gpl2-3, INPUT, DOWN); + PIN_SLP(gpl2-4, INPUT, DOWN); /* OUT0, NONE on models with modem */ + PIN_SLP(gpl2-5, INPUT, DOWN); /* PREV, NONE on LTE */ + PIN_SLP(gpl2-6, INPUT, DOWN); + PIN_SLP(gpl2-7, INPUT, DOWN); + + PIN_SLP(gpm0-0, PREV, NONE); + PIN_SLP(gpm0-1, OUT0, NONE); + PIN_SLP(gpm0-2, INPUT, DOWN); + PIN_SLP(gpm0-3, INPUT, DOWN); + PIN_SLP(gpm0-4, INPUT, DOWN); + PIN_SLP(gpm0-5, INPUT, DOWN); + PIN_SLP(gpm0-6, INPUT, DOWN); + PIN_SLP(gpm0-7, INPUT, DOWN); + + PIN_SLP(gpm1-0, INPUT, DOWN); + PIN_SLP(gpm1-1, INPUT, DOWN); + PIN_SLP(gpm1-2, INPUT, NONE); + PIN_SLP(gpm1-3, INPUT, NONE); + PIN_SLP(gpm1-4, INPUT, NONE); + PIN_SLP(gpm1-5, INPUT, NONE); + PIN_SLP(gpm1-6, OUT0, NONE); + + PIN_SLP(gpm2-0, INPUT, NONE); + PIN_SLP(gpm2-1, INPUT, NONE); + PIN_SLP(gpm2-2, OUT0, NONE); + PIN_SLP(gpm2-3, INPUT, DOWN); + PIN_SLP(gpm2-4, INPUT, DOWN); + + PIN_SLP(gpm3-0, PREV, NONE); + PIN_SLP(gpm3-1, PREV, NONE); + PIN_SLP(gpm3-2, PREV, NONE); + PIN_SLP(gpm3-3, INPUT, DOWN); /* OUT1, NONE for 3G */ + PIN_SLP(gpm3-4, INPUT, DOWN); + PIN_SLP(gpm3-5, PREV, NONE); + PIN_SLP(gpm3-6, INPUT, DOWN); + PIN_SLP(gpm3-7, OUT0, NONE); + + PIN_SLP(gpm4-0, INPUT, DOWN); + PIN_SLP(gpm4-1, INPUT, DOWN); + PIN_SLP(gpm4-2, INPUT, DOWN); + PIN_SLP(gpm4-3, INPUT, DOWN); + PIN_SLP(gpm4-4, PREV, NONE); + PIN_SLP(gpm4-5, INPUT, NONE); + PIN_SLP(gpm4-6, INPUT, DOWN); + PIN_SLP(gpm4-7, INPUT, DOWN); + + PIN_SLP(gpy0-0, INPUT, DOWN); + PIN_SLP(gpy0-1, INPUT, DOWN); + PIN_SLP(gpy0-2, INPUT, NONE); + PIN_SLP(gpy0-3, INPUT, NONE); + PIN_SLP(gpy0-4, INPUT, DOWN); + PIN_SLP(gpy0-5, INPUT, DOWN); + + PIN_SLP(gpy1-0, INPUT, DOWN); + PIN_SLP(gpy1-1, INPUT, DOWN); + PIN_SLP(gpy1-2, INPUT, DOWN); + PIN_SLP(gpy1-3, INPUT, DOWN); + + PIN_SLP(gpy2-0, PREV, NONE); + PIN_SLP(gpy2-1, INPUT, DOWN); + PIN_SLP(gpy2-2, INPUT, NONE); + PIN_SLP(gpy2-3, INPUT, NONE); + PIN_SLP(gpy2-4, INPUT, NONE); + PIN_SLP(gpy2-5, INPUT, NONE); + + PIN_SLP(gpy3-0, INPUT, DOWN); + PIN_SLP(gpy3-1, INPUT, DOWN); + PIN_SLP(gpy3-2, INPUT, DOWN); + PIN_SLP(gpy3-3, INPUT, DOWN); + PIN_SLP(gpy3-4, INPUT, DOWN); + PIN_SLP(gpy3-5, INPUT, DOWN); + PIN_SLP(gpy3-6, INPUT, DOWN); + PIN_SLP(gpy3-7, INPUT, DOWN); + + PIN_SLP(gpy4-0, INPUT, DOWN); + PIN_SLP(gpy4-1, INPUT, DOWN); + PIN_SLP(gpy4-2, INPUT, DOWN); + PIN_SLP(gpy4-3, INPUT, DOWN); + PIN_SLP(gpy4-4, INPUT, DOWN); + PIN_SLP(gpy4-5, INPUT, DOWN); + PIN_SLP(gpy4-6, INPUT, DOWN); + PIN_SLP(gpy4-7, INPUT, DOWN); + + PIN_SLP(gpy5-0, INPUT, DOWN); + PIN_SLP(gpy5-1, INPUT, DOWN); + PIN_SLP(gpy5-2, INPUT, DOWN); + PIN_SLP(gpy5-3, INPUT, DOWN); + PIN_SLP(gpy5-4, INPUT, DOWN); + PIN_SLP(gpy5-5, INPUT, DOWN); + PIN_SLP(gpy5-6, INPUT, DOWN); + PIN_SLP(gpy5-7, INPUT, DOWN); + + PIN_SLP(gpy6-0, INPUT, DOWN); + PIN_SLP(gpy6-1, INPUT, DOWN); + PIN_SLP(gpy6-2, INPUT, DOWN); + PIN_SLP(gpy6-3, INPUT, DOWN); + PIN_SLP(gpy6-4, INPUT, DOWN); + PIN_SLP(gpy6-5, INPUT, DOWN); + PIN_SLP(gpy6-6, INPUT, DOWN); + PIN_SLP(gpy6-7, INPUT, DOWN); + }; +}; + +&pinctrl_2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sleep2>; + + sleep2: sleep-state { + PIN_SLP(gpz-0, INPUT, DOWN); + PIN_SLP(gpz-1, INPUT, DOWN); + PIN_SLP(gpz-2, INPUT, DOWN); + PIN_SLP(gpz-3, INPUT, DOWN); + PIN_SLP(gpz-4, INPUT, DOWN); + PIN_SLP(gpz-5, INPUT, DOWN); + PIN_SLP(gpz-6, INPUT, DOWN); + }; +}; + +&pinctrl_3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sleep3>; + + sleep3: sleep-state { + PIN_SLP(gpv0-0, INPUT, DOWN); + PIN_SLP(gpv0-1, INPUT, DOWN); + PIN_SLP(gpv0-2, INPUT, DOWN); + PIN_SLP(gpv0-3, INPUT, DOWN); + PIN_SLP(gpv0-4, INPUT, DOWN); + PIN_SLP(gpv0-5, INPUT, DOWN); + PIN_SLP(gpv0-6, INPUT, DOWN); + PIN_SLP(gpv0-7, INPUT, DOWN); + + PIN_SLP(gpv1-0, INPUT, DOWN); + PIN_SLP(gpv1-1, INPUT, DOWN); + PIN_SLP(gpv1-2, INPUT, DOWN); + PIN_SLP(gpv1-3, INPUT, DOWN); + PIN_SLP(gpv1-4, INPUT, DOWN); + PIN_SLP(gpv1-5, INPUT, DOWN); + PIN_SLP(gpv1-6, INPUT, DOWN); + PIN_SLP(gpv1-7, INPUT, DOWN); + + PIN_SLP(gpv2-0, INPUT, DOWN); + PIN_SLP(gpv2-1, INPUT, DOWN); + PIN_SLP(gpv2-2, INPUT, DOWN); + PIN_SLP(gpv2-3, INPUT, DOWN); + PIN_SLP(gpv2-4, INPUT, DOWN); + PIN_SLP(gpv2-5, INPUT, DOWN); + PIN_SLP(gpv2-6, INPUT, DOWN); + PIN_SLP(gpv2-7, INPUT, DOWN); + + PIN_SLP(gpv3-0, INPUT, DOWN); + PIN_SLP(gpv3-1, INPUT, DOWN); + PIN_SLP(gpv3-2, INPUT, DOWN); + PIN_SLP(gpv3-3, INPUT, DOWN); + PIN_SLP(gpv3-4, INPUT, DOWN); + PIN_SLP(gpv3-5, INPUT, DOWN); + PIN_SLP(gpv3-6, INPUT, DOWN); + PIN_SLP(gpv3-7, INPUT, DOWN); + + PIN_SLP(gpv4-0, INPUT, DOWN); + PIN_SLP(gpv4-1, INPUT, DOWN); + }; +}; + +&pmu_system_controller { + assigned-clocks =3D <&pmu_system_controller 0>; + assigned-clock-parents =3D <&clock CLK_XUSBXTI>; +}; + +&pwm { + pinctrl-0 =3D <&pwm1_out>; + pinctrl-names =3D "default"; + samsung,pwm-outputs =3D <1>; + status =3D "okay"; +}; + +&rtc { + status =3D "okay"; + clocks =3D <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>; + clock-names =3D "rtc", "rtc_src"; +}; + +&sdhci_2 { + bus-width =3D <4>; + cd-gpios =3D <&gpx3 4 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>; + pinctrl-names =3D "default"; + vmmc-supply =3D <&ldo23_reg>; + status =3D "okay"; +}; + +&sdhci_3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + non-removable; + bus-width =3D <4>; + + mmc-pwrseq =3D <&wlan_pwrseq>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sd3_clk &sd3_cmd &sd3_bus4>; + status =3D "okay"; + + /* BCM4334 Wi-Fi */ + brcmf: wifi@1 { + compatible =3D "brcm,bcm4334-fmac", "brcm,bcm4329-fmac"; + reg =3D <1>; + + interrupt-parent =3D <&gpx2>; + interrupts =3D <5 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "host-wake"; + }; +}; + +&serial_0 { + pinctrl-0 =3D <&uart0_data &uart0_fctl>; + pinctrl-names =3D "default"; + status =3D "okay"; + + /* BCM4334B0 Bluetooth */ + bluetooth { + compatible =3D "brcm,bcm4330-bt"; + pinctrl-0 =3D <&bt_shutdown &bt_device_wakeup &bt_host_wakeup>; + pinctrl-names =3D "default"; + max-speed =3D <3000000>; + shutdown-gpios =3D <&gpl0 6 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios =3D <&gpx3 1 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios =3D <&gpx2 6 GPIO_ACTIVE_HIGH>; + clocks =3D <&s5m8767_osc S2MPS11_CLK_BT>; + }; +}; + +&serial_1 { + status =3D "okay"; +}; + +&serial_2 { + status =3D "okay"; +}; + +&serial_3 { + status =3D "okay"; +}; + +&tmu { + vtmu-supply =3D <&ldo10_reg>; + status =3D "okay"; +}; --=20 2.40.0