From nobody Wed Dec 17 11:37:46 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C722C77B6E for ; Fri, 14 Apr 2023 11:29:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230463AbjDNL3E (ORCPT ); Fri, 14 Apr 2023 07:29:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230270AbjDNL2w (ORCPT ); Fri, 14 Apr 2023 07:28:52 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 698AD9039 for ; Fri, 14 Apr 2023 04:28:48 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id o6-20020a05600c4fc600b003ef6e6754c5so7893618wmq.5 for ; Fri, 14 Apr 2023 04:28:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20221208.gappssmtp.com; s=20221208; t=1681471727; x=1684063727; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ojVGLmC7jRSK7REBBlt41xebSraaA5BlvM/BOdJSKQY=; b=T7Qzes6XGVyFUtWwGNxfJYoCYc/l+sGqN3qEp4wx/dsos+Rmy5xH4qhIDu3W0zaaIF 0A46La79F6iH90XBI+EnPh3rbqAhn8npb7RG5wMTLf0oi1eHK16uMmmnXPEDh/WLWgsl uJgEc0P1PTln7R+J1zGUH+FqlF+jUFENO3iAsCDVuoaeFDhx8OyMIdzpz8gFNxvZ+Pbz 37IawYdMZtReaZJ0P4lnIsmb200WFi4J3QQNrtmyAWjspGmXbqAGQX42iVhWHFBH6z19 Ysb1kpSZYsUTiBgzlSGncMAU93Gv0YwHPLrFLPEiJYTyyuf31IN+WqUgqeWXh64GvdAv qA9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681471727; x=1684063727; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ojVGLmC7jRSK7REBBlt41xebSraaA5BlvM/BOdJSKQY=; b=Qyu/bTyE93hA3qz45Ij67mZKvyqNQOuc5FityBy2YA388kolsKuhWFjV9fXaymUpx5 +73Uj4evnwovFKk8+ThIeFR+mEK7UnbIP1cwLjXll5uXBGYwTlba86g/94SCqznNrQBc c+wokFFUzYHJDGjvHhOoPkzy81MIXx1xAxLlYe1Ci0FqjuZT14AEwI2o292M7PZIThuI gD34SWLJv9fZ4BPfoMIfDzywl4dOsnwE5Bvi/pvYJs8DY4wcj1K/0DRHfhxsQZqzmVEJ KJc4nDj5Z9NNBNkgO3ZN5B269JjiBgP67YNpsidcvEsNqjIcMoIXSBH01nZpk/mKdwCg 5yNg== X-Gm-Message-State: AAQBX9dBGmhK2c9/CenxV9FwjbvkMsG2zHX8kmL0uaPM3527TFWpmS7B R/UxbDq2aIhzCLU9occzedHhsQ== X-Google-Smtp-Source: AKy350aoNOA1mimdB3soprzgeft0BdW7ZCsxmCguQKWlIq4zlpGbdL+c26/QpB/zwrl6bvd/TkzJWQ== X-Received: by 2002:a7b:c5ca:0:b0:3dc:4fd7:31f7 with SMTP id n10-20020a7bc5ca000000b003dc4fd731f7mr3928263wmk.41.1681471726846; Fri, 14 Apr 2023 04:28:46 -0700 (PDT) Received: from localhost.localdomain ([2a01:e34:eca6:27f0:42a5:8f07:826a:465d]) by smtp.gmail.com with ESMTPSA id t1-20020a1c7701000000b003ede06f3178sm4063745wmi.31.2023.04.14.04.28.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 04:28:46 -0700 (PDT) From: Esteban Blanc To: nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sterzik@ti.com, u-kumar1@ti.com, eblanc@baylibre.com, jneanne@baylibre.com, jpanis@baylibre.com, aseketeli@baylibre.com Subject: [PATCH v2 2/5] arm64: dts: ti: k3-j721s2-som-p0: Add TP6594 family PMICs Date: Fri, 14 Apr 2023 13:28:40 +0200 Message-Id: <20230414112843.1358067-3-eblanc@baylibre.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230414112843.1358067-1-eblanc@baylibre.com> References: <20230414112843.1358067-1-eblanc@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch adds support for TPS6594 PMIC family on wakup I2C0 bus. Theses devices provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Esteban Blanc --- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 213 +++++++++++++++++++ 1 file changed, 213 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot= /dts/ti/k3-j721s2-som-p0.dtsi index 6930efff8a5a..048607c197b1 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -79,3 +79,216 @@ &main_mcan16 { pinctrl-names =3D "default"; phys =3D <&transceiver0>; }; + +&wkup_pmx0 { + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins =3D < + /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */ + J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) + >; + }; + + wkup_i2c0_pins_default: wkup_i2c0_pins_default { + pinctrl-single,pins =3D < + J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */ + J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */ + >; + }; +}; + +&wkup_i2c0 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wkup_i2c0_pins_default>; + clock-frequency =3D <400000>; + + tps659411: tps659411@48 { + compatible =3D "ti,tps6594-q1"; + reg =3D <0x48>; + ti,primary-pmic; + system-power-controller; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_irq_pins_default>; + interrupt-parent =3D <&wkup_gpio0>; + interrupts =3D <39 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells =3D <2>; + + buck1234-supply =3D <&vsys_3v3>; + buck5-supply =3D <&vsys_3v3>; + ldo1-supply =3D <&vsys_3v3>; + ldo2-supply =3D <&vsys_3v3>; + ldo3-supply =3D <&vsys_3v3>; + ldo4-supply =3D <&vsys_3v3>; + + regulators { + bucka1234: buck1234 { + regulator-name =3D "vdd_cpu_avs"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <900000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka5: buck5 { + regulator-name =3D "vdd_mcu_0v85"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa1: ldo1 { + regulator-name =3D "vdd_mcuwk_0v8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa2: ldo2 { + regulator-name =3D "vdd_mcu_gpioret_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa3: ldo3 { + regulator-name =3D "vdd_mcuio_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa4: ldo4 { + regulator-name =3D "vda_mcu_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + tps659414: tps659414@4c { + compatible =3D "ti,tps6594-q1"; + reg =3D <0x4c>; + system-power-controller; + interrupt-parent =3D <&wkup_gpio0>; + interrupts =3D <39 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells =3D <2>; + + buck1-supply =3D <&vsys_3v3>; + buck2-supply =3D <&vsys_3v3>; + buck3-supply =3D <&vsys_3v3>; + buck4-supply =3D <&vsys_3v3>; + buck5-supply =3D <&vsys_3v3>; + ldo1-supply =3D <&vsys_3v3>; + ldo2-supply =3D <&vsys_3v3>; + ldo3-supply =3D <&vsys_3v3>; + ldo4-supply =3D <&vsys_3v3>; + + regulators { + buckb1: buck1 { + regulator-name =3D "vdd_io_1v8_reg"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buckb2: buck2 { + regulator-name =3D "vdd_fpd_1v1"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb3: buck3 { + regulator-name =3D "vdd_phy_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb4: buck4 { + regulator-name =3D "vdd_ddr_1v1"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb5: buck5 { + regulator-name =3D "vdd_ram_0v85"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob1: ldo1 { + regulator-name =3D "vdd_wk_0v8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob2: ldo2 { + regulator-name =3D "vdd_gpioret_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob3: ldo3 { + regulator-name =3D "vda_dll_0v8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob4: ldo4 { + regulator-name =3D "vda_pll_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + lp876411: lp876411@58 { + compatible =3D "ti,lp8764-q1"; + reg =3D <0x58>; + system-power-controller; + interrupt-parent =3D <&wkup_gpio0>; + interrupts =3D <39 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells =3D <2>; + + buck1234-supply =3D <&vsys_3v3>; + + regulators { + buckc1234: buck1234 { + regulator-name =3D "vdd_core_0v8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; --=20 2.39.2