From nobody Wed Dec 17 11:37:45 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C02E1C77B76 for ; Fri, 14 Apr 2023 11:28:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230284AbjDNL26 (ORCPT ); Fri, 14 Apr 2023 07:28:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230112AbjDNL2v (ORCPT ); Fri, 14 Apr 2023 07:28:51 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A41A97ED0 for ; Fri, 14 Apr 2023 04:28:47 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id l10-20020a05600c1d0a00b003f04bd3691eso20611095wms.5 for ; Fri, 14 Apr 2023 04:28:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20221208.gappssmtp.com; s=20221208; t=1681471726; x=1684063726; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VA+8E5LZobYHQtztDzfDEriptbAWZDDL2MajJpESt6I=; b=LuWQntXf3XPHVi0bQhTZk/wFsgJcYvgL4fggnHvW2RYCeCrhQzKEHR75W9qAV8qtQy BtQ+BHg4nNQ58gULlrKVQJRWx2YI2ur3VJbkDIfKn1pi3NlN8eXr0RkfN+VXL4RAA2+T mjrePBcr25kaNG4cMrN8Vc+RzL+LtVNIEDHc6h1elKR5V7tvRnyWB6uxmjwVpyPxiUIy Hhav3NwTonPdHvpUr78JswMG9M4GmXeKKleIX3NIQ2Uj3IolOgntU0TzKdOxruSUGzOi m7futdI7b1myrCtM7Dy9oaMoM5B9wzt3L3UeldgI0L/G3HFap15GHVBYRwoez/5rOTdu l9nQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681471726; x=1684063726; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VA+8E5LZobYHQtztDzfDEriptbAWZDDL2MajJpESt6I=; b=llA+upCcJssGUNoQFYAtwxv73N1fth6uXlHryKpqnOWVCeg5j4HM06ilWbsRJu6lDH CwgDdv/PSt25ySJMCbnK2vezHhBE68fCRdixnzzCMErPF8umMIbuCbEd7F4zYOfC0YMG TJlGIVkVTeaZiKlJRUE/1qyqmIJgLL98v6TPjerpTKno5+tUQltizfX8bBkWOwOpTfRo D1HyjaFHSMOdedvXUQujUrn+dAvcX09VlOEwn+l491WNx//UZ6eTi/Az52cU9GZhPLL8 247/A/up9GWAeB42ViI0+CKB5MGeCANUdvCg8LYuMC/Kgpp0oODQtDLrpW4hHWELOlY0 iBZg== X-Gm-Message-State: AAQBX9epYjmObVi9UecAnASxpSIy+M1LS/1/OLvsUINFTrTot1rDJOEe N7O8ESN4F0no7l9sE7Gde5l7qA== X-Google-Smtp-Source: AKy350YvfYXwbj/O+Mr9nS89XvjR2SlgPaNHallWSVWJGbDSKxD2e3ArkqpZnF3WRMRT+lTyQP7Mag== X-Received: by 2002:a7b:c4da:0:b0:3ea:f73e:9d8a with SMTP id g26-20020a7bc4da000000b003eaf73e9d8amr4369443wmk.30.1681471726100; Fri, 14 Apr 2023 04:28:46 -0700 (PDT) Received: from localhost.localdomain ([2a01:e34:eca6:27f0:42a5:8f07:826a:465d]) by smtp.gmail.com with ESMTPSA id t1-20020a1c7701000000b003ede06f3178sm4063745wmi.31.2023.04.14.04.28.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 04:28:45 -0700 (PDT) From: Esteban Blanc To: nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sterzik@ti.com, u-kumar1@ti.com, eblanc@baylibre.com, jneanne@baylibre.com, jpanis@baylibre.com, aseketeli@baylibre.com Subject: [PATCH v2 1/5] arm64: dts: ti: k3-j7200-som-p0: Add TP6594 family PMICs Date: Fri, 14 Apr 2023 13:28:39 +0200 Message-Id: <20230414112843.1358067-2-eblanc@baylibre.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230414112843.1358067-1-eblanc@baylibre.com> References: <20230414112843.1358067-1-eblanc@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch adds support for TPS6594 PMIC family on wakup I2C0 bus. Theses devices provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Esteban Blanc --- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 175 ++++++++++++++++++++ 1 file changed, 175 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/= dts/ti/k3-j7200-som-p0.dtsi index fa44ed4c17d5..8458b7da068f 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -118,6 +118,25 @@ J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_D= QS */ }; }; =20 +&wkup_pmx2 { + /* wkup_pmx2 starts at 0x68 */ + wkup_i2c0_pins_default: wkup-i2c0-pins-default { + pinctrl-single,pins =3D < + J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */ + J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */ + >; + }; +}; + +&wkup_pmx3 { + /* wkup_pmx3 starts at 0x174 */ + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins =3D < + J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 7) /* (E18) WKUP_GPIO0_84 */ + >; + }; +}; + &main_pmx0 { main_i2c0_pins_default: main-i2c0-pins-default { pinctrl-single,pins =3D < @@ -231,3 +250,159 @@ flash@0 { cdns,read-delay =3D <4>; }; }; + +&wkup_i2c0 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wkup_i2c0_pins_default>; + clock-frequency =3D <400000>; + + tps659414: tps659414@48 { + compatible =3D "ti,tps6594-q1"; + reg =3D <0x48>; + ti,primary-pmic; + system-power-controller; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_irq_pins_default>; + interrupt-parent =3D <&wkup_gpio0>; + interrupts =3D <84 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells =3D <2>; + + buck1-supply =3D <&vsys_3v3>; + buck2-supply =3D <&vsys_3v3>; + buck3-supply =3D <&vsys_3v3>; + buck4-supply =3D <&vsys_3v3>; + buck5-supply =3D <&vsys_3v3>; + ldo1-supply =3D <&vsys_3v3>; + ldo2-supply =3D <&vsys_3v3>; + ldo3-supply =3D <&vsys_3v3>; + ldo4-supply =3D <&vsys_3v3>; + + regulators { + bucka1: buck1 { + regulator-name =3D "vda_mcu_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka2: buck2 { + regulator-name =3D "vdd_mcuio_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka3: buck3 { + regulator-name =3D "vdd_mcu_0v85"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka4: buck4 { + regulator-name =3D "vdd_ddr_1v1"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka5: buck5 { + regulator-name =3D "vdd_phyio_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa1: ldo1 { + regulator-name =3D "vdd1_lpddr4_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa2: ldo2 { + regulator-name =3D "vda_dll_0v8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa3: ldo3 { + regulator-name =3D "vdd_wk_0v8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa4: ldo4 { + regulator-name =3D "vda_pll_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + lp876441: lp876441@4c { + compatible =3D "ti,lp8764-q1"; + reg =3D <0x4c>; + system-power-controller; + interrupt-parent =3D <&wkup_gpio0>; + interrupts =3D <84 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells =3D <2>; + + buck1-supply =3D <&vsys_3v3>; + buck2-supply =3D <&vsys_3v3>; + buck3-supply =3D <&vsys_3v3>; + buck4-supply =3D <&vsys_3v3>; + + regulators: regulators { + buckb1: buck1 { + regulator-name =3D "vdd_cpu_avs"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <900000>; + regulator-always-on; + regulator-boot-on; + }; + + buckb2: buck2 { + regulator-name =3D "vdd_ram_0v85"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb3: buck3 { + regulator-name =3D "vdd_core_0v85"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb4: buck4 { + regulator-name =3D "vdd_io_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; --=20 2.39.2