From nobody Fri Dec 19 03:47:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1A5BC77B70 for ; Fri, 14 Apr 2023 08:15:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230133AbjDNIPs (ORCPT ); Fri, 14 Apr 2023 04:15:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229999AbjDNIPb (ORCPT ); Fri, 14 Apr 2023 04:15:31 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 322C2768D for ; Fri, 14 Apr 2023 01:15:27 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6ED894B3; Fri, 14 Apr 2023 01:16:11 -0700 (PDT) Received: from pierre123.arm.com (unknown [10.57.19.162]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D02663F6C4; Fri, 14 Apr 2023 01:15:23 -0700 (PDT) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Radu Rendec , Alexandre Ghiti , Conor Dooley , Will Deacon , Florian Fainelli , Pierre Gondois , Sudeep Holla , Greg Kroah-Hartman , "Rafael J. Wysocki" , Palmer Dabbelt , Gavin Shan , Jeremy Linton Subject: [PATCH v4 1/4] cacheinfo: Check sib_leaf in cache_leaves_are_shared() Date: Fri, 14 Apr 2023 10:14:49 +0200 Message-Id: <20230414081453.244787-2-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230414081453.244787-1-pierre.gondois@arm.com> References: <20230414081453.244787-1-pierre.gondois@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" If there is no ACPI/DT information, it is assumed that L1 caches are private and L2 (and higher) caches are shared. A cache is 'shared' between two CPUs if it is accessible from these two CPUs. Each CPU owns a representation (i.e. has a dedicated cacheinfo struct) of the caches it has access to. cache_leaves_are_shared() tries to identify whether two representations are designating the same actual cache. In cache_leaves_are_shared(), if 'this_leaf' is a L2 cache (or higher) and 'sib_leaf' is a L1 cache, the caches are detected as shared as only this_leaf's cache level is checked. This is leads to setting sib_leaf as being shared with another CPU, which is incorrect as this is a L1 cache. Check 'sib_leaf->level'. Also update the comment as the function is called when populating 'shared_cpu_map'. Fixes: f16d1becf96f ("cacheinfo: Use cache identifiers to check if the cach= es are shared if available") Signed-off-by: Pierre Gondois Reviewed-by: Conor Dooley --- drivers/base/cacheinfo.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index f3903d002819..c5d2293ac2a6 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -38,11 +38,10 @@ static inline bool cache_leaves_are_shared(struct cache= info *this_leaf, { /* * For non DT/ACPI systems, assume unique level 1 caches, - * system-wide shared caches for all other levels. This will be used - * only if arch specific code has not populated shared_cpu_map + * system-wide shared caches for all other levels. */ if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI))) - return !(this_leaf->level =3D=3D 1); + return (this_leaf->level !=3D 1) && (sib_leaf->level !=3D 1); =20 if ((sib_leaf->attributes & CACHE_ID) && (this_leaf->attributes & CACHE_ID)) --=20 2.25.1