From nobody Fri Dec 19 21:12:11 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48FD3C77B6E for ; Thu, 13 Apr 2023 13:34:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231601AbjDMNeL (ORCPT ); Thu, 13 Apr 2023 09:34:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230179AbjDMNdn (ORCPT ); Thu, 13 Apr 2023 09:33:43 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BC642D67 for ; Thu, 13 Apr 2023 06:32:50 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id d14-20020a25e60e000000b00b8f65697946so463059ybh.2 for ; Thu, 13 Apr 2023 06:32:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392768; x=1683984768; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:from:to:cc:subject:date :message-id:reply-to; bh=hkG99YNE773uJY6DfiW0UnWhIOix5tef77lVT/gJ7+Y=; b=SCAmyr5rii+OxHhjJ4xygXaKNAmPzgvRs2z2V7KlcwvyWDfav7NMF7QqzTnUeKurd3 Hi8L84xNpheHSvPYVE5VEVJ1WuCPCLZiJR5tUIke9JdRvWGEM5evCzUHmBnphGF0uFLO jbMEKybweKoV4woDsz+vx5EOWNjSU8N9XN5pT55Hcp4aVQ5r4L36VhH/SucWtsI+Mz5M 9mgijRFx8GErUVhmhnkBbXD/tWyNdJUWbnsqcG5ff6wAdviBSW1JoLIYkVZVBkb3poe3 Qlj33L92dOaBlV2MVu1dF+lzPvhl1buWpYz1NxxrY3jwVi1Hc6iHSPas9/eSQY3Zzx9k L+Yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392768; x=1683984768; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=hkG99YNE773uJY6DfiW0UnWhIOix5tef77lVT/gJ7+Y=; b=Upsoshc9igUPL0OUBO+p3EBhrLV2LhP3jdEh/bDj24VAmmUwtfA+netSOPmlPQZ9X4 71ZvPs3VMfp6J/1cXKBpYog8VdYqb/v44Dnu8LgHwec8jcz+lOpLPuj9+HH240jQX4Pw Skoh8BmYbVWspKoPZitsn6IUn6gynh9dOuNJOR36fa6AUldiPOXiqSKKM+vcIaZBsrk9 Va+qtHLZtVIO0p55cHjJc4iVJ9kPNY3/WhrEJYDXcLg1JAMIvDJYAlOlHlVRupmh77rq HHiU1RUGmZepHeKhQL3SHfg3yswv8ayv6rmQe0r/EbbEEuO8cVRO768HiF/1j2S2Mkoe TpcA== X-Gm-Message-State: AAQBX9eBE3SK4Bpwi4ogXyAPH8IbBEKLaCfKMrqhuYmaAXvjujp5mDQJ 8G0TCdEe5lwlY5lNuXf8u7vm3qItiCFB X-Google-Smtp-Source: AKy350ZbcCSVHnIOB5SI+MJVDFL2OKjgqfRVebLx+OvmeX3AkASc9/UobPnB21zwUXFIz2Qk9VY553PmZs1t X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a81:af1e:0:b0:52e:e095:d840 with SMTP id n30-20020a81af1e000000b0052ee095d840mr1495215ywh.0.1681392767708; Thu, 13 Apr 2023 06:32:47 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:48 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-21-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 20/21] perf vendor events intel: Fix uncore topics for snowridgex From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect and io. Signed-off-by: Ian Rogers --- .../arch/x86/snowridgex/uncore-cache.json | 7100 +++++ .../x86/snowridgex/uncore-interconnect.json | 6016 +++++ .../arch/x86/snowridgex/uncore-io.json | 8944 +++++++ .../arch/x86/snowridgex/uncore-other.json | 22056 ---------------- 4 files changed, 22060 insertions(+), 22056 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/snowridgex/uncore-cache.= json create mode 100644 tools/perf/pmu-events/arch/x86/snowridgex/uncore-interc= onnect.json create mode 100644 tools/perf/pmu-events/arch/x86/snowridgex/uncore-io.json delete mode 100644 tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.= json diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-cache.json b/= tools/perf/pmu-events/arch/x86/snowridgex/uncore-cache.json new file mode 100644 index 000000000000..a68a5bb05c22 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-cache.json @@ -0,0 +1,7100 @@ +[ + { + "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.= ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.MMIO_READ", + "Filter": "config1=3D0x40040e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts= .ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.MMIO_WRITE", + "Filter": "config1=3D0x40041e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . D= erived from unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.UNCACHEABLE", + "Filter": "config1=3D0x40e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "Streaming stores (full cache line). Derived f= rom unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.STREAMING_FULL", + "Filter": "config1=3D0x41833", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "ScaleUnit": "64Bytes", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "Streaming stores (partial cache line). Derive= d from unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.STREAMING_PARTIAL", + "Filter": "config1=3D0x41a33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "ScaleUnit": "64Bytes", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x89", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x89", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x89", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8B", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8B", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8B", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x85", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x85", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x85", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x87", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x87", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x87", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x8D", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x8D", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x8D", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken= ", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Intermediate bypass Take= n : Counts the number of times when the CHA was able to bypass HA pipe on t= he way to iMC. This is a latency optimization for situations when there is= light loadings on the memory subsystem. This can be filtered by when the = bypass was taken and when it was not. : Filter for transactions that succee= ded in taking the intermediate bypass.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Not Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Not Taken : Counts the n= umber of times when the CHA was able to bypass HA pipe on the way to iMC. = This is a latency optimization for situations when there is light loadings = on the memory subsystem. This can be filtered by when the bypass was taken= and when it was not. : Filter for transactions that could not take the byp= ass, and issues a read to memory. Note that transactions that did not take = the bypass but did not issue read to memory will not be counted.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Taken : Counts the numbe= r of times when the CHA was able to bypass HA pipe on the way to iMC. This= is a latency optimization for situations when there is light loadings on t= he memory subsystem. This can be filtered by when the bypass was taken and= when it was not. : Filter for transactions that succeeded in taking the fu= ll bypass.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Uncore cache clock ticks", + "EventName": "UNC_CHA_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_CHA_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Any Cycle with Mul= tiple Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Mu= ltiple Snoops : Counts the number of transactions that trigger a configurab= le number of cross snoops. Cores are snooped if the transaction looks up t= he cache and determines that it is necessary based on the operation type an= d what CoreValid bits are set. For example, if 2 CV bits are set on a data= read, the cores must have the data in S state so it is not necessary to sn= oop them. However, if only 1 CV bit is set the core my have modified the d= ata. If the transaction was an RFO, it would need to invalidate the lines.= This event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0xf2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop = : Counts the number of transactions that trigger a configurable number of c= ross snoops. Cores are snooped if the transaction looks up the cache and d= etermines that it is necessary based on the operation type and what CoreVal= id bits are set. For example, if 2 CV bits are set on a data read, the cor= es must have the data in S state so it is not necessary to snoop them. How= ever, if only 1 CV bit is set the core my have modified the data. If the t= ransaction was an RFO, it would need to invalidate the lines. This event c= an be filtered based on who triggered the initial snoop(s).", + "UMask": "0xf1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Core Requ= ests", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Core Req= uests : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Core Reques= ts", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Core Reque= sts : Counts the number of transactions that trigger a configurable number = of cross snoops. Cores are snooped if the transaction looks up the cache a= nd determines that it is necessary based on the operation type and what Cor= eValid bits are set. For example, if 2 CV bits are set on a data read, the= cores must have the data in S state so it is not necessary to snoop them. = However, if only 1 CV bit is set the core my have modified the data. If t= he transaction was an RFO, it would need to invalidate the lines. This eve= nt can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Eviction= : Counts the number of transactions that trigger a configurable number of = cross snoops. Cores are snooped if the transaction looks up the cache and = determines that it is necessary based on the operation type and what CoreVa= lid bits are set. For example, if 2 CV bits are set on a data read, the co= res must have the data in S state so it is not necessary to snoop them. Ho= wever, if only 1 CV bit is set the core my have modified the data. If the = transaction was an RFO, it would need to invalidate the lines. This event = can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Eviction := Counts the number of transactions that trigger a configurable number of cr= oss snoops. Cores are snooped if the transaction looks up the cache and de= termines that it is necessary based on the operation type and what CoreVali= d bits are set. For example, if 2 CV bits are set on a data read, the core= s must have the data in S state so it is not necessary to snoop them. Howe= ver, if only 1 CV bit is set the core my have modified the data. If the tr= ansaction was an RFO, it would need to invalidate the lines. This event ca= n be filtered based on who triggered the initial snoop(s).", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple External = Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple External= Snoops : Counts the number of transactions that trigger a configurable num= ber of cross snoops. Cores are snooped if the transaction looks up the cac= he and determines that it is necessary based on the operation type and what= CoreValid bits are set. For example, if 2 CV bits are set on a data read,= the cores must have the data in S state so it is not necessary to snoop th= em. However, if only 1 CV bit is set the core my have modified the data. = If the transaction was an RFO, it would need to invalidate the lines. This= event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single External Sn= oops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single External S= noops : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Counter 0 Occupancy", + "EventCode": "0x1F", + "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Counter 0 Occupancy : Since occupancy counts= can only be captured in the Cbo's 0 counter, this event allows a user to c= apture occupancy related information by filtering the Cb0 occupancy count c= aptured in Counter 0. The filtering available is found in the control reg= ister - threshold, invert and edge detect. E.g. setting threshold to 1 ca= n effectively monitor how many cycles the monitored queue has an entry.", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.GO", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.NOP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.PULL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xBA", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xBA", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xB9", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xB9", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "HA to iMC Reads Issued : ISOCH", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", + "PerPkg": "1", + "PublicDescription": "HA to iMC Reads Issued : ISOCH : Count of th= e number of reads issued to any of the memory controller channels. This ca= n be filtered by the priority of the reads.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : Full Lin= e Non-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to any of the memory controller channels.= ", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Fu= ll Line", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH F= ull Line : Counts the total number of full line writes issued from the HA i= nto the memory controller.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : Partial = Non-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : Partial= Non-ISOCH : Counts the total number of full line writes issued from the HA= into the memory controller.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Pa= rtial", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH P= artial : Counts the total number of full line writes issued from the HA int= o the memory controller.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", + "UMask": "0x1fffff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ANY_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Any local or remote transaction to the LLC, includi= ng prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE", + "PerPkg": "1", + "UMask": "0x1bd0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Code Reads", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Code Reads : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1bd0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote CRd transactions to the LLC. This = includes CRd prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Code Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Code Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", + "UMask": "0x1bd001", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Local request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Local request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Any local transaction to the LLC, including prefe= tches from the Core", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", + "PerPkg": "1", + "UMask": "0x1bc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1bc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL", + "PerPkg": "1", + "UMask": "0x1fc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Read Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Read Request Filter : C= ounts the number of times the LLC was accessed - this includes code, data, = prefetches and hints coming from L2. This has numerous filters available. = Note the non-standard filtering equation. This event will count requests = that lookup the cache multiple times with multiple increments. One must AL= WAYS select a state or states (in the umask field) to match. Otherwise, th= e event will count nothing. : Read transactions.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", + "UMask": "0x1bc101", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DMND_READ_LOCAL", + "PerPkg": "1", + "UMask": "0x841ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : E State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.E", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : E State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Exclusive State", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : F State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : F State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Forward State", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "UMask": "0x1a44ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush or Invalidate Filter := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : I State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.I", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : I State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Miss", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed locally Fi= lter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed locally F= ilter : Counts the number of times the LLC was accessed - this includes cod= e, data, prefetches and hints coming from L2. This has numerous filters av= ailable. Note the non-standard filtering equation. This event will count = requests that lookup the cache multiple times with multiple increments. On= e must ALWAYS select a state or states (in the umask field) to match. Othe= rwise, the event will count nothing. : Transaction whose address resides in= the local MC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : M State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.M", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : M State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Modified State", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1fe001", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Write Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Write Request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Writeback transactions to the LLC This includes = all write transactions -- both Cacheable and UC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Reads", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Reads : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS select a state= or states (in the umask field) to match. Otherwise, the event will count = nothing.", + "UMask": "0x1bd9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Locally HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Locally HOMed : Counts the number of times the LLC was accessed - this= includes code, data, prefetches and hints coming from L2. This has numero= us filters available. Note the non-standard filtering equation. This even= t will count requests that lookup the cache multiple times with multiple in= crements. One must ALWAYS select a state or states (in the umask field) to= match. Otherwise, the event will count nothing.", + "UMask": "0x9d9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Remotely HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_REM_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Remotely HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", + "UMask": "0x11d9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Read Misses : Counts the num= ber of times the LLC was accessed - this includes code, data, prefetches an= d hints coming from L2. This has numerous filters available. Note the non= -standard filtering equation. This event will count requests that lookup t= he cache multiple times with multiple increments. One must ALWAYS select a= state or states (in the umask field) to match. Otherwise, the event will = count nothing.", + "UMask": "0x1bd901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally HOMed Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally HOMed Read Misses : = Counts the number of times the LLC was accessed - this includes code, data,= prefetches and hints coming from L2. This has numerous filters available.= Note the non-standard filtering equation. This event will count requests= that lookup the cache multiple times with multiple increments. One must A= LWAYS select a state or states (in the umask field) to match. Otherwise, t= he event will count nothing.", + "UMask": "0xbd901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely HOMed Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_REM_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely HOMed Read Misses := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", + "UMask": "0x13d901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely requested Read or Sn= oop Misses that are Remotely HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_OR_SNOOP_REMOTE_MISS_REM_HOM= ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely requested Read or S= noop Misses that are Remotely HOMed : Counts the number of times the LLC wa= s accessed - this includes code, data, prefetches and hints coming from L2.= This has numerous filters available. Note the non-standard filtering equ= ation. This event will count requests that lookup the cache multiple times= with multiple increments. One must ALWAYS select a state or states (in th= e umask field) to match. Otherwise, the event will count nothing.", + "UMask": "0x161901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely Requested Reads that= are Locally HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_REMOTE_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely Requested Reads tha= t are Locally HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", + "UMask": "0xa19ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Reads that Hit the Snoop Filt= er", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_SF_HIT", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Reads that Hit the Snoop Fil= ter : Counts the number of times the LLC was accessed - this includes code,= data, prefetches and hints coming from L2. This has numerous filters avai= lable. Note the non-standard filtering equation. This event will count re= quests that lookup the cache multiple times with multiple increments. One = must ALWAYS select a state or states (in the umask field) to match. Otherw= ise, the event will count nothing.", + "UMask": "0x1bd90e", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x1bc8ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote RFO transactions to the LLC. This = includes RFO prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1bc801", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.RFO_LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_PREF_LOCAL", + "PerPkg": "1", + "UMask": "0x888ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : S State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.S", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : S State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Shared State", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - E State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_E", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - E State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Exclusive State", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - H State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_H", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - H State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit HitMe State", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - S State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_S", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - S State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Shared State", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Filters Requests for those th= at write info into the cache", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Write Requests : Counts the = number of times the LLC was accessed - this includes code, data, prefetches= and hints coming from L2. This has numerous filters available. Note the = non-standard filtering equation. This event will count requests that looku= p the cache multiple times with multiple increments. One must ALWAYS set u= mask bit 0 and select a state or states to match. Otherwise, the event wil= l count nothing. : Writeback transactions from L2 to the LLC This includes= all write transactions -- both Cacheable and UC.", + "UMask": "0x1a42ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL", + "PerPkg": "1", + "UMask": "0x842ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : All Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.ALL", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : All Lines Victimized : Co= unts the number of lines that were victimized on a fill. This can be filte= red by the state that the line was in.", + "UMask": "0xf", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in E state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in E state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - All Lines : Count= s the number of lines that were victimized on a fill. This can be filtered= by the state that the line was in.", + "UMask": "0x200f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in E State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in E State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2002", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in M State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in M State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2001", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local Only", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local Only : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in S State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2004", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in M state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in M state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in S State : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : CV0 Prefetch Miss", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : CV0 Prefetch Miss : Miscellaneous= events in the Cbo.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : CV0 Prefetch Victim", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : CV0 Prefetch Victim : Miscellaneo= us events in the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Number of times that an RFO hit in S state.", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RFO_HIT_S", + "PerPkg": "1", + "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : Silent Snoop Eviction", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : Silent Snoop Eviction : Miscellan= eous events in the Cbo. : Counts the number of times when a Snoop hit in FS= E states and triggered a silent eviction. This is useful because this info= rmation is lost in the PRE encodings.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : Write Combining Aliasing", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.WC_ALIASING", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : Write Combining Aliasing : Miscel= laneous events in the Cbo. : Counts the number of times that a USWC write (= WCIL(F)) transaction hit in the LLC in M state, triggering a WBMtoI followe= d by the USWC write. This occurs when there is WC aliasing.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xE6", + "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xE6", + "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ADEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.AKEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ALLRSFWAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.BLEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.FSF_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLOWSNP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLWAYRSV", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_PAMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_WAYMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.HACREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IDX_INPIPE", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IPQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IRQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ISMQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IVEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.LLC_WAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.NOTALLOWSNOOP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ONE_FSF_VIC", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ONE_RSP_CON", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.PTL_INPIPE", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.RMW_SETMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.RRQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.SETMATCHENTRYWSCT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.SF_WAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.TOPA_MATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.TORID_MATCH_GO_P", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_REQ", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_RSP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCB", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCS", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_RSP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_WB", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.WAY_MATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC0", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC0 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC1", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC10", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC10", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC10 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 10 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC11", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC11", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC11 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 11 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC12", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC12", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC12 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 12 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC13", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC13", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC13 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 13 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC2", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC2 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC3", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC3 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC4", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC4 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC5", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC5 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC6", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC6", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC6 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 6 only.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC7", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC7", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC7 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 7 only.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC8", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC8", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC8 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 8 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC9", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC9", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC9 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 9 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "Local INVITOE requests (exclusive ownership o= f a cache line without receiving data) that miss the SF/LLC and remote INVI= TOE requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "Local read requests that miss the SF/LLC and = remote read requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS", + "PerPkg": "1", + "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "Local write requests that miss the SF/LLC and= remote write requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", + "UMask": "0xc", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_CHA_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected= ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IRQ Rejecte= d : Counts number of allocations per cycle into the specified Ingress queue= .", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C or SF Way", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : L= LC or SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 1 : ANY0", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 1 : HA", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 1 : ANY0", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 1 : HA", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : IRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : IRQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : AD REQ on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : AD REQ on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : AD RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : AD RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : Non UPI AK Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : Non UPI AK Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject AK ring me= ssage", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL NCB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL NCB on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL NCS on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL NCS on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for generat= ing a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL WB on VN0 : Retry= Queue Inserts of Transactions that were already in another Retry Q (sub-ev= ents encode the reason for the next reject) : No BL VN0 credit for generati= ng a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : Non UPI IV Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : Non UPI IV Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject IV ring me= ssage", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : Allow Snoop", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : Allow Snoop : Retry = Queue Inserts of Transactions that were already in another Retry Q (sub-eve= nts encode the reason for the next reject)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : ANY0", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : ANY0 : Retry Queue I= nserts of Transactions that were already in another Retry Q (sub-events enc= ode the reason for the next reject) : Any condition listed in the Other0 Re= ject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : HA", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : HA : Retry Queue Ins= erts of Transactions that were already in another Retry Q (sub-events encod= e the reason for the next reject)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : LLC OR SF Way", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : LLC OR SF Way : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Way conflict with another re= quest that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : LLC Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : LLC Victim : Retry Q= ueue Inserts of Transactions that were already in another Retry Q (sub-even= ts encode the reason for the next reject)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : PhyAddr Match", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : PhyAddr Match : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Address match with an outsta= nding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : SF Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : SF Victim : Retry Qu= eue Inserts of Transactions that were already in another Retry Q (sub-event= s encode the reason for the next reject) : Requests did not generate Snoop = filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : Victim : Retry Queue= Inserts of Transactions that were already in another Retry Q (sub-events e= ncode the reason for the next reject)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the PRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : AD REQ on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : AD RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Re= quest", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : Non UPI AK R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL NCB on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL NCS on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL WB on VN0= : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)= : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Re= quest", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : Non UPI IV R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : Allow Snoop = : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : ANY0", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : ANY0 : REQUE= STQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : Any c= ondition listed in the WBQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : HA", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : HA : REQUEST= Q includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way= ", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : LLC OR SF Wa= y : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : LLC Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : LLC Victim := REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match= ", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : PhyAddr Matc= h : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Address match with an outstanding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : SF Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : SF Victim : = REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : = Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : Victim : REQ= UESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_CHA_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.E_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores? cache.? Snoop filter capacity= evictions occur when the snoop filter is full and evicts an existing entry= to track a new entry.? Does not count clean evictions such as when a core?= s cache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.M_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores? cache.? Snoop filter capacity = evictions occur when the snoop filter is full and evicts an existing entry = to track a new entry.? Does not count clean evictions such as when a core?s= cache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.S_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores? cache.? Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry.? Does not count clean evictions such as when a core?s c= ache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : All", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : All : Counts the number of sno= ops issued by the HA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Broadcast snoops for Local Requ= ests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Broadcast snoops for Local Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f broadcast snoops issued by the HA responding to local requests", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Directed snoops for Local Reque= sts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Directed snoops for Local Requ= ests : Counts the number of snoops issued by the HA. : Counts the number of= directed snoops issued by the HA responding to local requests", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Snoops sent for Local Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Snoops sent for Local Requests= : Counts the number of snoops issued by the HA. : Counts the number of bro= adcast or directed snoops issued by the HA responding to local requests", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspCnflct", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspCnflct := Number of snoop responses received for a Local request : Filters for snoo= ps responses of RspConflict to local CA requests. This is returned when a = snoop finds an existing outstanding transaction in a remote caching agent w= hen it CAMs that caching agent. This triggers conflict resolution hardware= . This covers both RspCnflct and RspCnflctWbI.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspFwd : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspFwd to local CA requests. This snoop response is only poss= ible for RdCur when a snoop HITM/E in a remote caching agent and it directl= y forwards data to a requestor without changing the requestor's cache line = state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : Rsp*FWD*WB = : Number of snoop responses received for a Local request : Filters for a s= noop response of Rsp*Fwd*WB to local CA requests. This snoop response is o= nly used in 4s systems. It is used when a snoop HITM's in a remote caching= agent and it directly forwards data to a requestor, and simultaneously ret= urns data to the home to be written back to memory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspI", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspI : Numb= er of snoop responses received for a Local request : Filters for snoops re= sponses of RspI to local CA requests. RspI is returned when the remote cac= he does not have the data, or when the remote cache silently evicts data (s= uch as when an RFO hits non-modified data).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspIFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspIFwd : N= umber of snoop responses received for a Local request : Filters for snoop = responses of RspIFwd to local CA requests. This is returned when a remote = caching agent forwards data and the requesting agent is able to acquire the= data in E or M states. This is commonly returned with RFO transactions. = It can be either a HitM or a HitFE.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspS", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspS : Numb= er of snoop responses received for a Local request : Filters for snoop res= ponses of RspS to local CA requests. RspS is returned when a remote cache = has data but is not forwarding it. It is a way to let the requesting socke= t know that it cannot allocate the data in E state. No data is sent with S= RspS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspSFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspSFwd : N= umber of snoop responses received for a Local request : Filters for a snoo= p response of RspSFwd to local CA requests. This is returned when a remote= caching agent forwards data but holds on to its currently copy. This is c= ommon for data and code reads that hit in a remote socket in E or F state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : Rsp*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : Rsp*WB : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspIWB or RspSWB to local CA requests. This is returned when = a non-RFO request hits in M state. Data and Code Reads can return either R= spIWB or RspSWB depending on how the system has been configured. InvItoE t= ransactions will also return RspIWB because they must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : MtoI RspIData= M", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM= ", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit LLC", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit SF", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t LLC", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t SF", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0xc001ffff", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DDR4 Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DDR4 Access : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.DDR4", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : SF/LLC Evictions", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.EVICT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts. : TOR allocation occurred as a result of SF/LLC e= victions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Hits", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Hits : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xc001ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushes issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushes issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc8c7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushOpts issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushOpts issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8d7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRDs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRDs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", + "UMask": "0xc80fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; CRd Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores : = Counts the number of entries successfully inserted into the TOR that match = qualifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "UMask": "0xc827ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es : Counts the number of entries successfully inserted into the TOR that m= atch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", + "UMask": "0xc8a7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores that= Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc001fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0xc80ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc88ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to page walks that hit the LLC : Counts the number of entries successfull= y inserted into the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores tha= t hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores th= at hit the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc827fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that hit the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0xc807fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc887fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc80ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc88ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk that missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc837fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt issued by iA Cores that= missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt issued by iA Cores tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc827fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that missed the LLC : Counts the number of entries successfully inserted= into the TOR that match qualifications specified by the subevent. Does n= ot include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc807fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc887fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that = Missed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : UCRdFs issued by iA Cores that= Missed LLC : Counts the number of entries successfully inserted into the T= OR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that M= issed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that M= issed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Mi= ssed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WiLs issued by iA Cores that M= issed LLC : Counts the number of entries successfully inserted into the TOR= that match qualifications specified by the subevent. Does not include ad= dressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", + "UMask": "0xc807ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc887ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", + "PerPkg": "1", + "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc3fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoIs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI", + "PerPkg": "1", + "PublicDescription": "WbEFtoIs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc37ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBMtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE", + "PerPkg": "1", + "PublicDescription": "WbMtoEs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xcc2fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. = Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", + "PerPkg": "1", + "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Writ= e Backs) :Counts the number of entries successfully inserted into the TOR = that match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBStoIs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI", + "PerPkg": "1", + "PublicDescription": "WbStoIs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xcc67ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushes issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices th= at hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that hit the LLC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= hit the LLC : Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xcc43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xcd43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices th= at missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that missed the LLC : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= missed the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8f3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Co= unts the number of entries successfully inserted into the TOR that match qu= alifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WbMtoIs issued by IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IRQ - iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts. : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IRQ - Non iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just ISOC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ISOC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just ISOC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Local Targets", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Local Targets : Counts th= e number of entries successfully inserted into the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local iA and IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local iA and IO : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts. : All locally initiated requests", + "UMask": "0xc000ff05", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local iA : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally initiated requests from iA Cores", + "UMask": "0xc000ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local IO : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally generated IO traffic", + "UMask": "0xc000ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of= the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] o= f the extended umask field : Counts the number of entries successfully inse= rted into the TOR that match qualifications specified by the subevent. Do= es not include addressless requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Misses", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Misses : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : MMCFG Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : MMCFG Access : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NearMem", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NearMem : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NonCoherent", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NotNearMem", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NotNearMem : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests such = as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in = b[29:19] of the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in= b[29:19] of the extended umask field : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PRQ - IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. Does not include addressless requests such as lo= cks and interrupts. : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PRQ - Non IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the nu= mber of entries successfully inserted into the TOR that match qualification= s specified by the subevent. Does not include addressless requests such a= s locks and interrupts.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DDR4 Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DDR4 Access : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : SF/LLC Evictions", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts. : TOR allocation occurred as a = result of SF/LLC evictions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Hits", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc001ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc8c7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Core= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8d7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRDs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRDs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc80fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = : For each cycle, this event accumulates the number of valid entries in the= TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc827ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores : For each cycle, this event accumulates the number of valid entries i= n the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that hit the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", + "UMask": "0xc837fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores t= hat hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = that hit the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc827fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that hit the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xc8a7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc807fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc887fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc88ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that missed the LLC : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc837fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt issued by iA Cores th= at missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt issued by iA Cores t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc827fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that missed the LLC : For each cycle, this event accumulates the numbe= r of valid entries in the TOR that match qualifications specified by the su= bevent. Does not include addressless requests such as locks and interru= pts.", + "UMask": "0xc8a7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc807fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc887fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores tha= t Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores th= at Missed LLC : For each cycle, this event accumulates the number of valid = entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that= Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that= Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that = Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that= Missed LLC : For each cycle, this event accumulates the number of valid en= tries in the TOR that match qualifications specified by the subevent. D= oes not include addressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc807ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc887ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Device= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices = that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that hit the LLC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at hit the LLC : For each cycle, this event accumulates the number of valid= entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xcc43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", + "UMask": "0xcd43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices = that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= that missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc001fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that missed the LLC : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at missed the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8f3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : = For each cycle, this event accumulates the number of valid entries in the T= OR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IRQ - iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts. : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IRQ - Non iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just ISOC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Local Targets", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Local Targets : For eac= h cycle, this event accumulates the number of valid entries in the TOR that= match qualifications specified by the subevent. Does not include addre= ssless requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local iA and IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local iA and IO : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts. : All locally initiated= requests", + "UMask": "0xc000ff05", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local iA : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally initiated reques= ts from iA Cores", + "UMask": "0xc000ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local IO : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally generated IO tra= ffic", + "UMask": "0xc000ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] = of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19]= of the extended umask field : For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. Does not include addressless requests such as locks and int= errupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Misses", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Misses : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : MMCFG Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NearMem", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NearMem : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NonCoherent", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NonCoherent : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NotNearMem", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NOT_NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NotNearMem : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. Does not include addressl= ess requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode i= n b[29:19] of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode = in b[29:19] of the extended umask field : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PRQ - IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts. : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cy= cle, this event accumulates the number of valid entries in the TOR that mat= ch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xB3", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xB3", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI : Pushed to LLC", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", + "PerPkg": "1", + "PublicDescription": "WbPushMtoI : Pushed to LLC : Counts the numb= er of times when the CHA was received WbPushMtoI : Counts the number of tim= es when the CHA was able to push WbPushMToI to LLC", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI : Pushed to Memory", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", + "PerPkg": "1", + "PublicDescription": "WbPushMtoI : Pushed to Memory : Counts the n= umber of times when the CHA was received WbPushMtoI : Counts the number of = times when the CHA was unable to push WbPushMToI to LLC (hence pushed it to= MEM)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC0 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC10", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC10", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC10 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 10 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC11", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC11", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC11 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 11 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC12", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC12", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC12 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 12 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC13", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC13", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC13 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 13 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC2 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC3 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC4 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC5 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC6", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC6", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC6 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 6 only.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC7", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC7", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC7 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 7 only.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC8", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC8", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC8 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 8 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC9", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC9", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC9 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 9 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 0?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits= ", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 0?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 1?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits= ", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 1?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Sent (on 0?)", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.SENT0", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Sent (on 0?) : Number of XP= T prefetches sent", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Sent (on 1?)", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.SENT1", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Sent (on 1?) : Number of XP= T prefetches sent", + "UMask": "0x10", + "Unit": "CHA" + } +] diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-interconnect.= json b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-interconnect.json new file mode 100644 index 000000000000..de3840078e21 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-interconnect.json @@ -0,0 +1,6016 @@ +[ + { + "BriefDescription": "Total Write Cache Occupancy : Any Source", + "EventCode": "0x0F", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Total Write Cache Occupancy : Any Source : A= ccumulates the number of reads and writes that are outstanding in the uncor= e in each cycle. This is effectively the sum of the READ_OCCUPANCY and WRI= TE_OCCUPANCY events. : Tracks all requests from any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy : Snoops", + "EventCode": "0x0F", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", + "PerPkg": "1", + "PublicDescription": "Total Write Cache Occupancy : Snoops : Accum= ulates the number of reads and writes that are outstanding in the uncore in= each cycle. This is effectively the sum of the READ_OCCUPANCY and WRITE_O= CCUPANCY events.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Total IRP occupancy of inbound read and write= requests to coherent memory.", + "EventCode": "0x0f", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", + "PerPkg": "1", + "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests to coherent memory. This is effectively the sum of read occupan= cy and write occupancy.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Clockticks of the IO coherency tracker (IRP)", + "EventCode": "0x01", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops : CLFlush", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", + "PerPkg": "1", + "PublicDescription": "Coherent Ops : CLFlush : Counts the number o= f coherency related operations servied by the IRP", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCITOM", + "PerPkg": "1", + "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.RFO", + "PerPkg": "1", + "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops : WbMtoI", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.WBMTOI", + "PerPkg": "1", + "PublicDescription": "Coherent Ops : WbMtoI : Counts the number of= coherency related operations servied by the IRP", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF RF full", + "EventCode": "0x17", + "EventName": "UNC_I_FAF_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", + "EventCode": "0x18", + "EventName": "UNC_I_FAF_INSERTS", + "PerPkg": "1", + "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "Occupancy of the IRP FAF queue.", + "EventCode": "0x19", + "EventName": "UNC_I_FAF_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF allocation -- sent to ADQ", + "EventCode": "0x16", + "EventName": "UNC_I_FAF_TRANSACTIONS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.EVICTS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of At= omic Transactions as Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Re= ad Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Wr= ite Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.FAST_REJ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.FAST_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers = From Primary to Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.FAST_XFER", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints = From Primary to Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn= 't find prefetch", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Lost Forward", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.LOST_FWD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Received Invalid", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Received Invalid : Sec= ondary received a transfer that did not have sufficient MESI state", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Received Valid", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Received Valid : Secon= dary received a transfer that did have sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_E", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of E Lin= e : Secondary received a transfer that did have sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of I Lin= e : Snoop took cacheline ownership before write from data was committed.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_M", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of M Lin= e : Snoop took cacheline ownership before write from data was committed.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_S", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of S Lin= e : Secondary received a transfer that did not have sufficient MESI state", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Requests", + "EventCode": "0x14", + "EventName": "UNC_I_P2P_INSERTS", + "PerPkg": "1", + "PublicDescription": "P2P Requests : P2P requests from the ITC", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Occupancy", + "EventCode": "0x15", + "EventName": "UNC_I_P2P_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "P2P Occupancy : P2P B & S Queue Occupancy", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P completions", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if local only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if local and target = matches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P Message", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P reads", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.RD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : Match if remote only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if remote and target= matches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P Writes", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.WR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", + "UMask": "0x7e", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", + "UMask": "0x74", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", + "UMask": "0x72", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", + "UMask": "0x78", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", + "UMask": "0x71", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit E or S", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit I", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit M", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Miss", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.MISS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpCode", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpData", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpInv", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Atomic", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.ATOMIC", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Atomic : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Tracks the number of atomic transactions", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Other", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.OTHER", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Other : Counts t= he number of Inbound transactions from the IRP to the Uncore. This can be = filtered based on request type in addition to the source queue. Note the s= pecial filtering equation. We do OR-reduction on the request type. If the= SOURCE bit is set, then we also do AND qualification based on the source p= ortID. : Tracks the number of 'other' kinds of transactions.", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Writes", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Writes : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Trackes only write requests. Each write request should have a pr= efetch, so there is no need to explicitly track these requests. For writes= that are tickled and have to retry, the counter will be incremented for ea= ch retry.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Egress Allocations", + "EventCode": "0x0B", + "EventName": "UNC_I_TxC_AK_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Cycles Full", + "EventCode": "0x05", + "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Inserts", + "EventCode": "0x02", + "EventName": "UNC_I_TxC_BL_DRS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Occupancy", + "EventCode": "0x08", + "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Cycles Full", + "EventCode": "0x06", + "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Inserts", + "EventCode": "0x03", + "EventName": "UNC_I_TxC_BL_NCB_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Occupancy", + "EventCode": "0x09", + "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Cycles Full", + "EventCode": "0x07", + "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Inserts", + "EventCode": "0x04", + "EventName": "UNC_I_TxC_BL_NCS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Occupancy", + "EventCode": "0x0A", + "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", + "EventCode": "0x1C", + "EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": ": Counts the number times when it is not pos= sible to issue a request to the M2PCIe because there are no Egress Credits = available on AD0, A1 or AD0&AD1 both. Stalls on both AD0 and AD1 will count= as 2", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD0 Egress Credits Stalls", + "EventCode": "0x1A", + "EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No AD0 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD0 Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD1 Egress Credits Stalls", + "EventCode": "0x1B", + "EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No AD1 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD1 Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x1D", + "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No BL Egress Credit Stalls : Counts the numb= er times when it is not possible to issue data to the R2PCIe because there = are no BL Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0x0D", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0x0E", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0x0C", + "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Outbound Request Queue Occupancy : Accumulte= s the number of outstanding outbound requests from the IRP to the switch (t= owards the devices). This can be used in conjuection with the allocations = event in order to calculate average latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x85", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x85", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x85", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x87", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x87", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x87", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x8D", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x8D", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x8D", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8F", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8F", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8F", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass : Not Taken", + "EventCode": "0x22", + "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.NOT_TAKEN", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass : Taken", + "EventCode": "0x22", + "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass : Not Taken", + "EventCode": "0x21", + "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass : Taken", + "EventCode": "0x21", + "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Clockticks of the mesh to memory (M2M)", + "EventName": "UNC_M2M_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2M_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to core mode, which bypass= es the CHA, was disabled", + "EventCode": "0x24", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", + "EventCode": "0x60", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action was overridden", + "EventCode": "0x25", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xBA", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xBA", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xB9", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xB9", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ALL", + "PerPkg": "1", + "UMask": "0x704", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_ALL", + "PerPkg": "1", + "UMask": "0x104", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR", + "PerPkg": "1", + "UMask": "0x140", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_ISOCH", + "PerPkg": "1", + "UMask": "0x102", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_NORMAL", + "PerPkg": "1", + "UMask": "0x101", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_ALL", + "PerPkg": "1", + "UMask": "0x204", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR", + "PerPkg": "1", + "UMask": "0x240", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_ISOCH", + "PerPkg": "1", + "UMask": "0x202", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_NORMAL", + "PerPkg": "1", + "UMask": "0x201", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - All Chan= nels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.FROM_TGR", + "PerPkg": "1", + "UMask": "0x740", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ISOCH", + "PerPkg": "1", + "UMask": "0x702", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - A= ll Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.NORMAL", + "PerPkg": "1", + "UMask": "0x701", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - All C= hannels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.ALL", + "PerPkg": "1", + "UMask": "0x1c10", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_ALL", + "PerPkg": "1", + "UMask": "0x410", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL", + "PerPkg": "1", + "UMask": "0x401", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x404", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL", + "PerPkg": "1", + "UMask": "0x402", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x408", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_ALL", + "PerPkg": "1", + "UMask": "0x810", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL", + "PerPkg": "1", + "UMask": "0x801", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x804", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL", + "PerPkg": "1", + "UMask": "0x802", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x808", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - All Cha= nnels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL", + "PerPkg": "1", + "UMask": "0x1c01", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x1c04", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", + "PerPkg": "1", + "UMask": "0x1c02", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Al= l Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x1c08", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts", + "EventCode": "0x64", + "EventName": "UNC_M2M_MIRR_WRQ_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x65", + "EventName": "UNC_M2M_MIRR_WRQ_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xE6", + "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xE6", + "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches : MC Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches : Mesh Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MESH", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS", + "EventCode": "0x73", + "EventName": "UNC_M2M_PREFCAM_CIS_DROPS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : All Channels", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : Channel 0", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : Channel 1", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : All Channels", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 0", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 1", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA0_INVAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA1_INVAL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_MISS_INVAL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_RSP_PDRESET", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA0_INVAL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA1_INVAL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_MISS_INVAL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_RSP_PDRESET", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - Ch 0", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - Ch 1", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - All Channels", + "EventCode": "0x6f", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = Ch 0", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 0", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 0", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = Ch 1", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI - Ch 1", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI- Ch 1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 2", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH2_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 2", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- All Channels", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPTUPI_ALLCH", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - All Channels", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = All Channels", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - Ch 0", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 0", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 0", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - Ch 1", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 1", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 2", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH2_XPTUPI", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - All Channels", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPTUPI_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - All Channels", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.ERRORBLK_RxC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.NOT_PF_SAD_REGION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_HIT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_SECURE_DROP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.RPQ_PROXY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.STOP_B2B", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.WPQ_PROXY", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.XPT_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.ERRORBLK_RxC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.NOT_PF_SAD_REGION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_HIT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_SECURE_DROP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.RPQ_PROXY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.STOP_B2B", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.WPQ_PROXY", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.XPT_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : All Channels", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 0", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 1", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": ": All Channels", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 0", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 1", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", + "EventCode": "0x79", + "EventName": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_INSERTS", + "EventCode": "0x78", + "EventName": "UNC_M2M_PREFCAM_RxC_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", + "EventCode": "0x77", + "EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_M2M_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 0", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 1", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 0", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Full", + "EventCode": "0x04", + "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Not Empty", + "EventCode": "0x03", + "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Allocations", + "EventCode": "0x01", + "EventName": "UNC_M2M_RxC_AD_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy", + "EventCode": "0x02", + "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches", + "EventCode": "0x77", + "EventName": "UNC_M2M_RxC_AD_PREF_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x5C", + "EventName": "UNC_M2M_RxC_AK_WR_CMP", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Full", + "EventCode": "0x08", + "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Not Empty", + "EventCode": "0x07", + "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Allocations", + "EventCode": "0x05", + "EventName": "UNC_M2M_RxC_BL_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Occupancy", + "EventCode": "0x06", + "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_M2M_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number AD Ingress Credits", + "EventCode": "0x41", + "EventName": "UNC_M2M_TGR_AD_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number BL Ingress Credits", + "EventCode": "0x42", + "EventName": "UNC_M2M_TGR_BL_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full : Channel 0", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full : Channel 1", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 0", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 1", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty : Channel 0", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty : Channel 1", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 0", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 1", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credit Acquired", + "EventCode": "0x0d", + "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credits Occupancy", + "EventCode": "0x0e", + "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Full", + "EventCode": "0x0c", + "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Not Empty", + "EventCode": "0x0b", + "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Allocations", + "EventCode": "0x09", + "EventName": "UNC_M2M_TxC_AD_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", + "EventCode": "0x0f", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", + "EventCode": "0x10", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Occupancy", + "EventCode": "0x0A", + "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK : CRD Transa= ctions to Cbo", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.CRD_CBO", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK : NDR Transa= ctions", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.NDR", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AKC Credits", + "EventCode": "0x5F", + "EventName": "UNC_M2M_TxC_AKC_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : All", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Near Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Far Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", + "PerPkg": "1", + "UMask": "0x88", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : All", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : All", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : All", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Near Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Far Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Cache", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Core", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CORE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : All", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Near Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Far Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : All", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : All", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xB3", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xB3", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 0", + "EventCode": "0x58", + "EventName": "UNC_M2M_WPQ_FLUSH.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 1", + "EventCode": "0x58", + "EventName": "UNC_M2M_WPQ_FLUSH.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 0", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 2", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 0", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 1", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 2", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Channel 0", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Channel 1", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Mirror", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 0", + "EventCode": "0x56", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 1", + "EventCode": "0x56", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 0", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 1", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Mirror", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0", + "EventCode": "0x63", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1", + "EventCode": "0x63", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 0", + "EventCode": "0x62", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 1", + "EventCode": "0x62", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Channel 0", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Channel 1", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Mirror", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_NONTGR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_PWR", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 0", + "EventCode": "0x5E", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 1", + "EventCode": "0x5E", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 0", + "EventCode": "0x5D", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 1", + "EventCode": "0x5D", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", + "EventCode": "0xff", + "EventName": "UNC_U_CLOCKTICKS", + "PerPkg": "1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : Doorbell", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : Interrupt", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.INT_PRIO", + "PerPkg": "1", + "PublicDescription": "Message Received : Interrupt : Interrupts", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : IPI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : IPI : Inter Processor Int= errupts", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : MSI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : MSI : Message Signaled In= terrupts - interrupts sent by devices (including PCIe via IOxAPIC) (Socket = Mode only)", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : VLW", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : VLW : Virtual Logical Wir= e (legacy) message were received from Uncore.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "IDI Lock/SplitLock Cycles", + "EventCode": "0x44", + "EventName": "UNC_U_LOCK_CYCLES", + "PerPkg": "1", + "PublicDescription": "IDI Lock/SplitLock Cycles : Number of times = an IDI Lock/SplitLock sequence was started", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", + "EventCode": "0x4F", + "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", + "EventCode": "0x4F", + "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "Cycles PHOLD Assert to Ack : Assert to ACK := PHOLD cycles.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDRAND", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDSEED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", + "PerPkg": "1", + "PublicDescription": "RACU Request : Number outstanding register r= equests within message channel tracker", + "Unit": "UBOX" + } +] diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-io.json b/too= ls/perf/pmu-events/arch/x86/snowridgex/uncore-io.json new file mode 100644 index 000000000000..996028071ee4 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-io.json @@ -0,0 +1,8944 @@ +[ + { + "BriefDescription": "PCI Express bandwidth reading at IIO. Derived= from unc_iio_data_req_of_cpu.mem_read.part0", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_READ", + "FCMask": "0x07", + "Filter": "ch_mask=3D0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DA= TA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC= _IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "MetricName": "LLC_MISSES.PCIE_READ", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", + "ScaleUnit": "4Bytes", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO. Derived= from unc_iio_data_req_of_cpu.mem_write.part0", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_WRITE", + "FCMask": "0x07", + "Filter": "ch_mask=3D0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_D= ATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "MetricName": "LLC_MISSES.PCIE_WRITE", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", + "ScaleUnit": "4Bytes", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", + "UMask": "0x20", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", + "UMask": "0x21", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", + "UMask": "0x22", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", + "UMask": "0x23", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", + "UMask": "0x24", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", + "UMask": "0x25", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", + "UMask": "0x26", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", + "UMask": "0x27", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Clockticks of the integrated IO (IIO) traffic= controller", + "EventCode": "0x01", + "EventName": "UNC_IIO_CLOCKTICKS", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Free running counter that increments for IIO = clocktick", + "EventCode": "0xff", + "EventName": "UNC_IIO_CLOCKTICKS_FREERUN", + "PerPkg": "1", + "PublicDescription": "Free running counter that increments for int= egrated IO (IIO) traffic controller clockticks", + "UMask": "0x10", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts : All Ports", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0xff", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0-7", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 1", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 2", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 3", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 4", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 4", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 5", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 5", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 6", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 6", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 7", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", + "UMask": "0xff", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", + "UMask": "0xff", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 1", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 1 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 2", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 2 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 3", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 3 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 4", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 4 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 5", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 5 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 6", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 6 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 7", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 7 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1= , Or x4 card is plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5= , Or x4 card is plugged in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, = Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, = Or x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x= 4 card is plugged in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x= 4 card is plugged in to slot 4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 7", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card p= lugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plu= gged in to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card p= lugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plu= gged in to slot 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plu= gged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugg= ed in to slot 2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plu= gged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugg= ed in to slot 6", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1,= Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5,= Or x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 c= ard is plugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 car= d is plugged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged= in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged= in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 ca= rd plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is= plugged in to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 ca= rd plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is= plugged in to slot 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card= plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card= plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is p= lugged in to slot 6", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Passing data = to be written", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Passing data= to be written : How often different queues (e.g. channel / fc) ask to send= request into pipeline : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Issuing final= read or write of line", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Issuing fina= l read or write of line : How often different queues (e.g. channel / fc) as= k to send request into pipeline", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Processing re= sponse from IOMMU", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Processing r= esponse from IOMMU : How often different queues (e.g. channel / fc) ask to = send request into pipeline", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Issuing to IO= MMU", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Issuing to I= OMMU : How often different queues (e.g. channel / fc) ask to send request i= nto pipeline", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Request Owner= ship", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Request Owne= rship : How often different queues (e.g. channel / fc) ask to send request = into pipeline : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Writing line", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Writing line= : How often different queues (e.g. channel / fc) ask to send request into = pipeline : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Passi= ng data to be written", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Pass= ing data to be written : How often different queues (e.g. channel / fc) are= allowed to send request into pipeline : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Issui= ng final read or write of line", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Issu= ing final read or write of line : How often different queues (e.g. channel = / fc) are allowed to send request into pipeline", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Proce= ssing response from IOMMU", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Proc= essing response from IOMMU : How often different queues (e.g. channel / fc)= are allowed to send request into pipeline", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Issui= ng to IOMMU", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Issu= ing to IOMMU : How often different queues (e.g. channel / fc) are allowed t= o send request into pipeline", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Reque= st Ownership", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Requ= est Ownership : How often different queues (e.g. channel / fc) are allowed = to send request into pipeline : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Writi= ng line", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Writ= ing line : How often different queues (e.g. channel / fc) are allowed to se= nd request into pipeline : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 1G Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.1G_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 1G Page : Counts if a tran= saction to a 1G page, on its first lookup, hits the IOTLB.", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 2M Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.2M_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 2M Page : Counts if a tran= saction to a 2M page, on its first lookup, hits the IOTLB.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 4K Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.4K_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 4K Page : Counts if a tran= saction to a 4K page, on its first lookup, hits the IOTLB.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB lookups all", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": IOTLB lookups all : Some transactions have= to look up IOTLB multiple times. Counts every time a request looks up IOT= LB.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache hits", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", + "PerPkg": "1", + "PublicDescription": ": Context cache hits : Counts each time a fi= rst look up of the transaction hits the RCC.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache lookups", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": Context cache lookups : Counts each time a= transaction looks up root context cache.", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB lookups first", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": IOTLB lookups first : Some transactions ha= ve to look up IOTLB multiple times. Counts the first time a request looks = up IOTLB.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Fills (same as IOTLB miss)", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.MISSES", + "PerPkg": "1", + "PublicDescription": ": IOTLB Fills (same as IOTLB miss) : When a = transaction misses IOTLB, it does a page walk to look up memory and bring i= n the relevant page translation. Counts when this page translation is writt= en to IOTLB.", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Cycles PWT full", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.CYC_PWT_FULL", + "PerPkg": "1", + "PublicDescription": ": Cycles PWT full : Counts cycles the IOMMU = has reached its maximum limit for outstanding page walks.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOMMU memory access", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", + "PerPkg": "1", + "PublicDescription": ": IOMMU memory access : IOMMU sends out memo= ry fetches when it misses the cache look up which is indicated by this sign= al. M2IOSF only uses low priority channel", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 1G page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 2M page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 4K page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_4K_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 4K page : Counts each time a = transaction's first look up hits the SLPWC at the 4K level", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWT Hit to a 256T page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWT Hit to a 256T page : Counts each time = a transaction's first look up hits the SLPWC at the 512G level", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": PageWalk cache fill", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS", + "PerPkg": "1", + "PublicDescription": ": PageWalk cache fill : When a transaction m= isses SLPWC, it does a page walk to look up memory and bring in the relevan= t page translation. When this page translation is written to SLPWC, ObsPwcF= illValid_nnnH is asserted.", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": PageWalk cache lookup", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": PageWalk cache lookup : Counts each time a= transaction looks up second level page walk cache.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Interrupt Entry cache hit", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS", + "PerPkg": "1", + "PublicDescription": ": Interrupt Entry cache hit : Counts each ti= me a transaction's first look up hits the IEC.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": Interrupt Entry cache lookup", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": Interrupt Entry cache lookup : Counts the = number of transaction looks up that interrupt remapping cache.", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": Device-selective Context cache invalidation= cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DEVICE", + "PerPkg": "1", + "PublicDescription": ": Device-selective Context cache invalidatio= n cycles : Counts number of Device selective context cache invalidation eve= nts", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Domain-selective Context cache invalidation= cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DOMAIN", + "PerPkg": "1", + "PublicDescription": ": Domain-selective Context cache invalidatio= n cycles : Counts number of Domain selective context cache invalidation eve= nts", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache global invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_GBL", + "PerPkg": "1", + "PublicDescription": ": Context cache global invalidation cycles := Counts number of Context Cache global invalidation events", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Domain-selective IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_DOMAIN", + "PerPkg": "1", + "PublicDescription": ": Domain-selective IOTLB invalidation cycles= : Counts number of Domain selective invalidation events", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Global IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_GBL", + "PerPkg": "1", + "PublicDescription": ": Global IOTLB invalidation cycles : Indicat= es that IOMMU is doing global invalidation.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Page-selective IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PAGE", + "PerPkg": "1", + "PublicDescription": ": Page-selective IOTLB invalidation cycles := Counts number of Page-selective within Domain Invalidation events", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = : Asserted if all bits specified by mask match", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and PCIE bus : Asserted if all bits specified by mask match", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus)", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and !(PCIE bus) : Asserted if all bits specified by mask match", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : PCIE bus : As= serted if all bits specified by mask match", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and PCIE bus : Asserted if all bits specified by mask match", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus)", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and !(PCIE bus) : Asserted if all bits specified by mask match", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus := Asserted if any bits specified by mask match", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus : Asserted if any bits specified by mask match", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d !(PCIE bus)", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus) : Asserted if any bits specified by mask match", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : PCIE bus : Ass= erted if any bits specified by mask match", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus : Asserted if any bits specified by mask match", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and !(PCIE bus)", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus) : Asserted if any bits specified by mask match", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Counting disabled", + "EventCode": "0x80", + "EventName": "UNC_IIO_NOTHING", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Occupancy of outbound request queue : To devi= ce", + "EventCode": "0xC5", + "EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Occupancy of outbound request queue : To dev= ice : Counts number of outbound requests/completions IIO is currently proce= ssing", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Passing data to be written", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Passing data to be written : Only for post= ed requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Issuing final read or write of line", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Processing response from IOMMU", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Issuing to IOMMU", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Request Ownership", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Request Ownership : Only for posted reques= ts", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": Writing line", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Writing line : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = From IRP", + "EventCode": "0xC2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.IRP", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests sent to PCIe from main die := From IRP : Captures Posted/Non-posted allocations from IRP. i.e. either no= n-confined P2P traffic or from the CPU", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = From ITC", + "EventCode": "0xC2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.ITC", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests sent to PCIe from main die := From ITC : Confined P2P", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = Completion allocations", + "EventCode": "0xc2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.PREALLOC", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests PCIe makes of the main die : = Drop request", + "EventCode": "0x85", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU.ALL.DROP", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests PCIe makes of the main die := Drop request : Counts full PCIe requests before they're broken into a seri= es of cache-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_O= F_CPU. : Packet error detected, must be dropped", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests PCIe makes of the main die : = All", + "EventCode": "0x85", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests PCIe makes of the main die := All : Counts full PCIe requests before they're broken into a series of cac= he-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_OF_CPU.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Abort= ", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Confi= ned P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Local= P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Multi= -cast", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Memor= y", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : MsgB", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Remot= e P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Ubox", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "ITC address map 1", + "EventCode": "0x8F", + "EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Outbound cacheline requests issued : 64B requ= ests issued to device", + "EventCode": "0xD0", + "EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Outbound cacheline requests issued : 64B req= uests issued to device : Each outbound cacheline granular request may need = to make multiple passes through the pipeline. Each time a cacheline comple= tes all its passes it advances line", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Outbound TLP (transaction layer packet) reque= sts issued : To device", + "EventCode": "0xD1", + "EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Outbound TLP (transaction layer packet) requ= ests issued : To device : Each time an outbound completes all its passes it= advances the pointer", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PWT occupancy", + "EventCode": "0x42", + "EventName": "UNC_IIO_PWT_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "PWT occupancy : Indicates how many page walk= s are outstanding at any point in time.", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Passing d= ata to be written", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Passing = data to be written : Each PCIe request is broken down into a series of cach= eline granular requests and each cacheline size request may need to make mu= ltiple passes through the pipeline (e.g. for posted interrupts or multi-cas= t). Each time a cacheline completes all its passes (e.g. finishes posting= writes to all multi-cast targets) it advances line : Only for posted reque= sts", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Issuing f= inal read or write of line", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Issuing = final read or write of line : Each PCIe request is broken down into a serie= s of cacheline granular requests and each cacheline size request may need t= o make multiple passes through the pipeline (e.g. for posted interrupts or = multi-cast). Each time a cacheline completes all its passes (e.g. finishe= s posting writes to all multi-cast targets) it advances line", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Request O= wnership", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Request = Ownership : Each PCIe request is broken down into a series of cacheline gra= nular requests and each cacheline size request may need to make multiple pa= sses through the pipeline (e.g. for posted interrupts or multi-cast). Eac= h time a cacheline completes all its passes (e.g. finishes posting writes t= o all multi-cast targets) it advances line : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Writing l= ine", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Writing = line : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes all its passes (e.g. finishes posting writes to all= multi-cast targets) it advances line : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Passing data to be wr= itten", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Passing data to be w= ritten : Each PCIe request is broken down into a series of cacheline granul= ar requests and each cacheline size request may need to make multiple passe= s through the pipeline (e.g. for posted interrupts or multi-cast). Each t= ime a single PCIe request completes all its cacheline granular requests, it= advances pointer. : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Issuing final read or= write of line", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Issuing final read o= r write of line : Each PCIe request is broken down into a series of cacheli= ne granular requests and each cacheline size request may need to make multi= ple passes through the pipeline (e.g. for posted interrupts or multi-cast).= Each time a single PCIe request completes all its cacheline granular req= uests, it advances pointer.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Processing response f= rom IOMMU", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Processing response = from IOMMU : Each PCIe request is broken down into a series of cacheline gr= anular requests and each cacheline size request may need to make multiple p= asses through the pipeline (e.g. for posted interrupts or multi-cast). Ea= ch time a single PCIe request completes all its cacheline granular requests= , it advances pointer.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Issuing to IOMMU", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Issuing to IOMMU : E= ach PCIe request is broken down into a series of cacheline granular request= s and each cacheline size request may need to make multiple passes through = the pipeline (e.g. for posted interrupts or multi-cast). Each time a sing= le PCIe request completes all its cacheline granular requests, it advances = pointer.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Request Ownership", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Request Ownership : = Each PCIe request is broken down into a series of cacheline granular reques= ts and each cacheline size request may need to make multiple passes through= the pipeline (e.g. for posted interrupts or multi-cast). Each time a sin= gle PCIe request completes all its cacheline granular requests, it advances= pointer. : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Writing line", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Writing line : Each = PCIe request is broken down into a series of cacheline granular requests an= d each cacheline size request may need to make multiple passes through the = pipeline (e.g. for posted interrupts or multi-cast). Each time a single P= CIe request completes all its cacheline granular requests, it advances poin= ter. : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Passing data t= o be written", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Passing data = to be written : Each PCIe request is broken down into a series of cacheline= granular requests and each cacheline size request may need to make multipl= e passes through the pipeline (e.g. for posted interrupts or multi-cast). = Each time a cacheline completes a single pass (e.g. posts a write to singl= e multi-cast target) it advances state : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Issuing final = read or write of line", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Issuing final= read or write of line : Each PCIe request is broken down into a series of = cacheline granular requests and each cacheline size request may need to mak= e multiple passes through the pipeline (e.g. for posted interrupts or multi= -cast). Each time a cacheline completes a single pass (e.g. posts a write= to single multi-cast target) it advances state", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Request Owners= hip", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Request Owner= ship : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes a single pass (e.g. posts a write to single multi-c= ast target) it advances state : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Writing line", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Writing line = : Each PCIe request is broken down into a series of cacheline granular requ= ests and each cacheline size request may need to make multiple passes throu= gh the pipeline (e.g. for posted interrupts or multi-cast). Each time a c= acheline completes a single pass (e.g. posts a write to single multi-cast t= arget) it advances state : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Symbol Times on Link", + "EventCode": "0x82", + "EventName": "UNC_IIO_SYMBOL_TIMES", + "PerPkg": "1", + "PublicDescription": "Symbol Times on Link : Gen1 - increment once= every 4nS, Gen2 - increment once every 2nS, Gen3 - increment once every 1n= S", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is= plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is= plugged in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugg= ed in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugg= ed in to slot 4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 7", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to La= ne 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot= 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to La= ne 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot= 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane= 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane= 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card= is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card= is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lan= e 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot = 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lan= e 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot = 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plug= ged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plug= ged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugge= d in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugge= d in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 0= /1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 2/= 3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 4= /5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged in to slot= 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 6/= 7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged = in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in= to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged = in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in= to slot 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in t= o slot 2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in= to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in t= o slot 6", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x80", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x80", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x80", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x80", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x80", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x80", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x80", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x80", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x81", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x81", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x81", + "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x82", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x82", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x82", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x82", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x82", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x82", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x82", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x82", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x83", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x83", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x83", + "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x88", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x88", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x88", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x88", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x88", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x88", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", + "EventCode": "0x88", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", + "EventCode": "0x88", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x89", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x89", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x89", + "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8b", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8b", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8b", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x85", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x85", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x85", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x87", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x87", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x87", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x8d", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x8d", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x8d", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Clockticks of the mesh to PCI (M2P)", + "EventCode": "0x01", + "EventName": "UNC_M2P_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2P_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xba", + "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xba", + "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xb9", + "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xb9", + "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCS message class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credit fo= r transfer through CMS Port 0s to the IIO for the NCS message class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the DRS message class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCB message class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCS message class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCS me= ssage class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credit for transfer through CMS Port 0s to the IIO for the NCS me= ssage class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCB", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCS", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCB", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCS", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCB", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCS", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCB", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCS", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent0", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent1", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent2", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent0", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent1", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent2", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent3", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent4", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent5", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCB", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCS", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCB", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCS", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCB", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCS", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCB", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCS", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xe6", + "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xe6", + "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : All", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Local NCB", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Local NCS", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Remote NCB", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Remote NCS", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : All", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Local NCB", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Local NCS", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Remote NCB", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Remote NCS", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : All", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Local NCB", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Local NCS", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Remote NCB", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Remote NCS", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent0", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent1", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent2", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent0", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent1", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent2", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_M2P_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.ALL", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_M2P_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ", + "EventCode": "0x2d", + "EventName": "UNC_M2P_TxC_CREDITS.PRQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9e", + "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9e", + "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xb3", + "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xb3", + "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json b/= tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json deleted file mode 100644 index 8bd041bc0c57..000000000000 --- a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json +++ /dev/null @@ -1,22056 +0,0 @@ -[ - { - "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.= ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.MMIO_READ", - "Filter": "config1=3D0x40040e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts= .ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.MMIO_WRITE", - "Filter": "config1=3D0x40041e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO. Derived= from unc_iio_data_req_of_cpu.mem_read.part0", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_READ", - "FCMask": "0x07", - "Filter": "ch_mask=3D0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DA= TA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC= _IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "MetricName": "LLC_MISSES.PCIE_READ", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", - "ScaleUnit": "4Bytes", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO. Derived= from unc_iio_data_req_of_cpu.mem_write.part0", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_WRITE", - "FCMask": "0x07", - "Filter": "ch_mask=3D0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_D= ATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "MetricName": "LLC_MISSES.PCIE_WRITE", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", - "ScaleUnit": "4Bytes", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . D= erived from unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.UNCACHEABLE", - "Filter": "config1=3D0x40e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "Streaming stores (full cache line). Derived f= rom unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_REFERENCES.STREAMING_FULL", - "Filter": "config1=3D0x41833", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "ScaleUnit": "64Bytes", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "Streaming stores (partial cache line). Derive= d from unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_REFERENCES.STREAMING_PARTIAL", - "Filter": "config1=3D0x41a33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "ScaleUnit": "64Bytes", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x81", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x81", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x81", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x83", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x83", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x83", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x89", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x89", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x89", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8B", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8B", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8B", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x85", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x85", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x85", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x87", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x87", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x87", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken= ", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Intermediate bypass Take= n : Counts the number of times when the CHA was able to bypass HA pipe on t= he way to iMC. This is a latency optimization for situations when there is= light loadings on the memory subsystem. This can be filtered by when the = bypass was taken and when it was not. : Filter for transactions that succee= ded in taking the intermediate bypass.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Not Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Not Taken : Counts the n= umber of times when the CHA was able to bypass HA pipe on the way to iMC. = This is a latency optimization for situations when there is light loadings = on the memory subsystem. This can be filtered by when the bypass was taken= and when it was not. : Filter for transactions that could not take the byp= ass, and issues a read to memory. Note that transactions that did not take = the bypass but did not issue read to memory will not be counted.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Taken : Counts the numbe= r of times when the CHA was able to bypass HA pipe on the way to iMC. This= is a latency optimization for situations when there is light loadings on t= he memory subsystem. This can be filtered by when the bypass was taken and= when it was not. : Filter for transactions that succeeded in taking the fu= ll bypass.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Uncore cache clock ticks", - "EventName": "UNC_CHA_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_CHA_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Any Cycle with Mul= tiple Snoops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Mu= ltiple Snoops : Counts the number of transactions that trigger a configurab= le number of cross snoops. Cores are snooped if the transaction looks up t= he cache and determines that it is necessary based on the operation type an= d what CoreValid bits are set. For example, if 2 CV bits are set on a data= read, the cores must have the data in S state so it is not necessary to sn= oop them. However, if only 1 CV bit is set the core my have modified the d= ata. If the transaction was an RFO, it would need to invalidate the lines.= This event can be filtered based on who triggered the initial snoop(s).", - "UMask": "0xf2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop = : Counts the number of transactions that trigger a configurable number of c= ross snoops. Cores are snooped if the transaction looks up the cache and d= etermines that it is necessary based on the operation type and what CoreVal= id bits are set. For example, if 2 CV bits are set on a data read, the cor= es must have the data in S state so it is not necessary to snoop them. How= ever, if only 1 CV bit is set the core my have modified the data. If the t= ransaction was an RFO, it would need to invalidate the lines. This event c= an be filtered based on who triggered the initial snoop(s).", - "UMask": "0xf1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple Core Requ= ests", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple Core Req= uests : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single Core Reques= ts", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single Core Reque= sts : Counts the number of transactions that trigger a configurable number = of cross snoops. Cores are snooped if the transaction looks up the cache a= nd determines that it is necessary based on the operation type and what Cor= eValid bits are set. For example, if 2 CV bits are set on a data read, the= cores must have the data in S state so it is not necessary to snoop them. = However, if only 1 CV bit is set the core my have modified the data. If t= he transaction was an RFO, it would need to invalidate the lines. This eve= nt can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple Eviction= : Counts the number of transactions that trigger a configurable number of = cross snoops. Cores are snooped if the transaction looks up the cache and = determines that it is necessary based on the operation type and what CoreVa= lid bits are set. For example, if 2 CV bits are set on a data read, the co= res must have the data in S state so it is not necessary to snoop them. Ho= wever, if only 1 CV bit is set the core my have modified the data. If the = transaction was an RFO, it would need to invalidate the lines. This event = can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single Eviction := Counts the number of transactions that trigger a configurable number of cr= oss snoops. Cores are snooped if the transaction looks up the cache and de= termines that it is necessary based on the operation type and what CoreVali= d bits are set. For example, if 2 CV bits are set on a data read, the core= s must have the data in S state so it is not necessary to snoop them. Howe= ver, if only 1 CV bit is set the core my have modified the data. If the tr= ansaction was an RFO, it would need to invalidate the lines. This event ca= n be filtered based on who triggered the initial snoop(s).", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple External = Snoops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple External= Snoops : Counts the number of transactions that trigger a configurable num= ber of cross snoops. Cores are snooped if the transaction looks up the cac= he and determines that it is necessary based on the operation type and what= CoreValid bits are set. For example, if 2 CV bits are set on a data read,= the cores must have the data in S state so it is not necessary to snoop th= em. However, if only 1 CV bit is set the core my have modified the data. = If the transaction was an RFO, it would need to invalidate the lines. This= event can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single External Sn= oops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single External S= noops : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Counter 0 Occupancy", - "EventCode": "0x1F", - "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Counter 0 Occupancy : Since occupancy counts= can only be captured in the Cbo's 0 counter, this event allows a user to c= apture occupancy related information by filtering the Cb0 occupancy count c= aptured in Counter 0. The filtering available is found in the control reg= ister - threshold, invert and edge detect. E.g. setting threshold to 1 ca= n effectively monitor how many cycles the monitored queue has an entry.", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.GO", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.NOP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.PULL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xBA", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xBA", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xB9", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xB9", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "HA to iMC Reads Issued : ISOCH", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", - "PerPkg": "1", - "PublicDescription": "HA to iMC Reads Issued : ISOCH : Count of th= e number of reads issued to any of the memory controller channels. This ca= n be filtered by the priority of the reads.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : Full Lin= e Non-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to any of the memory controller channels.= ", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Fu= ll Line", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH F= ull Line : Counts the total number of full line writes issued from the HA i= nto the memory controller.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : Partial = Non-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : Partial= Non-ISOCH : Counts the total number of full line writes issued from the HA= into the memory controller.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Pa= rtial", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH P= artial : Counts the total number of full line writes issued from the HA int= o the memory controller.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", - "UMask": "0x1fffff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : All Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ANY_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : All Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Any local or remote transaction to the LLC, includi= ng prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE", - "PerPkg": "1", - "UMask": "0x1bd0ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Code Reads", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Code Reads : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1bd0ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : CRd Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : CRd Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote CRd transactions to the LLC. This = includes CRd prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Code Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Code Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", - "UMask": "0x1bd001", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Local request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Local request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Any local transaction to the LLC, including prefe= tches from the Core", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", - "PerPkg": "1", - "UMask": "0x1bc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", - "UMask": "0x1bc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL", - "PerPkg": "1", - "UMask": "0x1fc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Data Read Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Data Read Request Filter : C= ounts the number of times the LLC was accessed - this includes code, data, = prefetches and hints coming from L2. This has numerous filters available. = Note the non-standard filtering equation. This event will count requests = that lookup the cache multiple times with multiple increments. One must AL= WAYS select a state or states (in the umask field) to match. Otherwise, th= e event will count nothing. : Read transactions.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Data Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Data Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", - "UMask": "0x1bc101", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DMND_READ_LOCAL", - "PerPkg": "1", - "UMask": "0x841ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : E State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.E", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : E State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Exclusive State", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : F State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : F State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Forward State", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Flush or Invalidate Requests", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", - "UMask": "0x1a44ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Flush or Invalidate Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Flush or Invalidate Filter := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : I State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.I", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : I State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Miss", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Transactions homed locally Fi= lter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Transactions homed locally F= ilter : Counts the number of times the LLC was accessed - this includes cod= e, data, prefetches and hints coming from L2. This has numerous filters av= ailable. Note the non-standard filtering equation. This event will count = requests that lookup the cache multiple times with multiple increments. On= e must ALWAYS select a state or states (in the umask field) to match. Othe= rwise, the event will count nothing. : Transaction whose address resides in= the local MC.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : M State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.M", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : M State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Modified State", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : All Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : All Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1fe001", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Write Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Write Request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Writeback transactions to the LLC This includes = all write transactions -- both Cacheable and UC.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Reads", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Reads : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS select a state= or states (in the umask field) to match. Otherwise, the event will count = nothing.", - "UMask": "0x1bd9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Locally HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Locally HOMed : Counts the number of times the LLC was accessed - this= includes code, data, prefetches and hints coming from L2. This has numero= us filters available. Note the non-standard filtering equation. This even= t will count requests that lookup the cache multiple times with multiple in= crements. One must ALWAYS select a state or states (in the umask field) to= match. Otherwise, the event will count nothing.", - "UMask": "0x9d9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Remotely HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_REM_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Remotely HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", - "UMask": "0x11d9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Read Misses : Counts the num= ber of times the LLC was accessed - this includes code, data, prefetches an= d hints coming from L2. This has numerous filters available. Note the non= -standard filtering equation. This event will count requests that lookup t= he cache multiple times with multiple increments. One must ALWAYS select a= state or states (in the umask field) to match. Otherwise, the event will = count nothing.", - "UMask": "0x1bd901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally HOMed Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally HOMed Read Misses : = Counts the number of times the LLC was accessed - this includes code, data,= prefetches and hints coming from L2. This has numerous filters available.= Note the non-standard filtering equation. This event will count requests= that lookup the cache multiple times with multiple increments. One must A= LWAYS select a state or states (in the umask field) to match. Otherwise, t= he event will count nothing.", - "UMask": "0xbd901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely HOMed Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_REM_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely HOMed Read Misses := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", - "UMask": "0x13d901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely requested Read or Sn= oop Misses that are Remotely HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_OR_SNOOP_REMOTE_MISS_REM_HOM= ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely requested Read or S= noop Misses that are Remotely HOMed : Counts the number of times the LLC wa= s accessed - this includes code, data, prefetches and hints coming from L2.= This has numerous filters available. Note the non-standard filtering equ= ation. This event will count requests that lookup the cache multiple times= with multiple increments. One must ALWAYS select a state or states (in th= e umask field) to match. Otherwise, the event will count nothing.", - "UMask": "0x161901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely Requested Reads that= are Locally HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_REMOTE_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely Requested Reads tha= t are Locally HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", - "UMask": "0xa19ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Reads that Hit the Snoop Filt= er", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_SF_HIT", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Reads that Hit the Snoop Fil= ter : Counts the number of times the LLC was accessed - this includes code,= data, prefetches and hints coming from L2. This has numerous filters avai= lable. Note the non-standard filtering equation. This event will count re= quests that lookup the cache multiple times with multiple increments. One = must ALWAYS select a state or states (in the umask field) to match. Otherw= ise, the event will count nothing.", - "UMask": "0x1bd90e", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Requests", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", - "UMask": "0x1bc8ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote RFO transactions to the LLC. This = includes RFO prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1bc801", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.RFO_LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_PREF_LOCAL", - "PerPkg": "1", - "UMask": "0x888ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : S State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.S", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : S State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Shared State", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - E State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_E", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - E State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Exclusive State", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - H State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_H", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - H State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit HitMe State", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - S State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_S", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - S State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Shared State", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Filters Requests for those th= at write info into the cache", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Write Requests : Counts the = number of times the LLC was accessed - this includes code, data, prefetches= and hints coming from L2. This has numerous filters available. Note the = non-standard filtering equation. This event will count requests that looku= p the cache multiple times with multiple increments. One must ALWAYS set u= mask bit 0 and select a state or states to match. Otherwise, the event wil= l count nothing. : Writeback transactions from L2 to the LLC This includes= all write transactions -- both Cacheable and UC.", - "UMask": "0x1a42ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL", - "PerPkg": "1", - "UMask": "0x842ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : All Lines Victimized", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.ALL", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : All Lines Victimized : Co= unts the number of lines that were victimized on a fill. This can be filte= red by the state that the line was in.", - "UMask": "0xf", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in E state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in E state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - All Lines", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - All Lines : Count= s the number of lines that were victimized on a fill. This can be filtered= by the state that the line was in.", - "UMask": "0x200f", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in E State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in E State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2002", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in M State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in M State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2001", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local Only", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local Only : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in S State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2004", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in M state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in M state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in S State : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : CV0 Prefetch Miss", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : CV0 Prefetch Miss : Miscellaneous= events in the Cbo.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : CV0 Prefetch Victim", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : CV0 Prefetch Victim : Miscellaneo= us events in the Cbo.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Number of times that an RFO hit in S state.", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RFO_HIT_S", - "PerPkg": "1", - "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : Silent Snoop Eviction", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : Silent Snoop Eviction : Miscellan= eous events in the Cbo. : Counts the number of times when a Snoop hit in FS= E states and triggered a silent eviction. This is useful because this info= rmation is lost in the PRE encodings.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : Write Combining Aliasing", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.WC_ALIASING", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : Write Combining Aliasing : Miscel= laneous events in the Cbo. : Counts the number of times that a USWC write (= WCIL(F)) transaction hit in the LLC in M state, triggering a WBMtoI followe= d by the USWC write. This occurs when there is WC aliasing.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xE6", - "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xE6", - "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ADEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.AKEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ALLRSFWAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.BLEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.FSF_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLOWSNP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLWAYRSV", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_PAMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_WAYMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.HACREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IDX_INPIPE", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IPQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IRQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ISMQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IVEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.LLC_WAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.NOTALLOWSNOOP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ONE_FSF_VIC", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ONE_RSP_CON", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.PTL_INPIPE", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.RMW_SETMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.RRQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.SETMATCHENTRYWSCT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.SF_WAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.TOPA_MATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.TORID_MATCH_GO_P", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_REQ", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_RSP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCB", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCS", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_RSP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_WB", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.WAY_MATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC0", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC0 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC1", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC10", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC10", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC10 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 10 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC11", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC11", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC11 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 11 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC12", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC12", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC12 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 12 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC13", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC13", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC13 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 13 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC2", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC2 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC3", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC3 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC4", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC4 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC5", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC5 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC6", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC6", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC6 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 6 only.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC7", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC7", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC7 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 7 only.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC8", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC8", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC8 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 8 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC9", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC9", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC9 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 9 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "Local INVITOE requests (exclusive ownership o= f a cache line without receiving data) that miss the SF/LLC and remote INVI= TOE requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "Local read requests that miss the SF/LLC and = remote read requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS", - "PerPkg": "1", - "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "Local write requests that miss the SF/LLC and= remote write requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", - "UMask": "0xc", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_CHA_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : IRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : IRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected= ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : IRQ Rejecte= d : Counts number of allocations per cycle into the specified Ingress queue= .", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IRQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA= ", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C or SF Way", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : L= LC or SF Way : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 1 : ANY0", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 1 : HA", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 1 : ANY0", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 1 : HA", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy : IRQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Occupancy : IRQ : Counts = number of entries in the specified Ingress queue in each cycle.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : AD REQ on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : AD REQ on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : AD RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : AD RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : Non UPI AK Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : Non UPI AK Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject AK ring me= ssage", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL NCB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL NCB on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL NCS on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL NCS on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for generat= ing a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL WB on VN0 : Retry= Queue Inserts of Transactions that were already in another Retry Q (sub-ev= ents encode the reason for the next reject) : No BL VN0 credit for generati= ng a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : Non UPI IV Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : Non UPI IV Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject IV ring me= ssage", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : Allow Snoop", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : Allow Snoop : Retry = Queue Inserts of Transactions that were already in another Retry Q (sub-eve= nts encode the reason for the next reject)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : ANY0", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : ANY0 : Retry Queue I= nserts of Transactions that were already in another Retry Q (sub-events enc= ode the reason for the next reject) : Any condition listed in the Other0 Re= ject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : HA", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : HA : Retry Queue Ins= erts of Transactions that were already in another Retry Q (sub-events encod= e the reason for the next reject)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : LLC OR SF Way", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : LLC OR SF Way : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Way conflict with another re= quest that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : LLC Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : LLC Victim : Retry Q= ueue Inserts of Transactions that were already in another Retry Q (sub-even= ts encode the reason for the next reject)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : PhyAddr Match", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : PhyAddr Match : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Address match with an outsta= nding request that was rejected.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : SF Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : SF Victim : Retry Qu= eue Inserts of Transactions that were already in another Retry Q (sub-event= s encode the reason for the next reject) : Requests did not generate Snoop = filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : Victim : Retry Queue= Inserts of Transactions that were already in another Retry Q (sub-events e= ncode the reason for the next reject)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the PRQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA= ", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : AD REQ on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : AD RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Re= quest", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : Non UPI AK R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL NCB on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL NCS on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL WB on VN0= : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)= : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Re= quest", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : Non UPI IV R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : Allow Snoop = : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : ANY0", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : ANY0 : REQUE= STQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : Any c= ondition listed in the WBQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : HA", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : HA : REQUEST= Q includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way= ", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : LLC OR SF Wa= y : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : LLC Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : LLC Victim := REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match= ", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : PhyAddr Matc= h : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Address match with an outstanding request that was rejected.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : SF Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : SF Victim : = REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : = Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : Victim : REQ= UESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_CHA_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.E_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores? cache.? Snoop filter capacity= evictions occur when the snoop filter is full and evicts an existing entry= to track a new entry.? Does not count clean evictions such as when a core?= s cache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.M_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores? cache.? Snoop filter capacity = evictions occur when the snoop filter is full and evicts an existing entry = to track a new entry.? Does not count clean evictions such as when a core?s= cache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.S_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores? cache.? Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry.? Does not count clean evictions such as when a core?s c= ache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : All", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : All : Counts the number of sno= ops issued by the HA.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Broadcast snoops for Local Requ= ests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Broadcast snoops for Local Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f broadcast snoops issued by the HA responding to local requests", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Directed snoops for Local Reque= sts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Directed snoops for Local Requ= ests : Counts the number of snoops issued by the HA. : Counts the number of= directed snoops issued by the HA responding to local requests", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Snoops sent for Local Requests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Snoops sent for Local Requests= : Counts the number of snoops issued by the HA. : Counts the number of bro= adcast or directed snoops issued by the HA responding to local requests", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspCnflct", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspCnflct := Number of snoop responses received for a Local request : Filters for snoo= ps responses of RspConflict to local CA requests. This is returned when a = snoop finds an existing outstanding transaction in a remote caching agent w= hen it CAMs that caching agent. This triggers conflict resolution hardware= . This covers both RspCnflct and RspCnflctWbI.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspFwd : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspFwd to local CA requests. This snoop response is only poss= ible for RdCur when a snoop HITM/E in a remote caching agent and it directl= y forwards data to a requestor without changing the requestor's cache line = state.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : Rsp*FWD*WB = : Number of snoop responses received for a Local request : Filters for a s= noop response of Rsp*Fwd*WB to local CA requests. This snoop response is o= nly used in 4s systems. It is used when a snoop HITM's in a remote caching= agent and it directly forwards data to a requestor, and simultaneously ret= urns data to the home to be written back to memory.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspI", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspI : Numb= er of snoop responses received for a Local request : Filters for snoops re= sponses of RspI to local CA requests. RspI is returned when the remote cac= he does not have the data, or when the remote cache silently evicts data (s= uch as when an RFO hits non-modified data).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspIFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspIFwd : N= umber of snoop responses received for a Local request : Filters for snoop = responses of RspIFwd to local CA requests. This is returned when a remote = caching agent forwards data and the requesting agent is able to acquire the= data in E or M states. This is commonly returned with RFO transactions. = It can be either a HitM or a HitFE.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspS", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspS : Numb= er of snoop responses received for a Local request : Filters for snoop res= ponses of RspS to local CA requests. RspS is returned when a remote cache = has data but is not forwarding it. It is a way to let the requesting socke= t know that it cannot allocate the data in E state. No data is sent with S= RspS.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspSFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspSFwd : N= umber of snoop responses received for a Local request : Filters for a snoo= p response of RspSFwd to local CA requests. This is returned when a remote= caching agent forwards data but holds on to its currently copy. This is c= ommon for data and code reads that hit in a remote socket in E or F state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : Rsp*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : Rsp*WB : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspIWB or RspSWB to local CA requests. This is returned when = a non-RFO request hits in M state. Data and Code Reads can return either R= spIWB or RspSWB depending on how the system has been configured. InvItoE t= ransactions will also return RspIWB because they must acquire ownership.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : MtoI RspIData= M", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM= ", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit LLC", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit SF", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t LLC", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t SF", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0xc001ffff", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DDR4 Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DDR4 Access : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.DDR4", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : SF/LLC Evictions", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.EVICT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts. : TOR allocation occurred as a result of SF/LLC e= victions (came from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Hits", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Hits : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xc001ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushes issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushes issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc8c7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushOpts issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushOpts issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8d7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRDs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRDs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", - "UMask": "0xc80fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; CRd Pref from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", - "UMask": "0xc88fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc837ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores : = Counts the number of entries successfully inserted into the TOR that match = qualifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "UMask": "0xc827ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es : Counts the number of entries successfully inserted into the TOR that m= atch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", - "UMask": "0xc8a7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores that= Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc001fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0xc80ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc88ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to page walks that hit the LLC : Counts the number of entries successfull= y inserted into the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc837fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores tha= t hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores th= at hit the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc827fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that hit the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0xc807fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc887fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc80ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc88ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk that missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc837fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt issued by iA Cores that= missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt issued by iA Cores tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc827fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that missed the LLC : Counts the number of entries successfully inserted= into the TOR that match qualifications specified by the subevent. Does n= ot include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc807fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc887fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that = Missed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : UCRdFs issued by iA Cores that= Missed LLC : Counts the number of entries successfully inserted into the T= OR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc877de01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that M= issed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that M= issed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Mi= ssed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WiLs issued by iA Cores that M= issed LLC : Counts the number of entries successfully inserted into the TOR= that match qualifications specified by the subevent. Does not include ad= dressless requests such as locks and interrupts.", - "UMask": "0xc87fde01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", - "UMask": "0xc807ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc887ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", - "PerPkg": "1", - "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc3fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBEFtoIs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI", - "PerPkg": "1", - "PublicDescription": "WbEFtoIs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc37ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBMtoEs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE", - "PerPkg": "1", - "PublicDescription": "WbMtoEs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xcc2fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. = Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", - "PerPkg": "1", - "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Writ= e Backs) :Counts the number of entries successfully inserted into the TOR = that match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", - "UMask": "0xcc27ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBStoIs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI", - "PerPkg": "1", - "PublicDescription": "WbStoIs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xcc67ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", - "UMask": "0xc86fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", - "UMask": "0xc867ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc001ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushes issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8c3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices th= at hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc001fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xcc43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that hit the LLC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "UMask": "0xcd43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= hit the LLC : Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc803fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xcc43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xcd43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices th= at missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that missed the LLC : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "UMask": "0xcd43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= missed the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc803fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8f3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Co= unts the number of entries successfully inserted into the TOR that match qu= alifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", - "UMask": "0xc803ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WbMtoIs issued by IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xcc23ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IRQ - iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts. : From an iA Core", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IRQ - Non iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just ISOC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ISOC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just ISOC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Local Targets", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Local Targets : Counts th= e number of entries successfully inserted into the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local iA and IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local iA and IO : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts. : All locally initiated requests", - "UMask": "0xc000ff05", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local iA : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally initiated requests from iA Cores", - "UMask": "0xc000ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local IO : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally generated IO traffic", - "UMask": "0xc000ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of= the extended umask field", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] o= f the extended umask field : Counts the number of entries successfully inse= rted into the TOR that match qualifications specified by the subevent. Do= es not include addressless requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Misses", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Misses : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : MMCFG Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : MMCFG Access : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NearMem", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NearMem : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NonCoherent", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NotNearMem", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NotNearMem : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests such = as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in = b[29:19] of the extended umask field", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in= b[29:19] of the extended umask field : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PRQ - IOSF", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. Does not include addressless requests such as lo= cks and interrupts. : From a PCIe Device", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PRQ - Non IOSF", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the nu= mber of entries successfully inserted into the TOR that match qualification= s specified by the subevent. Does not include addressless requests such a= s locks and interrupts.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DDR4 Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DDR4 Access : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : SF/LLC Evictions", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts. : TOR allocation occurred as a = result of SF/LLC evictions (came from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Hits", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc001ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc8c7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Core= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8d7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRDs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRDs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc80fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd Pref from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc88fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc837ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = : For each cycle, this event accumulates the number of valid entries in the= TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc827ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores : For each cycle, this event accumulates the number of valid entries i= n the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc88ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that hit the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", - "UMask": "0xc837fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores t= hat hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = that hit the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc827fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that hit the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xc8a7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc807fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc887fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc88ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that missed the LLC : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", - "UMask": "0xc837fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt issued by iA Cores th= at missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt issued by iA Cores t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc827fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that missed the LLC : For each cycle, this event accumulates the numbe= r of valid entries in the TOR that match qualifications specified by the su= bevent. Does not include addressless requests such as locks and interru= pts.", - "UMask": "0xc8a7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc807fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc887fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores tha= t Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores th= at Missed LLC : For each cycle, this event accumulates the number of valid = entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc877de01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that= Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that= Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that = Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that= Missed LLC : For each cycle, this event accumulates the number of valid en= tries in the TOR that match qualifications specified by the subevent. D= oes not include addressless requests such as locks and interrupts.", - "UMask": "0xc87fde01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc807ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc887ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xcc27ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc86fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc867ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Device= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8c3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices = that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that hit the LLC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "UMask": "0xcd43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at hit the LLC : For each cycle, this event accumulates the number of valid= entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xcc43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", - "UMask": "0xcd43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices = that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= that missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc001fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that missed the LLC : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xcd43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", - "UMask": "0xc8f3fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at missed the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8f3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : = For each cycle, this event accumulates the number of valid entries in the T= OR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc803ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc23ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IRQ - iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts. : From an iA Core", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IRQ - Non iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just ISOC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Local Targets", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Local Targets : For eac= h cycle, this event accumulates the number of valid entries in the TOR that= match qualifications specified by the subevent. Does not include addre= ssless requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local iA and IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local iA and IO : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts. : All locally initiated= requests", - "UMask": "0xc000ff05", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local iA : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally initiated reques= ts from iA Cores", - "UMask": "0xc000ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local IO : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally generated IO tra= ffic", - "UMask": "0xc000ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] = of the extended umask field", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19]= of the extended umask field : For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. Does not include addressless requests such as locks and int= errupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Misses", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Misses : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : MMCFG Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NearMem", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NearMem : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NonCoherent", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NonCoherent : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NotNearMem", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NOT_NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NotNearMem : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. Does not include addressl= ess requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode i= n b[29:19] of the extended umask field", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode = in b[29:19] of the extended umask field : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PRQ - IOSF", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts. : From a PCIe Device", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cy= cle, this event accumulates the number of valid entries in the TOR that mat= ch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xB3", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xB3", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI : Pushed to LLC", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", - "PerPkg": "1", - "PublicDescription": "WbPushMtoI : Pushed to LLC : Counts the numb= er of times when the CHA was received WbPushMtoI : Counts the number of tim= es when the CHA was able to push WbPushMToI to LLC", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI : Pushed to Memory", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", - "PerPkg": "1", - "PublicDescription": "WbPushMtoI : Pushed to Memory : Counts the n= umber of times when the CHA was received WbPushMtoI : Counts the number of = times when the CHA was unable to push WbPushMToI to LLC (hence pushed it to= MEM)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC0 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC10", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC10", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC10 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 10 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC11", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC11", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC11 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 11 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC12", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC12", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC12 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 12 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC13", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC13", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC13 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 13 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC2 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC3 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC4 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC5 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC6", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC6", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC6 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 6 only.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC7", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC7", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC7 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 7 only.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC8", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC8", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC8 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 8 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC9", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC9", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC9 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 9 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 0?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits= ", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 0?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 1?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits= ", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 1?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Sent (on 0?)", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.SENT0", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Sent (on 0?) : Number of XP= T prefetches sent", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Sent (on 1?)", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.SENT1", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Sent (on 1?) : Number of XP= T prefetches sent", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", - "UMask": "0x20", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", - "UMask": "0x21", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", - "UMask": "0x22", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", - "UMask": "0x23", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", - "UMask": "0x24", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", - "UMask": "0x25", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", - "UMask": "0x26", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", - "UMask": "0x27", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Clockticks of the integrated IO (IIO) traffic= controller", - "EventCode": "0x01", - "EventName": "UNC_IIO_CLOCKTICKS", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Free running counter that increments for IIO = clocktick", - "EventCode": "0xff", - "EventName": "UNC_IIO_CLOCKTICKS_FREERUN", - "PerPkg": "1", - "PublicDescription": "Free running counter that increments for int= egrated IO (IIO) traffic controller clockticks", - "UMask": "0x10", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts : All Ports", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-7", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0xff", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0-7", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 1", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 2", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 3", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 4", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 4", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 5", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 5", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 6", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 6", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 7", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 7", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", - "UMask": "0xff", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", - "UMask": "0xff", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 1", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 1 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 2", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 2 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 3", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 3 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 4", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 4 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 5", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 5 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 6", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 6 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 7", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 7 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1= , Or x4 card is plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5= , Or x4 card is plugged in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, = Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, = Or x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x= 4 card is plugged in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x= 4 card is plugged in to slot 4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 7", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card p= lugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plu= gged in to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card p= lugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plu= gged in to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plu= gged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugg= ed in to slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plu= gged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugg= ed in to slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1,= Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5,= Or x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 c= ard is plugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 car= d is plugged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged= in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged= in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 ca= rd plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is= plugged in to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 ca= rd plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is= plugged in to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card= plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card= plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is p= lugged in to slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Passing data = to be written", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Passing data= to be written : How often different queues (e.g. channel / fc) ask to send= request into pipeline : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Issuing final= read or write of line", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Issuing fina= l read or write of line : How often different queues (e.g. channel / fc) as= k to send request into pipeline", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Processing re= sponse from IOMMU", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Processing r= esponse from IOMMU : How often different queues (e.g. channel / fc) ask to = send request into pipeline", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Issuing to IO= MMU", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Issuing to I= OMMU : How often different queues (e.g. channel / fc) ask to send request i= nto pipeline", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Request Owner= ship", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Request Owne= rship : How often different queues (e.g. channel / fc) ask to send request = into pipeline : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Writing line", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Writing line= : How often different queues (e.g. channel / fc) ask to send request into = pipeline : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Passi= ng data to be written", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Pass= ing data to be written : How often different queues (e.g. channel / fc) are= allowed to send request into pipeline : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Issui= ng final read or write of line", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Issu= ing final read or write of line : How often different queues (e.g. channel = / fc) are allowed to send request into pipeline", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Proce= ssing response from IOMMU", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Proc= essing response from IOMMU : How often different queues (e.g. channel / fc)= are allowed to send request into pipeline", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Issui= ng to IOMMU", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Issu= ing to IOMMU : How often different queues (e.g. channel / fc) are allowed t= o send request into pipeline", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Reque= st Ownership", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Requ= est Ownership : How often different queues (e.g. channel / fc) are allowed = to send request into pipeline : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Writi= ng line", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Writ= ing line : How often different queues (e.g. channel / fc) are allowed to se= nd request into pipeline : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 1G Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.1G_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 1G Page : Counts if a tran= saction to a 1G page, on its first lookup, hits the IOTLB.", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 2M Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.2M_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 2M Page : Counts if a tran= saction to a 2M page, on its first lookup, hits the IOTLB.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 4K Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.4K_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 4K Page : Counts if a tran= saction to a 4K page, on its first lookup, hits the IOTLB.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB lookups all", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": IOTLB lookups all : Some transactions have= to look up IOTLB multiple times. Counts every time a request looks up IOT= LB.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache hits", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", - "PerPkg": "1", - "PublicDescription": ": Context cache hits : Counts each time a fi= rst look up of the transaction hits the RCC.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache lookups", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": Context cache lookups : Counts each time a= transaction looks up root context cache.", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB lookups first", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": IOTLB lookups first : Some transactions ha= ve to look up IOTLB multiple times. Counts the first time a request looks = up IOTLB.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Fills (same as IOTLB miss)", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.MISSES", - "PerPkg": "1", - "PublicDescription": ": IOTLB Fills (same as IOTLB miss) : When a = transaction misses IOTLB, it does a page walk to look up memory and bring i= n the relevant page translation. Counts when this page translation is writt= en to IOTLB.", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Cycles PWT full", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.CYC_PWT_FULL", - "PerPkg": "1", - "PublicDescription": ": Cycles PWT full : Counts cycles the IOMMU = has reached its maximum limit for outstanding page walks.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOMMU memory access", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", - "PerPkg": "1", - "PublicDescription": ": IOMMU memory access : IOMMU sends out memo= ry fetches when it misses the cache look up which is indicated by this sign= al. M2IOSF only uses low priority channel", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 1G page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 2M page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 4K page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_4K_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 4K page : Counts each time a = transaction's first look up hits the SLPWC at the 4K level", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWT Hit to a 256T page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", - "PerPkg": "1", - "PublicDescription": ": PWT Hit to a 256T page : Counts each time = a transaction's first look up hits the SLPWC at the 512G level", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": PageWalk cache fill", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS", - "PerPkg": "1", - "PublicDescription": ": PageWalk cache fill : When a transaction m= isses SLPWC, it does a page walk to look up memory and bring in the relevan= t page translation. When this page translation is written to SLPWC, ObsPwcF= illValid_nnnH is asserted.", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": PageWalk cache lookup", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": PageWalk cache lookup : Counts each time a= transaction looks up second level page walk cache.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Interrupt Entry cache hit", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS", - "PerPkg": "1", - "PublicDescription": ": Interrupt Entry cache hit : Counts each ti= me a transaction's first look up hits the IEC.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": Interrupt Entry cache lookup", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": Interrupt Entry cache lookup : Counts the = number of transaction looks up that interrupt remapping cache.", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": Device-selective Context cache invalidation= cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DEVICE", - "PerPkg": "1", - "PublicDescription": ": Device-selective Context cache invalidatio= n cycles : Counts number of Device selective context cache invalidation eve= nts", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Domain-selective Context cache invalidation= cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DOMAIN", - "PerPkg": "1", - "PublicDescription": ": Domain-selective Context cache invalidatio= n cycles : Counts number of Domain selective context cache invalidation eve= nts", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache global invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_GBL", - "PerPkg": "1", - "PublicDescription": ": Context cache global invalidation cycles := Counts number of Context Cache global invalidation events", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Domain-selective IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_DOMAIN", - "PerPkg": "1", - "PublicDescription": ": Domain-selective IOTLB invalidation cycles= : Counts number of Domain selective invalidation events", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Global IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_GBL", - "PerPkg": "1", - "PublicDescription": ": Global IOTLB invalidation cycles : Indicat= es that IOMMU is doing global invalidation.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Page-selective IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PAGE", - "PerPkg": "1", - "PublicDescription": ": Page-selective IOTLB invalidation cycles := Counts number of Page-selective within Domain Invalidation events", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = : Asserted if all bits specified by mask match", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and PCIE bus : Asserted if all bits specified by mask match", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus)", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and !(PCIE bus) : Asserted if all bits specified by mask match", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : PCIE bus : As= serted if all bits specified by mask match", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and PCIE bus : Asserted if all bits specified by mask match", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus)", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and !(PCIE bus) : Asserted if all bits specified by mask match", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus := Asserted if any bits specified by mask match", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus : Asserted if any bits specified by mask match", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d !(PCIE bus)", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus) : Asserted if any bits specified by mask match", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : PCIE bus : Ass= erted if any bits specified by mask match", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus : Asserted if any bits specified by mask match", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and !(PCIE bus)", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus) : Asserted if any bits specified by mask match", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Counting disabled", - "EventCode": "0x80", - "EventName": "UNC_IIO_NOTHING", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Occupancy of outbound request queue : To devi= ce", - "EventCode": "0xC5", - "EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Occupancy of outbound request queue : To dev= ice : Counts number of outbound requests/completions IIO is currently proce= ssing", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Passing data to be written", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Passing data to be written : Only for post= ed requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Issuing final read or write of line", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Processing response from IOMMU", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Issuing to IOMMU", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Request Ownership", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Request Ownership : Only for posted reques= ts", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": Writing line", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Writing line : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = From IRP", - "EventCode": "0xC2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.IRP", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests sent to PCIe from main die := From IRP : Captures Posted/Non-posted allocations from IRP. i.e. either no= n-confined P2P traffic or from the CPU", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = From ITC", - "EventCode": "0xC2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.ITC", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests sent to PCIe from main die := From ITC : Confined P2P", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = Completion allocations", - "EventCode": "0xc2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.PREALLOC", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests PCIe makes of the main die : = Drop request", - "EventCode": "0x85", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU.ALL.DROP", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests PCIe makes of the main die := Drop request : Counts full PCIe requests before they're broken into a seri= es of cache-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_O= F_CPU. : Packet error detected, must be dropped", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests PCIe makes of the main die : = All", - "EventCode": "0x85", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests PCIe makes of the main die := All : Counts full PCIe requests before they're broken into a series of cac= he-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_OF_CPU.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Abort= ", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Confi= ned P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Local= P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Multi= -cast", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Memor= y", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : MsgB", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Remot= e P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Ubox", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "ITC address map 1", - "EventCode": "0x8F", - "EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Outbound cacheline requests issued : 64B requ= ests issued to device", - "EventCode": "0xD0", - "EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Outbound cacheline requests issued : 64B req= uests issued to device : Each outbound cacheline granular request may need = to make multiple passes through the pipeline. Each time a cacheline comple= tes all its passes it advances line", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Outbound TLP (transaction layer packet) reque= sts issued : To device", - "EventCode": "0xD1", - "EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Outbound TLP (transaction layer packet) requ= ests issued : To device : Each time an outbound completes all its passes it= advances the pointer", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PWT occupancy", - "EventCode": "0x42", - "EventName": "UNC_IIO_PWT_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "PWT occupancy : Indicates how many page walk= s are outstanding at any point in time.", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Passing d= ata to be written", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Passing = data to be written : Each PCIe request is broken down into a series of cach= eline granular requests and each cacheline size request may need to make mu= ltiple passes through the pipeline (e.g. for posted interrupts or multi-cas= t). Each time a cacheline completes all its passes (e.g. finishes posting= writes to all multi-cast targets) it advances line : Only for posted reque= sts", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Issuing f= inal read or write of line", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Issuing = final read or write of line : Each PCIe request is broken down into a serie= s of cacheline granular requests and each cacheline size request may need t= o make multiple passes through the pipeline (e.g. for posted interrupts or = multi-cast). Each time a cacheline completes all its passes (e.g. finishe= s posting writes to all multi-cast targets) it advances line", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Request O= wnership", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Request = Ownership : Each PCIe request is broken down into a series of cacheline gra= nular requests and each cacheline size request may need to make multiple pa= sses through the pipeline (e.g. for posted interrupts or multi-cast). Eac= h time a cacheline completes all its passes (e.g. finishes posting writes t= o all multi-cast targets) it advances line : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Writing l= ine", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Writing = line : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes all its passes (e.g. finishes posting writes to all= multi-cast targets) it advances line : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Passing data to be wr= itten", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Passing data to be w= ritten : Each PCIe request is broken down into a series of cacheline granul= ar requests and each cacheline size request may need to make multiple passe= s through the pipeline (e.g. for posted interrupts or multi-cast). Each t= ime a single PCIe request completes all its cacheline granular requests, it= advances pointer. : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Issuing final read or= write of line", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Issuing final read o= r write of line : Each PCIe request is broken down into a series of cacheli= ne granular requests and each cacheline size request may need to make multi= ple passes through the pipeline (e.g. for posted interrupts or multi-cast).= Each time a single PCIe request completes all its cacheline granular req= uests, it advances pointer.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Processing response f= rom IOMMU", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Processing response = from IOMMU : Each PCIe request is broken down into a series of cacheline gr= anular requests and each cacheline size request may need to make multiple p= asses through the pipeline (e.g. for posted interrupts or multi-cast). Ea= ch time a single PCIe request completes all its cacheline granular requests= , it advances pointer.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Issuing to IOMMU", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Issuing to IOMMU : E= ach PCIe request is broken down into a series of cacheline granular request= s and each cacheline size request may need to make multiple passes through = the pipeline (e.g. for posted interrupts or multi-cast). Each time a sing= le PCIe request completes all its cacheline granular requests, it advances = pointer.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Request Ownership", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Request Ownership : = Each PCIe request is broken down into a series of cacheline granular reques= ts and each cacheline size request may need to make multiple passes through= the pipeline (e.g. for posted interrupts or multi-cast). Each time a sin= gle PCIe request completes all its cacheline granular requests, it advances= pointer. : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Writing line", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Writing line : Each = PCIe request is broken down into a series of cacheline granular requests an= d each cacheline size request may need to make multiple passes through the = pipeline (e.g. for posted interrupts or multi-cast). Each time a single P= CIe request completes all its cacheline granular requests, it advances poin= ter. : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Passing data t= o be written", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Passing data = to be written : Each PCIe request is broken down into a series of cacheline= granular requests and each cacheline size request may need to make multipl= e passes through the pipeline (e.g. for posted interrupts or multi-cast). = Each time a cacheline completes a single pass (e.g. posts a write to singl= e multi-cast target) it advances state : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Issuing final = read or write of line", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Issuing final= read or write of line : Each PCIe request is broken down into a series of = cacheline granular requests and each cacheline size request may need to mak= e multiple passes through the pipeline (e.g. for posted interrupts or multi= -cast). Each time a cacheline completes a single pass (e.g. posts a write= to single multi-cast target) it advances state", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Request Owners= hip", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Request Owner= ship : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes a single pass (e.g. posts a write to single multi-c= ast target) it advances state : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Writing line", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Writing line = : Each PCIe request is broken down into a series of cacheline granular requ= ests and each cacheline size request may need to make multiple passes throu= gh the pipeline (e.g. for posted interrupts or multi-cast). Each time a c= acheline completes a single pass (e.g. posts a write to single multi-cast t= arget) it advances state : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Symbol Times on Link", - "EventCode": "0x82", - "EventName": "UNC_IIO_SYMBOL_TIMES", - "PerPkg": "1", - "PublicDescription": "Symbol Times on Link : Gen1 - increment once= every 4nS, Gen2 - increment once every 2nS, Gen3 - increment once every 1n= S", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is= plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is= plugged in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugg= ed in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugg= ed in to slot 4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 7", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to La= ne 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot= 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to La= ne 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot= 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane= 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane= 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card= is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card= is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lan= e 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot = 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lan= e 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot = 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plug= ged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plug= ged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugge= d in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugge= d in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 0= /1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 2/= 3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 4= /5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged in to slot= 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 6/= 7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged = in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in= to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged = in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in= to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in t= o slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in= to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in t= o slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Total Write Cache Occupancy : Any Source", - "EventCode": "0x0F", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Total Write Cache Occupancy : Any Source : A= ccumulates the number of reads and writes that are outstanding in the uncor= e in each cycle. This is effectively the sum of the READ_OCCUPANCY and WRI= TE_OCCUPANCY events. : Tracks all requests from any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy : Snoops", - "EventCode": "0x0F", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", - "PerPkg": "1", - "PublicDescription": "Total Write Cache Occupancy : Snoops : Accum= ulates the number of reads and writes that are outstanding in the uncore in= each cycle. This is effectively the sum of the READ_OCCUPANCY and WRITE_O= CCUPANCY events.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Total IRP occupancy of inbound read and write= requests to coherent memory.", - "EventCode": "0x0f", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", - "PerPkg": "1", - "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests to coherent memory. This is effectively the sum of read occupan= cy and write occupancy.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Clockticks of the IO coherency tracker (IRP)", - "EventCode": "0x01", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops : CLFlush", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Coherent Ops : CLFlush : Counts the number o= f coherency related operations servied by the IRP", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCITOM", - "PerPkg": "1", - "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.RFO", - "PerPkg": "1", - "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops : WbMtoI", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.WBMTOI", - "PerPkg": "1", - "PublicDescription": "Coherent Ops : WbMtoI : Counts the number of= coherency related operations servied by the IRP", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF RF full", - "EventCode": "0x17", - "EventName": "UNC_I_FAF_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", - "EventCode": "0x18", - "EventName": "UNC_I_FAF_INSERTS", - "PerPkg": "1", - "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "Occupancy of the IRP FAF queue.", - "EventCode": "0x19", - "EventName": "UNC_I_FAF_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF allocation -- sent to ADQ", - "EventCode": "0x16", - "EventName": "UNC_I_FAF_TRANSACTIONS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.EVICTS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of At= omic Transactions as Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Re= ad Transactions as Secondary", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.2ND_RD_INSERT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Wr= ite Transactions as Secondary", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.2ND_WR_INSERT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.FAST_REJ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.FAST_REQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers = From Primary to Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.FAST_XFER", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints = From Primary to Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.PF_ACK_HINT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn= 't find prefetch", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Lost Forward", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Received Invalid", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Received Invalid : Sec= ondary received a transfer that did not have sufficient MESI state", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Received Valid", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Received Valid : Secon= dary received a transfer that did have sufficient MESI state", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_E", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of E Lin= e : Secondary received a transfer that did have sufficient MESI state", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_I", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of I Lin= e : Snoop took cacheline ownership before write from data was committed.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_M", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of M Lin= e : Snoop took cacheline ownership before write from data was committed.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_S", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of S Lin= e : Secondary received a transfer that did not have sufficient MESI state", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Requests", - "EventCode": "0x14", - "EventName": "UNC_I_P2P_INSERTS", - "PerPkg": "1", - "PublicDescription": "P2P Requests : P2P requests from the ITC", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Occupancy", - "EventCode": "0x15", - "EventName": "UNC_I_P2P_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "P2P Occupancy : P2P B & S Queue Occupancy", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P completions", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if local only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if local and target = matches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P Message", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P reads", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.RD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : Match if remote only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if remote and target= matches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P Writes", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.WR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", - "UMask": "0x7e", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", - "UMask": "0x74", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", - "UMask": "0x72", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", - "UMask": "0x78", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", - "UMask": "0x71", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit E or S", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_ES", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit I", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_I", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit M", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_M", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Miss", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.MISS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpCode", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPCODE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpData", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPDATA", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpInv", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPINV", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Atomic", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.ATOMIC", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Atomic : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Tracks the number of atomic transactions", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Other", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.OTHER", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Other : Counts t= he number of Inbound transactions from the IRP to the Uncore. This can be = filtered based on request type in addition to the source queue. Note the s= pecial filtering equation. We do OR-reduction on the request type. If the= SOURCE bit is set, then we also do AND qualification based on the source p= ortID. : Tracks the number of 'other' kinds of transactions.", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Writes", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Writes : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Trackes only write requests. Each write request should have a pr= efetch, so there is no need to explicitly track these requests. For writes= that are tickled and have to retry, the counter will be incremented for ea= ch retry.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Egress Allocations", - "EventCode": "0x0B", - "EventName": "UNC_I_TxC_AK_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Cycles Full", - "EventCode": "0x05", - "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Inserts", - "EventCode": "0x02", - "EventName": "UNC_I_TxC_BL_DRS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Occupancy", - "EventCode": "0x08", - "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Cycles Full", - "EventCode": "0x06", - "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Inserts", - "EventCode": "0x03", - "EventName": "UNC_I_TxC_BL_NCB_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Occupancy", - "EventCode": "0x09", - "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Cycles Full", - "EventCode": "0x07", - "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Inserts", - "EventCode": "0x04", - "EventName": "UNC_I_TxC_BL_NCS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Occupancy", - "EventCode": "0x0A", - "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", - "EventCode": "0x1C", - "EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": ": Counts the number times when it is not pos= sible to issue a request to the M2PCIe because there are no Egress Credits = available on AD0, A1 or AD0&AD1 both. Stalls on both AD0 and AD1 will count= as 2", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD0 Egress Credits Stalls", - "EventCode": "0x1A", - "EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No AD0 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD0 Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD1 Egress Credits Stalls", - "EventCode": "0x1B", - "EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No AD1 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD1 Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x1D", - "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No BL Egress Credit Stalls : Counts the numb= er times when it is not possible to issue data to the R2PCIe because there = are no BL Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0x0D", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0x0E", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0x0C", - "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Outbound Request Queue Occupancy : Accumulte= s the number of outstanding outbound requests from the IRP to the switch (t= owards the devices). This can be used in conjuection with the allocations = event in order to calculate average latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x81", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x81", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x81", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x83", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x83", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x83", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x89", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x89", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x89", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8B", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8B", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8B", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x85", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x85", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x85", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x87", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x87", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x87", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Not Taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Not Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Clockticks of the mesh to memory (M2M)", - "EventName": "UNC_M2M_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M2M_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to core mode, which bypass= es the CHA, was disabled", - "EventCode": "0x24", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", - "EventCode": "0x60", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to core trans= action was overridden", - "EventCode": "0x25", - "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xBA", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xBA", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xB9", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xB9", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ALL", - "PerPkg": "1", - "UMask": "0x704", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_ALL", - "PerPkg": "1", - "UMask": "0x104", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR", - "PerPkg": "1", - "UMask": "0x140", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_ISOCH", - "PerPkg": "1", - "UMask": "0x102", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_NORMAL", - "PerPkg": "1", - "UMask": "0x101", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_ALL", - "PerPkg": "1", - "UMask": "0x204", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR", - "PerPkg": "1", - "UMask": "0x240", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_ISOCH", - "PerPkg": "1", - "UMask": "0x202", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_NORMAL", - "PerPkg": "1", - "UMask": "0x201", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - All Chan= nels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.FROM_TGR", - "PerPkg": "1", - "UMask": "0x740", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ISOCH", - "PerPkg": "1", - "UMask": "0x702", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - A= ll Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.NORMAL", - "PerPkg": "1", - "UMask": "0x701", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - All C= hannels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.ALL", - "PerPkg": "1", - "UMask": "0x1c10", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_ALL", - "PerPkg": "1", - "UMask": "0x410", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL", - "PerPkg": "1", - "UMask": "0x401", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x404", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL", - "PerPkg": "1", - "UMask": "0x402", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x408", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_ALL", - "PerPkg": "1", - "UMask": "0x810", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL", - "PerPkg": "1", - "UMask": "0x801", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x804", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL", - "PerPkg": "1", - "UMask": "0x802", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x808", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - All Cha= nnels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL", - "PerPkg": "1", - "UMask": "0x1c01", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x1c04", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", - "PerPkg": "1", - "UMask": "0x1c02", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Al= l Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x1c08", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts", - "EventCode": "0x64", - "EventName": "UNC_M2M_MIRR_WRQ_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy", - "EventCode": "0x65", - "EventName": "UNC_M2M_MIRR_WRQ_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xE6", - "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xE6", - "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches : MC Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches : Mesh Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MESH", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS", - "EventCode": "0x73", - "EventName": "UNC_M2M_PREFCAM_CIS_DROPS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : All Channels", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : Channel 0", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : Channel 1", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : All Channels", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 0", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 1", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA0_INVAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA1_INVAL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_MISS_INVAL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_RSP_PDRESET", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA0_INVAL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA1_INVAL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_MISS_INVAL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_RSP_PDRESET", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - Ch 0", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - Ch 1", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - All Channels", - "EventCode": "0x6f", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = Ch 0", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 0", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 0", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = Ch 1", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI - Ch 1", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI- Ch 1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 2", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH2_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 2", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- All Channels", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPTUPI_ALLCH", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - All Channels", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = All Channels", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - Ch 0", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 0", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 0", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - Ch 1", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 1", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 2", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH2_XPTUPI", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - All Channels", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPTUPI_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - All Channels", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.ERRORBLK_RxC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.NOT_PF_SAD_REGION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_HIT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_SECURE_DROP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.RPQ_PROXY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.STOP_B2B", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.WPQ_PROXY", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.XPT_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.ERRORBLK_RxC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.NOT_PF_SAD_REGION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_HIT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_SECURE_DROP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.RPQ_PROXY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.STOP_B2B", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.WPQ_PROXY", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.XPT_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : All Channels", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : Channel 0", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : Channel 1", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": ": All Channels", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": ": Channel 0", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": ": Channel 1", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", - "EventCode": "0x79", - "EventName": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_INSERTS", - "EventCode": "0x78", - "EventName": "UNC_M2M_PREFCAM_RxC_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", - "EventCode": "0x77", - "EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_M2M_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 0", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 1", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 0", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Full", - "EventCode": "0x04", - "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Not Empty", - "EventCode": "0x03", - "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Allocations", - "EventCode": "0x01", - "EventName": "UNC_M2M_RxC_AD_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy", - "EventCode": "0x02", - "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches", - "EventCode": "0x77", - "EventName": "UNC_M2M_RxC_AD_PREF_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x5C", - "EventName": "UNC_M2M_RxC_AK_WR_CMP", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Full", - "EventCode": "0x08", - "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Not Empty", - "EventCode": "0x07", - "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Allocations", - "EventCode": "0x05", - "EventName": "UNC_M2M_RxC_BL_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Occupancy", - "EventCode": "0x06", - "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_M2M_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number AD Ingress Credits", - "EventCode": "0x41", - "EventName": "UNC_M2M_TGR_AD_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number BL Ingress Credits", - "EventCode": "0x42", - "EventName": "UNC_M2M_TGR_BL_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full : Channel 0", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full : Channel 1", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 0", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 1", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty : Channel 0", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty : Channel 1", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 0", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 1", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credit Acquired", - "EventCode": "0x0d", - "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credits Occupancy", - "EventCode": "0x0e", - "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Full", - "EventCode": "0x0c", - "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Not Empty", - "EventCode": "0x0b", - "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Allocations", - "EventCode": "0x09", - "EventName": "UNC_M2M_TxC_AD_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", - "EventCode": "0x0f", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", - "EventCode": "0x10", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Occupancy", - "EventCode": "0x0A", - "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK : CRD Transa= ctions to Cbo", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.CRD_CBO", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK : NDR Transa= ctions", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.NDR", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AKC Credits", - "EventCode": "0x5F", - "EventName": "UNC_M2M_TxC_AKC_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : All", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Near Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Far Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", - "PerPkg": "1", - "UMask": "0x88", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : All", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : All", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : All", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Near Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Far Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Cache", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Core", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : All", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Near Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Far Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : All", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : All", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xB3", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xB3", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "WPQ Flush : Channel 0", - "EventCode": "0x58", - "EventName": "UNC_M2M_WPQ_FLUSH.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "WPQ Flush : Channel 1", - "EventCode": "0x58", - "EventName": "UNC_M2M_WPQ_FLUSH.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 0", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 2", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 0", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 1", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 2", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Channel 0", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Channel 1", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Mirror", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.MIRR", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts : Channel 0", - "EventCode": "0x56", - "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts : Channel 1", - "EventCode": "0x56", - "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty : Channel 0", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty : Channel 1", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty : Mirror", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0", - "EventCode": "0x63", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1", - "EventCode": "0x63", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 0", - "EventCode": "0x62", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 1", - "EventCode": "0x62", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy : Channel 0", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy : Channel 1", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy : Mirror", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_NONTGR", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_PWR", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Inserts : Channel 0", - "EventCode": "0x5E", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Inserts : Channel 1", - "EventCode": "0x5E", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Occupancy : Channel 0", - "EventCode": "0x5D", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Occupancy : Channel 1", - "EventCode": "0x5D", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x81", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x81", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x81", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x82", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x82", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x82", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x82", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x82", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x82", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x82", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x82", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x83", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x83", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x83", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x89", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x89", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x89", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8a", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8a", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8a", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8a", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8a", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8a", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8a", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8a", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8b", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8b", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8b", - "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x85", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x85", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x85", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x87", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x87", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x87", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8d", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8d", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8d", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8f", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8f", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8f", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Clockticks of the mesh to PCI (M2P)", - "EventCode": "0x01", - "EventName": "UNC_M2P_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M2P_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xba", - "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xba", - "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xb9", - "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xb9", - "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCS message class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credit fo= r transfer through CMS Port 0s to the IIO for the NCS message class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the DRS message class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCB message class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCS message class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCS me= ssage class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credit for transfer through CMS Port 0s to the IIO for the NCS me= ssage class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCB", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCS", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCB", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCS", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCB", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCS", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCB", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCS", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent0", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent1", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent2", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent0", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent1", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent2", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent3", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent4", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent5", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCB", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCS", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCB", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCS", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCB", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCS", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCB", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCS", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xe6", - "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xe6", - "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : All", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Local NCB", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Local NCS", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Remote NCB", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Remote NCS", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : All", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Local NCB", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Local NCS", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Remote NCB", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Remote NCS", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : All", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Local NCB", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Local NCS", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Remote NCB", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Remote NCS", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent0", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent1", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent2", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent0", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent1", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent2", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_M2P_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.ALL", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.ALL", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_M2P_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ", - "EventCode": "0x2d", - "EventName": "UNC_M2P_TxC_CREDITS.PRQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9e", - "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9e", - "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xb3", - "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xb3", - "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", - "EventCode": "0xff", - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : Doorbell", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : Interrupt", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.INT_PRIO", - "PerPkg": "1", - "PublicDescription": "Message Received : Interrupt : Interrupts", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : IPI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : IPI : Inter Processor Int= errupts", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : MSI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : MSI : Message Signaled In= terrupts - interrupts sent by devices (including PCIe via IOxAPIC) (Socket = Mode only)", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : VLW", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : VLW : Virtual Logical Wir= e (legacy) message were received from Uncore.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "IDI Lock/SplitLock Cycles", - "EventCode": "0x44", - "EventName": "UNC_U_LOCK_CYCLES", - "PerPkg": "1", - "PublicDescription": "IDI Lock/SplitLock Cycles : Number of times = an IDI Lock/SplitLock sequence was started", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", - "EventCode": "0x4F", - "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", - "EventCode": "0x4F", - "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "Cycles PHOLD Assert to Ack : Assert to ACK := PHOLD cycles.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDRAND", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDSEED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "PublicDescription": "RACU Request : Number outstanding register r= equests within message channel tracker", - "Unit": "UBOX" - } -] --=20 2.40.0.577.gac1e443424-goog