From nobody Fri Sep 20 20:33:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E924C77B73 for ; Wed, 12 Apr 2023 13:12:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230365AbjDLNMv (ORCPT ); Wed, 12 Apr 2023 09:12:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230034AbjDLNMl (ORCPT ); Wed, 12 Apr 2023 09:12:41 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A8025BB0; Wed, 12 Apr 2023 06:12:23 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 8EAAF6603206; Wed, 12 Apr 2023 14:12:21 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1681305142; bh=smAn5Frg1iVCEDY9hhWLZkFQHXI/vQRHeCWQGlGI1Kg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YbEHpT4xzXs1x0UWIY0Q0iGu7cVfZUM6Zj1z4BKDuOIUfYBo7RertQNhFceKkm4UQ UFI3560uPc4i65fcQlEW/lebU+wg7irObZGnk1F1/veKD9c8+jKBOgZlpQRJ9cFTfb tzKBvOI5iX+tMZjdLoPkrD4S7R+02lNpbMNbHWJ7AJ4Uu5YQiHuXKwx+a6UOnTmeOz VQxZIUWTuLoLyzZF4D346FwXnreCnr+v6JYFU+9ZhVqOskfgJF07XnfrXOky7j4z+v AHAQhGNc6vAefcZj/jCsvdNwc7Maj3EqyWrBQBdykbn2xBIm7JGI+xb1/In9fTWiyv hHqYYVowdkOrQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, amergnat@baylibre.com, flora.fu@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Krzysztof Kozlowski Subject: [PATCH v3 1/6] dt-bindings: soc: mediatek: pwrap: Add compatible for MT6795 Helio X10 Date: Wed, 12 Apr 2023 15:12:11 +0200 Message-Id: <20230412131216.198313-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> References: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a compatible for the PMIC Wrapper found on the MT6795 Helio X10 SoC. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.= yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml index 3fefd634bc69..a06ac2177444 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml @@ -33,6 +33,7 @@ properties: - mediatek,mt2701-pwrap - mediatek,mt6765-pwrap - mediatek,mt6779-pwrap + - mediatek,mt6795-pwrap - mediatek,mt6797-pwrap - mediatek,mt6873-pwrap - mediatek,mt7622-pwrap --=20 2.40.0 From nobody Fri Sep 20 20:33:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2D7CC77B6E for ; Wed, 12 Apr 2023 13:12:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230376AbjDLNMy (ORCPT ); Wed, 12 Apr 2023 09:12:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35036 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230096AbjDLNMm (ORCPT ); Wed, 12 Apr 2023 09:12:42 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7774283F3; Wed, 12 Apr 2023 06:12:24 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 854076603222; Wed, 12 Apr 2023 14:12:22 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1681305143; bh=vZJYk51qZdzj0nFlADgRmZb8DWMhyUT9Ey3cnBpcs3E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=apBsf2oC9KpsVcyOzISSQE0ttARtE230FlGGPFXk487txpSFibgwc2mEBrHcVfaT8 0leKGc6O2ej8YQbaPsXdOopoltKTPYmF3yCrjGFe12JK0Vi0XnIz0QNHDV/hSdb9yC QLhpU5o9GwxIINasKI8SopVZ1Hdz9XUBy8P2C/XbmNk2OccR/7HIMacWnTP9VeBfF/ 14Z4sYp+7lm3UUrfrIM+EIcCRrPsHN6ywBU490AUYYNDNH8Ci+5l/FG4Aw/EXba5hS RpErZ6N31Sm/JKrn7p6nTXJNFqRxlzjm7Au0ez1Sq7Vj9dw+CRJZD7ufFzboWH+Cwb tlfNIHpxHQxXg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, amergnat@baylibre.com, flora.fu@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno Subject: [PATCH v3 2/6] soc: mediatek: pwrap: Move PMIC read test sequence in function Date: Wed, 12 Apr 2023 15:12:12 +0200 Message-Id: <20230412131216.198313-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> References: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The PMIC read test is performed in two places: pwrap_init_dual_io() and pwrap_init_sidly(). In preparation for adding support for PMICs requiring a companion part, move this sequence to a new function pwrap_pmic_read_test(). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat --- drivers/soc/mediatek/mtk-pmic-wrap.c | 32 +++++++++++++++++----------- 1 file changed, 20 insertions(+), 12 deletions(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mt= k-pmic-wrap.c index 15789a03e6c6..5c500be48f7c 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -1455,6 +1455,18 @@ static int pwrap_regmap_write(void *context, u32 adr= , u32 wdata) return pwrap_write(context, adr, wdata); } =20 +static bool pwrap_pmic_read_test(struct pmic_wrapper *wrp, const u32 *dew_= regs, + u16 read_test_val) +{ + bool is_success; + u32 rdata; + + pwrap_read(wrp, dew_regs[PWRAP_DEW_READ_TEST], &rdata); + is_success =3D ((rdata & U16_MAX) =3D=3D read_test_val); + + return is_success; +} + static int pwrap_reset_spislave(struct pmic_wrapper *wrp) { bool tmp; @@ -1498,18 +1510,18 @@ static int pwrap_reset_spislave(struct pmic_wrapper= *wrp) */ static int pwrap_init_sidly(struct pmic_wrapper *wrp) { - u32 rdata; u32 i; u32 pass =3D 0; + bool read_ok; signed char dly[16] =3D { -1, 0, 1, 0, 2, -1, 1, 1, 3, -1, -1, -1, 3, -1, 2, 1 }; =20 for (i =3D 0; i < 4; i++) { pwrap_writel(wrp, i, PWRAP_SIDLY); - pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST], - &rdata); - if (rdata =3D=3D PWRAP_DEW_READ_TEST_VAL) { + read_ok =3D pwrap_pmic_read_test(wrp, wrp->slave->dew_regs, + PWRAP_DEW_READ_TEST_VAL); + if (read_ok) { dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=3D%x\n", i); pass |=3D 1 << i; } @@ -1529,8 +1541,7 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp) static int pwrap_init_dual_io(struct pmic_wrapper *wrp) { int ret; - bool tmp; - u32 rdata; + bool read_ok, tmp; =20 /* Enable dual IO mode */ pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_DIO_EN], 1); @@ -1546,12 +1557,9 @@ static int pwrap_init_dual_io(struct pmic_wrapper *w= rp) pwrap_writel(wrp, 1, PWRAP_DIO_EN); =20 /* Read Test */ - pwrap_read(wrp, - wrp->slave->dew_regs[PWRAP_DEW_READ_TEST], &rdata); - if (rdata !=3D PWRAP_DEW_READ_TEST_VAL) { - dev_err(wrp->dev, - "Read failed on DIO mode: 0x%04x!=3D0x%04x\n", - PWRAP_DEW_READ_TEST_VAL, rdata); + read_ok =3D pwrap_pmic_read_test(wrp, wrp->slave->dew_regs, PWRAP_DEW_REA= D_TEST_VAL); + if (!read_ok) { + dev_err(wrp->dev, "Read failed on DIO mode.\n"); return -EFAULT; } =20 --=20 2.40.0 From nobody Fri Sep 20 20:33:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4E77C7619A for ; Wed, 12 Apr 2023 13:12:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230024AbjDLNM6 (ORCPT ); Wed, 12 Apr 2023 09:12:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230099AbjDLNMm (ORCPT ); Wed, 12 Apr 2023 09:12:42 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7308F7D93; Wed, 12 Apr 2023 06:12:25 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 70EDC6603208; Wed, 12 Apr 2023 14:12:23 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1681305144; bh=W84iqCod7r2TCo/WEoCtavk3ERz0ZI5/UapmrYR06xk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HqY7t6+oJxfkhAVqa3XkwqMUNf0cylg2BwhkbtIHM+2MAYLX2nVP4j3BVT8Y2Qkhc ezvk2vVzWaRanUlqWZ8qakLr5SooJILlELkPGVeq8Fx7p7+38Jwryz8rKjJpDaiGRm isR9A9IAZd/rGR+e1gZIF0ovRfNjR5RDMmQLYxC/K8GNA0NAA+cnukEEwycU/KdD9d 7lvxNnHN7KuiTZzLndZjmcjGxslKweXiXJZ4VCP2vJtrIq757ExA4/kLByXheN5oAU 9HD3m66KmFw0ZeaKlwm6HxHcx5WvL/aHlVaPmc0e1IpuEh9wx3RqDSeLVTtRLB26hv euRXWnfDzw5ow== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, amergnat@baylibre.com, flora.fu@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno Subject: [PATCH v3 3/6] soc: mediatek: pwrap: Add kerneldoc for struct pwrap_slv_type Date: Wed, 12 Apr 2023 15:12:13 +0200 Message-Id: <20230412131216.198313-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> References: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In preparation for adding new members with name abbreviations describe the struct pwrap_slv_type with kerneldoc to enhance human readability. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat --- drivers/soc/mediatek/mtk-pmic-wrap.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mt= k-pmic-wrap.c index 5c500be48f7c..a33a1b1820cb 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -1218,11 +1218,17 @@ struct pwrap_slv_regops { int (*pwrap_write)(struct pmic_wrapper *wrp, u32 adr, u32 wdata); }; =20 +/** + * struct pwrap_slv_type - PMIC device wrapper definitions + * @dew_regs: Device Wrapper (DeW) register offsets + * @type: PMIC Type (model) + * @regops: Register R/W ops + * @caps: Capability flags for the target device + */ struct pwrap_slv_type { const u32 *dew_regs; enum pmic_type type; const struct pwrap_slv_regops *regops; - /* Flags indicating the capability for the target slave */ u32 caps; }; =20 --=20 2.40.0 From nobody Fri Sep 20 20:33:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AACFBC77B72 for ; Wed, 12 Apr 2023 13:13:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230520AbjDLNNA (ORCPT ); Wed, 12 Apr 2023 09:13:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230153AbjDLNMn (ORCPT ); Wed, 12 Apr 2023 09:12:43 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 447CF7ED2; Wed, 12 Apr 2023 06:12:26 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 623D06603254; Wed, 12 Apr 2023 14:12:24 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1681305145; bh=wAeCus0gvy0VBSmyxSDYV3/UIGGEcqaMqVMivTGBVYY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DwGh6lDoFr/4RXdlBm/UHePy/FWZcYvN4L6ugFK4WkCRZmakkE5w1XVd3abagz9xU F49qyyUlHEWkPSVvrhsTZJ05Lo15r4QDpW6LMirsSN3krhq/dG+P1DaANiDHkiOQAQ bISOZb15AlhY7j0xi9I4TYzjo9yiC5hpX8IsNYolWsXZkVWqH6jmmdID+59EFn2qPO XgPaABBh6/cD9XOf7bcypUH294gV1J8sCeLe4+7KzQeP2N6JKgyK5z81+8Xvp2j7Lv V3ykugWoqoP1lKBwb3uoSVarfy7a5dGDyPgeRpDr3/B6Epn8XgO9zp6gg5yZ/1Wu+L tK4Vy4ZJ8EZvQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, amergnat@baylibre.com, flora.fu@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno Subject: [PATCH v3 4/6] soc: mediatek: mtk-pmic-wrap: Add support for companion PMICs Date: Wed, 12 Apr 2023 15:12:14 +0200 Message-Id: <20230412131216.198313-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> References: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some PMICs are designed to work with a companion part, which provides more regulators and/or companion devices such as LED controllers, display backlight controllers, battery charging, fuel gauge, etc: this kind of PMICs are usually present in smartphone platforms, where tight integration is required. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat --- drivers/soc/mediatek/mtk-pmic-wrap.c | 73 ++++++++++++++++++++++------ 1 file changed, 59 insertions(+), 14 deletions(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mt= k-pmic-wrap.c index a33a1b1820cb..366e40b802e4 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -47,6 +47,7 @@ =20 /* macro for device wrapper default value */ #define PWRAP_DEW_READ_TEST_VAL 0x5aa5 +#define PWRAP_DEW_COMP_READ_TEST_VAL 0xa55a #define PWRAP_DEW_WRITE_TEST_VAL 0xa55a =20 /* macro for manual command */ @@ -1222,12 +1223,16 @@ struct pwrap_slv_regops { * struct pwrap_slv_type - PMIC device wrapper definitions * @dew_regs: Device Wrapper (DeW) register offsets * @type: PMIC Type (model) + * @comp_dew_regs: Device Wrapper (DeW) register offsets for companion dev= ice + * @comp_type: Companion PMIC Type (model) * @regops: Register R/W ops * @caps: Capability flags for the target device */ struct pwrap_slv_type { const u32 *dew_regs; enum pmic_type type; + const u32 *comp_dew_regs; + enum pmic_type comp_type; const struct pwrap_slv_regops *regops; u32 caps; }; @@ -1548,9 +1553,12 @@ static int pwrap_init_dual_io(struct pmic_wrapper *w= rp) { int ret; bool read_ok, tmp; + bool comp_read_ok =3D true; =20 /* Enable dual IO mode */ pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_DIO_EN], 1); + if (wrp->slave->comp_dew_regs) + pwrap_write(wrp, wrp->slave->comp_dew_regs[PWRAP_DEW_DIO_EN], 1); =20 /* Check IDLE & INIT_DONE in advance */ ret =3D readx_poll_timeout(pwrap_is_fsm_idle_and_sync_idle, wrp, tmp, tmp, @@ -1564,8 +1572,14 @@ static int pwrap_init_dual_io(struct pmic_wrapper *w= rp) =20 /* Read Test */ read_ok =3D pwrap_pmic_read_test(wrp, wrp->slave->dew_regs, PWRAP_DEW_REA= D_TEST_VAL); - if (!read_ok) { - dev_err(wrp->dev, "Read failed on DIO mode.\n"); + if (wrp->slave->comp_dew_regs) + comp_read_ok =3D pwrap_pmic_read_test(wrp, wrp->slave->comp_dew_regs, + PWRAP_DEW_COMP_READ_TEST_VAL); + if (!read_ok || !comp_read_ok) { + dev_err(wrp->dev, "Read failed on DIO mode. Main PMIC %s%s\n", + !read_ok ? "fail" : "success", + wrp->slave->comp_dew_regs && !comp_read_ok ? + ", Companion PMIC fail" : ""); return -EFAULT; } =20 @@ -1640,19 +1654,41 @@ static bool pwrap_is_cipher_ready(struct pmic_wrapp= er *wrp) return pwrap_readl(wrp, PWRAP_CIPHER_RDY) & 1; } =20 -static bool pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp) +static bool __pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp, const u= 32 *dew_regs) { u32 rdata; int ret; =20 - ret =3D pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_RDY], - &rdata); + ret =3D pwrap_read(wrp, dew_regs[PWRAP_DEW_CIPHER_RDY], &rdata); if (ret) return false; =20 return rdata =3D=3D 1; } =20 + +static bool pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp) +{ + bool ret =3D __pwrap_is_pmic_cipher_ready(wrp, wrp->slave->dew_regs); + + if (!ret) + return ret; + + /* If there's any companion, wait for it to be ready too */ + if (wrp->slave->comp_dew_regs) + ret =3D __pwrap_is_pmic_cipher_ready(wrp, wrp->slave->comp_dew_regs); + + return ret; +} + +static void pwrap_config_cipher(struct pmic_wrapper *wrp, const u32 *dew_r= egs) +{ + pwrap_write(wrp, dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x1); + pwrap_write(wrp, dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x0); + pwrap_write(wrp, dew_regs[PWRAP_DEW_CIPHER_KEY_SEL], 0x1); + pwrap_write(wrp, dew_regs[PWRAP_DEW_CIPHER_IV_SEL], 0x2); +} + static int pwrap_init_cipher(struct pmic_wrapper *wrp) { int ret; @@ -1689,10 +1725,11 @@ static int pwrap_init_cipher(struct pmic_wrapper *w= rp) } =20 /* Config cipher mode @PMIC */ - pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x1); - pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x0); - pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_KEY_SEL], 0x1); - pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_IV_SEL], 0x2); + pwrap_config_cipher(wrp, wrp->slave->dew_regs); + + /* If there is any companion PMIC, configure cipher mode there too */ + if (wrp->slave->comp_type > 0) + pwrap_config_cipher(wrp, wrp->slave->comp_dew_regs); =20 switch (wrp->slave->type) { case PMIC_MT6397: @@ -1754,6 +1791,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp) =20 static int pwrap_init_security(struct pmic_wrapper *wrp) { + u32 crc_val; int ret; =20 /* Enable encryption */ @@ -1762,14 +1800,21 @@ static int pwrap_init_security(struct pmic_wrapper = *wrp) return ret; =20 /* Signature checking - using CRC */ - if (pwrap_write(wrp, - wrp->slave->dew_regs[PWRAP_DEW_CRC_EN], 0x1)) - return -EFAULT; + ret =3D pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_EN], 0x1); + if (ret =3D=3D 0 && wrp->slave->comp_dew_regs) + ret =3D pwrap_write(wrp, wrp->slave->comp_dew_regs[PWRAP_DEW_CRC_EN], 0x= 1); =20 pwrap_writel(wrp, 0x1, PWRAP_CRC_EN); pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE); - pwrap_writel(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_VAL], - PWRAP_SIG_ADR); + + /* CRC value */ + crc_val =3D wrp->slave->dew_regs[PWRAP_DEW_CRC_VAL]; + if (wrp->slave->comp_dew_regs) + crc_val |=3D wrp->slave->comp_dew_regs[PWRAP_DEW_CRC_VAL] << 16; + + pwrap_writel(wrp, crc_val, PWRAP_SIG_ADR); + + /* PMIC Wrapper Arbiter priority */ pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN); =20 --=20 2.40.0 From nobody Fri Sep 20 20:33:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE21DC7619A for ; Wed, 12 Apr 2023 13:13:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230046AbjDLNN2 (ORCPT ); Wed, 12 Apr 2023 09:13:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230272AbjDLNNK (ORCPT ); Wed, 12 Apr 2023 09:13:10 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D19D076B8; Wed, 12 Apr 2023 06:12:42 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4B83D660326E; Wed, 12 Apr 2023 14:12:25 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1681305146; bh=nJdVU7VlnC0bQc4i84vLOllab4PclCES7DJKViJt7vE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XnzTv6u0bpKYXhvdAO5TSi0QbpIKV66dtN0ZVEIK+7pHbzA14NTV8lpAIsQnKxg+D idU2mxsP+ZLATp7v2RYBRuDQZcNTKMg6RIt3SMQ58txjvS6jznKO0YzgBGjuAtCqHy sSBzjNlq89W5Si07Bz3GsYo4aXXxzl8DDs2wbKN5aIloNwBJHMbUxxX33rZ2Vi9Ron 1YwUALMH9AUmeKoedys+2yS2f60mPF/oTRwx/nwxaXTDBIj/kVGcL7kaeHxGbDOd84 tYl1ZyGUPHhXkEFfV40VQMH1DodYMfvV2AmxcriVg6eSDDmY3j78p3RXSEykDDAZ9A yIG0VHz/KeIiA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, amergnat@baylibre.com, flora.fu@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno Subject: [PATCH v3 5/6] soc: mediatek: mtk-pmic-wrap: Add support for MT6331 w/ MT6332 companion Date: Wed, 12 Apr 2023 15:12:15 +0200 Message-Id: <20230412131216.198313-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> References: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for the MT6331 PMIC and for its companion MT6332 PMIC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat --- drivers/soc/mediatek/mtk-pmic-wrap.c | 47 ++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mt= k-pmic-wrap.c index 366e40b802e4..ceeac43f7bd1 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -170,6 +170,40 @@ static const u32 mt6323_regs[] =3D { [PWRAP_DEW_RDDMY_NO] =3D 0x01a4, }; =20 +static const u32 mt6331_regs[] =3D { + [PWRAP_DEW_DIO_EN] =3D 0x018c, + [PWRAP_DEW_READ_TEST] =3D 0x018e, + [PWRAP_DEW_WRITE_TEST] =3D 0x0190, + [PWRAP_DEW_CRC_SWRST] =3D 0x0192, + [PWRAP_DEW_CRC_EN] =3D 0x0194, + [PWRAP_DEW_CRC_VAL] =3D 0x0196, + [PWRAP_DEW_MON_GRP_SEL] =3D 0x0198, + [PWRAP_DEW_CIPHER_KEY_SEL] =3D 0x019a, + [PWRAP_DEW_CIPHER_IV_SEL] =3D 0x019c, + [PWRAP_DEW_CIPHER_EN] =3D 0x019e, + [PWRAP_DEW_CIPHER_RDY] =3D 0x01a0, + [PWRAP_DEW_CIPHER_MODE] =3D 0x01a2, + [PWRAP_DEW_CIPHER_SWRST] =3D 0x01a4, + [PWRAP_DEW_RDDMY_NO] =3D 0x01a6, +}; + +static const u32 mt6332_regs[] =3D { + [PWRAP_DEW_DIO_EN] =3D 0x80f6, + [PWRAP_DEW_READ_TEST] =3D 0x80f8, + [PWRAP_DEW_WRITE_TEST] =3D 0x80fa, + [PWRAP_DEW_CRC_SWRST] =3D 0x80fc, + [PWRAP_DEW_CRC_EN] =3D 0x80fe, + [PWRAP_DEW_CRC_VAL] =3D 0x8100, + [PWRAP_DEW_MON_GRP_SEL] =3D 0x8102, + [PWRAP_DEW_CIPHER_KEY_SEL] =3D 0x8104, + [PWRAP_DEW_CIPHER_IV_SEL] =3D 0x8106, + [PWRAP_DEW_CIPHER_EN] =3D 0x8108, + [PWRAP_DEW_CIPHER_RDY] =3D 0x810a, + [PWRAP_DEW_CIPHER_MODE] =3D 0x810c, + [PWRAP_DEW_CIPHER_SWRST] =3D 0x810e, + [PWRAP_DEW_RDDMY_NO] =3D 0x8110, +}; + static const u32 mt6351_regs[] =3D { [PWRAP_DEW_DIO_EN] =3D 0x02F2, [PWRAP_DEW_READ_TEST] =3D 0x02F4, @@ -1182,6 +1216,8 @@ static int mt8186_regs[] =3D { =20 enum pmic_type { PMIC_MT6323, + PMIC_MT6331, + PMIC_MT6332, PMIC_MT6351, PMIC_MT6357, PMIC_MT6358, @@ -2041,6 +2077,16 @@ static const struct pwrap_slv_type pmic_mt6323 =3D { PWRAP_SLV_CAP_SECURITY, }; =20 +static const struct pwrap_slv_type pmic_mt6331 =3D { + .dew_regs =3D mt6331_regs, + .type =3D PMIC_MT6331, + .comp_dew_regs =3D mt6332_regs, + .comp_type =3D PMIC_MT6332, + .regops =3D &pwrap_regops16, + .caps =3D PWRAP_SLV_CAP_SPI | PWRAP_SLV_CAP_DUALIO | + PWRAP_SLV_CAP_SECURITY, +}; + static const struct pwrap_slv_type pmic_mt6351 =3D { .dew_regs =3D mt6351_regs, .type =3D PMIC_MT6351, @@ -2086,6 +2132,7 @@ static const struct pwrap_slv_type pmic_mt6397 =3D { =20 static const struct of_device_id of_slave_match_tbl[] =3D { { .compatible =3D "mediatek,mt6323", .data =3D &pmic_mt6323 }, + { .compatible =3D "mediatek,mt6331", .data =3D &pmic_mt6331 }, { .compatible =3D "mediatek,mt6351", .data =3D &pmic_mt6351 }, { .compatible =3D "mediatek,mt6357", .data =3D &pmic_mt6357 }, { .compatible =3D "mediatek,mt6358", .data =3D &pmic_mt6358 }, --=20 2.40.0 From nobody Fri Sep 20 20:33:04 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC62EC77B72 for ; Wed, 12 Apr 2023 13:13:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231517AbjDLNNT (ORCPT ); Wed, 12 Apr 2023 09:13:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231167AbjDLNNH (ORCPT ); Wed, 12 Apr 2023 09:13:07 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 822588A49; Wed, 12 Apr 2023 06:12:42 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 344DF6603207; Wed, 12 Apr 2023 14:12:26 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1681305146; bh=25SaIeOePgtRUx3jms6mZk5/c3Cq0kFlcKLzp/02FRA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iXVC1ZukAa32nqn47iKP51ZPZWWniDaPzJLHrVVFeKxHBUpXU4doAgdR4ujixCOHb 9byZEXUhmmU+PFj+jBH1K/My2s0xn7Iy5njx9d5XRSzQIzM7ek/MYJW51d9UQsM5Yu BaSdIPjO6pPPqFPQyXxDo5qX07GRxReDgZ3wuzx2HXAMwpryfKJjXRkhDAktylwve/ Xk5qFREmOd0gjv8KJY4lIU+J+AXUsWcLTeNsYSqQXpE1RcxY3uERzzweG/060y44gV UF783X0FzC5ycpXjkeBoYFrTn2BygjuI2X4uxb0OEtWG85YP4TgrCIGgi2kpBNZYSf UNJsxjrtfk41A== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, amergnat@baylibre.com, flora.fu@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno Subject: [PATCH v3 6/6] soc: mediatek: pwrap: Add support for MT6795 Helio X10 Date: Wed, 12 Apr 2023 15:12:16 +0200 Message-Id: <20230412131216.198313-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> References: <20230412131216.198313-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the necessary bits to support the MT6795 Helio X10 smartphone SoC: this is always paired with a MT6331 PMIC, with MT6332 companion. Signed-off-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-pmic-wrap.c | 136 ++++++++++++++++++++++++++- 1 file changed, 135 insertions(+), 1 deletion(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mt= k-pmic-wrap.c index ceeac43f7bd1..11095b8de71a 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -639,6 +639,91 @@ static int mt6779_regs[] =3D { [PWRAP_WACS2_VLDCLR] =3D 0xC28, }; =20 +static int mt6795_regs[] =3D { + [PWRAP_MUX_SEL] =3D 0x0, + [PWRAP_WRAP_EN] =3D 0x4, + [PWRAP_DIO_EN] =3D 0x8, + [PWRAP_SIDLY] =3D 0xc, + [PWRAP_RDDMY] =3D 0x10, + [PWRAP_SI_CK_CON] =3D 0x14, + [PWRAP_CSHEXT_WRITE] =3D 0x18, + [PWRAP_CSHEXT_READ] =3D 0x1c, + [PWRAP_CSLEXT_START] =3D 0x20, + [PWRAP_CSLEXT_END] =3D 0x24, + [PWRAP_STAUPD_PRD] =3D 0x28, + [PWRAP_STAUPD_GRPEN] =3D 0x2c, + [PWRAP_EINT_STA0_ADR] =3D 0x30, + [PWRAP_EINT_STA1_ADR] =3D 0x34, + [PWRAP_STAUPD_MAN_TRIG] =3D 0x40, + [PWRAP_STAUPD_STA] =3D 0x44, + [PWRAP_WRAP_STA] =3D 0x48, + [PWRAP_HARB_INIT] =3D 0x4c, + [PWRAP_HARB_HPRIO] =3D 0x50, + [PWRAP_HIPRIO_ARB_EN] =3D 0x54, + [PWRAP_HARB_STA0] =3D 0x58, + [PWRAP_HARB_STA1] =3D 0x5c, + [PWRAP_MAN_EN] =3D 0x60, + [PWRAP_MAN_CMD] =3D 0x64, + [PWRAP_MAN_RDATA] =3D 0x68, + [PWRAP_MAN_VLDCLR] =3D 0x6c, + [PWRAP_WACS0_EN] =3D 0x70, + [PWRAP_INIT_DONE0] =3D 0x74, + [PWRAP_WACS0_CMD] =3D 0x78, + [PWRAP_WACS0_RDATA] =3D 0x7c, + [PWRAP_WACS0_VLDCLR] =3D 0x80, + [PWRAP_WACS1_EN] =3D 0x84, + [PWRAP_INIT_DONE1] =3D 0x88, + [PWRAP_WACS1_CMD] =3D 0x8c, + [PWRAP_WACS1_RDATA] =3D 0x90, + [PWRAP_WACS1_VLDCLR] =3D 0x94, + [PWRAP_WACS2_EN] =3D 0x98, + [PWRAP_INIT_DONE2] =3D 0x9c, + [PWRAP_WACS2_CMD] =3D 0xa0, + [PWRAP_WACS2_RDATA] =3D 0xa4, + [PWRAP_WACS2_VLDCLR] =3D 0xa8, + [PWRAP_INT_EN] =3D 0xac, + [PWRAP_INT_FLG_RAW] =3D 0xb0, + [PWRAP_INT_FLG] =3D 0xb4, + [PWRAP_INT_CLR] =3D 0xb8, + [PWRAP_SIG_ADR] =3D 0xbc, + [PWRAP_SIG_MODE] =3D 0xc0, + [PWRAP_SIG_VALUE] =3D 0xc4, + [PWRAP_SIG_ERRVAL] =3D 0xc8, + [PWRAP_CRC_EN] =3D 0xcc, + [PWRAP_TIMER_EN] =3D 0xd0, + [PWRAP_TIMER_STA] =3D 0xd4, + [PWRAP_WDT_UNIT] =3D 0xd8, + [PWRAP_WDT_SRC_EN] =3D 0xdc, + [PWRAP_WDT_FLG] =3D 0xe0, + [PWRAP_DEBUG_INT_SEL] =3D 0xe4, + [PWRAP_DVFS_ADR0] =3D 0xe8, + [PWRAP_DVFS_WDATA0] =3D 0xec, + [PWRAP_DVFS_ADR1] =3D 0xf0, + [PWRAP_DVFS_WDATA1] =3D 0xf4, + [PWRAP_DVFS_ADR2] =3D 0xf8, + [PWRAP_DVFS_WDATA2] =3D 0xfc, + [PWRAP_DVFS_ADR3] =3D 0x100, + [PWRAP_DVFS_WDATA3] =3D 0x104, + [PWRAP_DVFS_ADR4] =3D 0x108, + [PWRAP_DVFS_WDATA4] =3D 0x10c, + [PWRAP_DVFS_ADR5] =3D 0x110, + [PWRAP_DVFS_WDATA5] =3D 0x114, + [PWRAP_DVFS_ADR6] =3D 0x118, + [PWRAP_DVFS_WDATA6] =3D 0x11c, + [PWRAP_DVFS_ADR7] =3D 0x120, + [PWRAP_DVFS_WDATA7] =3D 0x124, + [PWRAP_SPMINF_STA] =3D 0x128, + [PWRAP_CIPHER_KEY_SEL] =3D 0x12c, + [PWRAP_CIPHER_IV_SEL] =3D 0x130, + [PWRAP_CIPHER_EN] =3D 0x134, + [PWRAP_CIPHER_RDY] =3D 0x138, + [PWRAP_CIPHER_MODE] =3D 0x13c, + [PWRAP_CIPHER_SWRST] =3D 0x140, + [PWRAP_DCM_EN] =3D 0x144, + [PWRAP_DCM_DBC_PRD] =3D 0x148, + [PWRAP_EXT_CK] =3D 0x14c, +}; + static int mt6797_regs[] =3D { [PWRAP_MUX_SEL] =3D 0x0, [PWRAP_WRAP_EN] =3D 0x4, @@ -1230,6 +1315,7 @@ enum pwrap_type { PWRAP_MT2701, PWRAP_MT6765, PWRAP_MT6779, + PWRAP_MT6795, PWRAP_MT6797, PWRAP_MT6873, PWRAP_MT7622, @@ -1650,6 +1736,20 @@ static void pwrap_init_chip_select_ext(struct pmic_w= rapper *wrp, u8 hext_write, static int pwrap_common_init_reg_clock(struct pmic_wrapper *wrp) { switch (wrp->master->type) { + case PWRAP_MT6795: + if (wrp->slave->type =3D=3D PMIC_MT6331) { + const u32 *dew_regs =3D wrp->slave->dew_regs; + + pwrap_write(wrp, dew_regs[PWRAP_DEW_RDDMY_NO], 0x8); + + if (wrp->slave->comp_type =3D=3D PMIC_MT6332) { + dew_regs =3D wrp->slave->comp_dew_regs; + pwrap_write(wrp, dew_regs[PWRAP_DEW_RDDMY_NO], 0x8); + } + } + pwrap_writel(wrp, 0x88, PWRAP_RDDMY); + pwrap_init_chip_select_ext(wrp, 15, 15, 15, 15); + break; case PWRAP_MT8173: pwrap_init_chip_select_ext(wrp, 0, 4, 2, 2); break; @@ -1744,6 +1844,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp) case PWRAP_MT2701: case PWRAP_MT6765: case PWRAP_MT6779: + case PWRAP_MT6795: case PWRAP_MT6797: case PWRAP_MT8173: case PWRAP_MT8186: @@ -1914,6 +2015,19 @@ static int pwrap_mt2701_init_soc_specific(struct pmi= c_wrapper *wrp) return 0; } =20 +static int pwrap_mt6795_init_soc_specific(struct pmic_wrapper *wrp) +{ + pwrap_writel(wrp, 0xf, PWRAP_STAUPD_GRPEN); + + if (wrp->slave->type =3D=3D PMIC_MT6331) + pwrap_writel(wrp, 0x1b4, PWRAP_EINT_STA0_ADR); + + if (wrp->slave->comp_type =3D=3D PMIC_MT6332) + pwrap_writel(wrp, 0x8112, PWRAP_EINT_STA1_ADR); + + return 0; +} + static int pwrap_mt7622_init_soc_specific(struct pmic_wrapper *wrp) { pwrap_writel(wrp, 0, PWRAP_STAUPD_PRD); @@ -1949,10 +2063,16 @@ static int pwrap_init(struct pmic_wrapper *wrp) if (wrp->rstc_bridge) reset_control_reset(wrp->rstc_bridge); =20 - if (wrp->master->type =3D=3D PWRAP_MT8173) { + switch (wrp->master->type) { + case PWRAP_MT6795: + fallthrough; + case PWRAP_MT8173: /* Enable DCM */ pwrap_writel(wrp, 3, PWRAP_DCM_EN); pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD); + break; + default: + break; } =20 if (HAS_CAP(wrp->slave->caps, PWRAP_SLV_CAP_SPI)) { @@ -2185,6 +2305,19 @@ static const struct pmic_wrapper_type pwrap_mt6779 = =3D { .init_soc_specific =3D NULL, }; =20 +static const struct pmic_wrapper_type pwrap_mt6795 =3D { + .regs =3D mt6795_regs, + .type =3D PWRAP_MT6795, + .arb_en_all =3D 0x3f, + .int_en_all =3D ~(u32)(BIT(31) | BIT(2) | BIT(1)), + .int1_en_all =3D 0, + .spi_w =3D PWRAP_MAN_CMD_SPI_WRITE, + .wdt_src =3D PWRAP_WDT_SRC_MASK_NO_STAUPD, + .caps =3D PWRAP_CAP_RESET | PWRAP_CAP_DCM, + .init_reg_clock =3D pwrap_common_init_reg_clock, + .init_soc_specific =3D pwrap_mt6795_init_soc_specific, +}; + static const struct pmic_wrapper_type pwrap_mt6797 =3D { .regs =3D mt6797_regs, .type =3D PWRAP_MT6797, @@ -2318,6 +2451,7 @@ static const struct of_device_id of_pwrap_match_tbl[]= =3D { { .compatible =3D "mediatek,mt2701-pwrap", .data =3D &pwrap_mt2701 }, { .compatible =3D "mediatek,mt6765-pwrap", .data =3D &pwrap_mt6765 }, { .compatible =3D "mediatek,mt6779-pwrap", .data =3D &pwrap_mt6779 }, + { .compatible =3D "mediatek,mt6795-pwrap", .data =3D &pwrap_mt6795 }, { .compatible =3D "mediatek,mt6797-pwrap", .data =3D &pwrap_mt6797 }, { .compatible =3D "mediatek,mt6873-pwrap", .data =3D &pwrap_mt6873 }, { .compatible =3D "mediatek,mt7622-pwrap", .data =3D &pwrap_mt7622 }, --=20 2.40.0