From nobody Wed Feb 11 21:30:56 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87FA7C77B70 for ; Tue, 11 Apr 2023 12:59:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230185AbjDKM7p (ORCPT ); Tue, 11 Apr 2023 08:59:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230179AbjDKM7c (ORCPT ); Tue, 11 Apr 2023 08:59:32 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1AB1D4C2F for ; Tue, 11 Apr 2023 05:59:21 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id m8so18191394wmq.5 for ; Tue, 11 Apr 2023 05:59:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1681217960; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2RxXk1daPTunKtbomjZDgpJNAfBR2cR6YhtK/lfK/SI=; b=jkNhgbAqj8TzggObBJHle31q6oTTOf6YNouhVEYNpiAFkPPJUDhi13yN2zkBMTkbCb Jd5LL4XnPSRxsSDR69wQwpMJgD4zo34dsiqtuEAPt4NiF2NT8t/t7DCs99RsrV+B6dS6 5XiY/o/CZc+jl2jpa03WzBu9VUtl5mHZTBkr2+XDyGBBUdMDrxh8TWrj+MjV5qD6VCxA XbQaYuCghyZbRe+1pp9Zjjh2rkBoR2uj7oMsy3rtP21ly1JHx3AbPkhmLGsIinwE6795 Oozk32Misl05fmnPFUTsf3I1UAbdm/7vd8B8DNMN5DXqVFhGJ4vh6P5BmQZnX4a9AP3W h0ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1681217960; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2RxXk1daPTunKtbomjZDgpJNAfBR2cR6YhtK/lfK/SI=; b=3NYwXwQmTlUIMqPVbwwZqCmz7EvUikKfOy3qgUHodKocsPdk0dBsz8Jbumv/Ug7Dg3 CTpqz9P8AWuffXdNtVK+96yV9fVoK1l6VydtQMakvy9Z4cLT8ntKwY94bkxu7UeoIhcj iX+rQikksgsvjfxwHbCfjKaV51/4bFtVzGXK1x6PX/QpWUG1RgHtYi+7Adueinzb8kL/ 0bpOUt1+8W0XksN+F9jGSS+XsJ/2XJxcvgZm/1uHLgrMHRAeTNZzyIybtHlELT5SRFm8 4V+Zof/3qlzSQ+85sc2GBZomy1h2Ygw0EfSwfRVvOsEZ8/PbA4ckliZ/8iV+v39AsVw8 xZPA== X-Gm-Message-State: AAQBX9dX4RjlRjvpAQBJv3voI4vSes1LQu7Q58AhhDc32OgFhnDNDcqU JsXklmuQNtle+Sbz7NLef/T53g== X-Google-Smtp-Source: AKy350YjbZY7jeWKHHTUtlE+U08TBjTTL9TQeEw/gUMD0lhQNwkuZRGNiz34nBSlMwOKYeudFtovUA== X-Received: by 2002:a05:600c:4e44:b0:3ed:de03:7f0a with SMTP id e4-20020a05600c4e4400b003edde037f0amr9427917wmq.10.1681217960343; Tue, 11 Apr 2023 05:59:20 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a099:fc1d:c99a:bfc3]) by smtp.gmail.com with ESMTPSA id e24-20020a05600c219800b003eae73f0fc1sm16944591wme.18.2023.04.11.05.59.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Apr 2023 05:59:19 -0700 (PDT) From: Bartosz Golaszewski To: Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Will Deacon , Robin Murphy , Joerg Roedel , Catalin Marinas , Arnd Bergmann Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Bartosz Golaszewski Subject: [PATCH v3 5/7] arm64: dts: qcom: sa8775p: add the GPU clock controller node Date: Tue, 11 Apr 2023 14:59:08 +0200 Message-Id: <20230411125910.401075-6-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230411125910.401075-1-brgl@bgdev.pl> References: <20230411125910.401075-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Add the GPUCC node for sa8775p platforms. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qc= om/sa8775p.dtsi index a23175352a20..191b510b5a1a 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -591,6 +591,20 @@ tcsr_mutex: hwlock@1f40000 { #hwlock-cells =3D <1>; }; =20 + gpucc: clock-controller@3d90000 { + compatible =3D "qcom,sa8775p-gpucc"; + reg =3D <0x0 0x03d90000 0x0 0xa000>; + clocks =3D <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_GPU_GPLL0_CLK_SRC>, + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; + clock-names =3D "bi_tcxo", + "gcc_gpu_gpll0_clk_src", + "gcc_gpu_gpll0_div_clk_src"; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + #power-domain-cells =3D <1>; + }; + pdc: interrupt-controller@b220000 { compatible =3D "qcom,sa8775p-pdc", "qcom,pdc"; reg =3D <0x0 0x0b220000 0x0 0x30000>, --=20 2.37.2