From nobody Wed Feb 11 11:01:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 554F7C7618D for ; Thu, 6 Apr 2023 10:33:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237256AbjDFKd2 convert rfc822-to-8bit (ORCPT ); Thu, 6 Apr 2023 06:33:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229677AbjDFKdT (ORCPT ); Thu, 6 Apr 2023 06:33:19 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A623355A6; Thu, 6 Apr 2023 03:33:17 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 3D32D24E2D9; Thu, 6 Apr 2023 18:33:15 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 6 Apr 2023 18:33:15 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 6 Apr 2023 18:33:14 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Emil Renner Berthing" , William Qiu Subject: [PATCH v7 1/2] dt-bindings: soc: starfive: Add StarFive syscon doc Date: Thu, 6 Apr 2023 18:33:07 +0800 Message-ID: <20230406103308.1280860-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230406103308.1280860-1-william.qiu@starfivetech.com> References: <20230406103308.1280860-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add documentation to describe StarFive System Controller Registers. Signed-off-by: William Qiu Acked-by: Palmer Dabbelt --- .../soc/starfive/starfive,jh7110-syscon.yaml | 56 +++++++++++++++++++ MAINTAINERS | 5 ++ 2 files changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive= ,jh7110-syscon.yaml diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110= -syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh71= 10-syscon.yaml new file mode 100644 index 000000000000..0d0319426b67 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon= .yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yam= l# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7110 SoC system controller + +maintainers: + - William Qiu + +description: | + The StarFive JH7110 SoC system controller provides register information = such + as offset, mask and shift to configure related modules such as MMC and P= CIe. + +properties: + compatible: + oneOf: + - items: + - enum: + - starfive,jh7110-aon-syscon + - starfive,jh7110-sys-syscon + - const: syscon + - const: simple-mfd + - items: + - const: starfive,jh7110-stg-syscon + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + type: object + + power-controller: + type: object + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@10240000 { + compatible =3D "starfive,jh7110-stg-syscon", "syscon"; + reg =3D <0x10240000 0x1000>; + }; + + syscon@13030000 { + compatible =3D "starfive,jh7110-sys-syscon", "syscon", "simple-mfd= "; + reg =3D <0x13030000 0x1000>; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 4c0b39c44957..0b2170e1e4ff 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19911,6 +19911,11 @@ S: Supported F: Documentation/devicetree/bindings/mmc/starfive* F: drivers/mmc/host/dw_mmc-starfive.c =20 +STARFIVE JH7110 SYSCON +M: William Qiu +S: Supported +F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.y= aml + STARFIVE JH71X0 CLOCK DRIVERS M: Emil Renner Berthing M: Hal Feng --=20 2.34.1 From nobody Wed Feb 11 11:01:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6BE4C76196 for ; Thu, 6 Apr 2023 10:33:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237225AbjDFKdZ convert rfc822-to-8bit (ORCPT ); Thu, 6 Apr 2023 06:33:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33446 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236283AbjDFKdT (ORCPT ); Thu, 6 Apr 2023 06:33:19 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A638155B4; Thu, 6 Apr 2023 03:33:17 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id C88AA24E31E; Thu, 6 Apr 2023 18:33:15 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 6 Apr 2023 18:33:15 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 6 Apr 2023 18:33:15 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Emil Renner Berthing" , William Qiu Subject: [PATCH v7 2/2] riscv: dts: starfive: jh7110: Add syscon nodes Date: Thu, 6 Apr 2023 18:33:08 +0800 Message-ID: <20230406103308.1280860-3-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230406103308.1280860-1-william.qiu@starfivetech.com> References: <20230406103308.1280860-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add stg_syscon/sys_syscon/aon_syscon nodes for JH7110 Soc. Signed-off-by: William Qiu Reviewed-by: Conor Dooley Reviewed-by: Emil Renner Berthing Acked-by: Palmer Dabbelt --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts= /starfive/jh7110.dtsi index 4c5fdb905da8..f271c3184d3a 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -353,6 +353,11 @@ i2c2: i2c@10050000 { status =3D "disabled"; }; + stg_syscon: syscon@10240000 { + compatible =3D "starfive,jh7110-stg-syscon", "syscon"; + reg =3D <0x0 0x10240000 0x0 0x1000>; + }; + uart3: serial@12000000 { compatible =3D "snps,dw-apb-uart"; reg =3D <0x0 0x12000000 0x0 0x10000>; @@ -457,6 +462,11 @@ syscrg: clock-controller@13020000 { #reset-cells =3D <1>; }; + sys_syscon: syscon@13030000 { + compatible =3D "starfive,jh7110-sys-syscon", "syscon", "simple-mfd"; + reg =3D <0x0 0x13030000 0x0 0x1000>; + }; + sysgpio: pinctrl@13040000 { compatible =3D "starfive,jh7110-sys-pinctrl"; reg =3D <0x0 0x13040000 0x0 0x10000>; @@ -486,6 +496,11 @@ aoncrg: clock-controller@17000000 { #reset-cells =3D <1>; }; + aon_syscon: syscon@17010000 { + compatible =3D "starfive,jh7110-aon-syscon", "syscon", "simple-mfd"; + reg =3D <0x0 0x17010000 0x0 0x1000>; + }; + aongpio: pinctrl@17020000 { compatible =3D "starfive,jh7110-aon-pinctrl"; reg =3D <0x0 0x17020000 0x0 0x10000>; -- 2.34.1