From nobody Sun Sep 14 18:29:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8EE1C77B6C for ; Wed, 5 Apr 2023 21:54:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231783AbjDEVy0 (ORCPT ); Wed, 5 Apr 2023 17:54:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233280AbjDEVyL (ORCPT ); Wed, 5 Apr 2023 17:54:11 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F24931FD8; Wed, 5 Apr 2023 14:54:09 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 335LrpaF109538; Wed, 5 Apr 2023 16:53:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680731631; bh=Q5LsFBquJtZACrGa6bWZKXELpOcosaHfXkdq3BCsx+M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=P3udIKJaopSk5eXPD5UEPWmJd/QzLXC8rQU7N6EZCm2KBOQv7jtKcxW7+pR9/scjd BzHOje2FzgJCvziQ4ZsRRuRoQKCwKrsTO46Tn8R4sElH0aaiNlwI560NubIVKCJlqS 3U1nQB/NINQeU6a3tD6AOlr4aDsduphgbK70Pw08= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 335Lrpss031354 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 5 Apr 2023 16:53:51 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 5 Apr 2023 16:53:51 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 5 Apr 2023 16:53:50 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 335LrpOY091631; Wed, 5 Apr 2023 16:53:51 -0500 From: Bryan Brattlof To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Rob Herring , Krzysztof Kozlowski , Keerthy , Device Tree Mailing List , ARM Linux Mailing List , Linux Kernel Mailing List , Bryan Brattlof Subject: [PATCH v3 6/7] arm64: dts: ti: j7200: Add VTM node Date: Wed, 5 Apr 2023 16:53:27 -0500 Message-ID: <20230405215328.3755561-7-bb@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230405215328.3755561-1-bb@ti.com> References: <20230405215328.3755561-1-bb@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Keerthy VTM stands for Voltage Thermal Management. Add the thermal zones. Three sensors mapping to 3 thermal zones. MCU, MPU & Main domains respectively. Signed-off-by: Keerthy [bb@ti.com: rebased on v6.3-rc1] Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 ++++ arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 47 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j7200.dtsi | 2 + 3 files changed, 58 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 331b4e482e41c..e2ca7cc35119c 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -459,4 +459,13 @@ rng: rng@40910000 { status =3D "disabled"; /* Used by OP-TEE */ }; }; + + wkup_vtm0: temperature-sensor@42040000 { + compatible =3D "ti,j7200-vtm"; + reg =3D <0x00 0x42040000 0x00 0x350>, + <0x00 0x42050000 0x00 0x350>, + <0x00 0x43000300 0x00 0x10>; + power-domains =3D <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells =3D <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi b/arch/arm64/boot= /dts/ti/k3-j7200-thermal.dtsi new file mode 100644 index 0000000000000..e7e3a643a6f0c --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + mcu_thermal: mcu-thermal { + polling-delay-passive =3D <250>; /* milliseconds */ + polling-delay =3D <500>; /* milliseconds */ + thermal-sensors =3D <&wkup_vtm0 0>; + + trips { + wkup_crit: wkup-crit { + temperature =3D <125000>; /* milliCelsius */ + hysteresis =3D <2000>; /* milliCelsius */ + type =3D "critical"; + }; + }; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive =3D <250>; /* milliseconds */ + polling-delay =3D <500>; /* milliseconds */ + thermal-sensors =3D <&wkup_vtm0 1>; + + trips { + mpu_crit: mpu-crit { + temperature =3D <125000>; /* milliCelsius */ + hysteresis =3D <2000>; /* milliCelsius */ + type =3D "critical"; + }; + }; + }; + + main_thermal: main-thermal { + polling-delay-passive =3D <250>; /* milliseconds */ + polling-delay =3D <500>; /* milliseconds */ + thermal-sensors =3D <&wkup_vtm0 2>; + + trips { + c7x_crit: c7x-crit { + temperature =3D <125000>; /* milliCelsius */ + hysteresis =3D <2000>; /* milliCelsius */ + type =3D "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/= k3-j7200.dtsi index bbe380c72a7ec..47befaffad436 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -170,6 +170,8 @@ cbass_mcu_wakeup: bus@28380000 { <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data = region 3 */ }; }; + + #include "k3-j7200-thermal.dtsi" }; =20 /* Now include the peripherals for each bus segments */ --=20 2.40.0