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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Apr 2023 17:09:51.2331 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a2c157ac-bbc9-48f3-56cc-08db35f8918c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT085.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5385 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" CPU cache level data currently stores cache level, type, line size, associativity, sets, total cache size, and the CPUs sharing the cache. Also read and store the cache instance ID from "/sys/devices/system/cpu/cpuX/cache/indexY/id" in the cache level data on kernels where the file exits. If the file does not exist, id will be set to 0. Suggested-by: Arnaldo Carvalho de Melo # Error Handling Signed-off-by: K Prateek Nayak --- o v1->v2 - Handle case where the cache instance ID might not be exposed so perf can continue to work on older kernels. --- tools/perf/util/env.h | 1 + tools/perf/util/header.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/tools/perf/util/env.h b/tools/perf/util/env.h index 4566c51f2fd9..d761bfae76af 100644 --- a/tools/perf/util/env.h +++ b/tools/perf/util/env.h @@ -17,6 +17,7 @@ struct cpu_topology_map { =20 struct cpu_cache_level { u32 level; + u32 id; u32 line_size; u32 sets; u32 ways; diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c index 404d816ca124..a938738f8775 100644 --- a/tools/perf/util/header.c +++ b/tools/perf/util/header.c @@ -1131,6 +1131,9 @@ static bool cpu_cache_level__cmp(struct cpu_cache_lev= el *a, struct cpu_cache_lev if (a->level !=3D b->level) return false; =20 + if (a->id !=3D b->id) + return false; + if (a->line_size !=3D b->line_size) return false; =20 @@ -1157,6 +1160,7 @@ static int cpu_cache_level__read(struct cpu_cache_lev= el *cache, u32 cpu, u16 lev char path[PATH_MAX], file[PATH_MAX]; struct stat st; size_t len; + int ret; =20 scnprintf(path, PATH_MAX, "devices/system/cpu/cpu%d/cache/index%d/", cpu,= level); scnprintf(file, PATH_MAX, "%s/%s", sysfs__mountpoint(), path); @@ -1168,6 +1172,16 @@ static int cpu_cache_level__read(struct cpu_cache_le= vel *cache, u32 cpu, u16 lev if (sysfs__read_int(file, (int *) &cache->level)) return -1; =20 + scnprintf(file, PATH_MAX, "%s/id", path); + ret =3D sysfs__read_int(file, (int *) &cache->id); + + /* + * Set cache->id to 0 if the read fails. This enables perf to + * work on older kernels where the id may be missing. + */ + if (ret) + cache->id =3D 0; + scnprintf(file, PATH_MAX, "%s/coherency_line_size", path); if (sysfs__read_int(file, (int *) &cache->line_size)) return -1; --=20 2.34.1