From nobody Wed Feb 11 05:28:57 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B41B3C76188 for ; Wed, 5 Apr 2023 11:21:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237785AbjDELVt (ORCPT ); Wed, 5 Apr 2023 07:21:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237889AbjDELVp (ORCPT ); Wed, 5 Apr 2023 07:21:45 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 910A22736 for ; Wed, 5 Apr 2023 04:21:44 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pk1Ce-0004S4-00; Wed, 05 Apr 2023 13:21:24 +0200 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pk1Cc-0098SP-HB; Wed, 05 Apr 2023 13:21:22 +0200 Received: from jzi by dude03.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pk1Cb-005Gtp-Ab; Wed, 05 Apr 2023 13:21:21 +0200 From: Johannes Zink To: vkoul@kernel.org, kishon@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, jun.li@nxp.com, haibo.chen@nxp.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: j.zink@pengutronix.de Subject: [PATCH 1/2] dt-bindings: phy: imx8mq-usb: add phy tuning properties Date: Wed, 5 Apr 2023 13:21:17 +0200 Message-Id: <20230405112118.1256151-2-j.zink@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230405112118.1256151-1-j.zink@pengutronix.de> References: <20230405112118.1256151-1-j.zink@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: jzi@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add optional properties for tuning of usb phy. Signed-off-by: Johannes Zink --- .../bindings/phy/fsl,imx8mq-usb-phy.yaml | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml = b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml index e6f9f5540cc3..f452a41b4f32 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml @@ -35,6 +35,46 @@ properties: description: A phandle to the regulator for USB VBUS. =20 + fsl,phy-tx-vref-tune: + description: + HS DC Voltage level adjustment + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16] + + fsl,phy-tx-rise-tune: + description: + HS Transmitter Rise/Fall Time Adjustment + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + + fsl,phy-tx-preemp-amp-tune: + description: + HS Transmitter Pre-Emphasis Current Control + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + + fsl,phy-tx-vboost-level: + description: + TX Voltage Boost Level + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 2, 3] + + fsl,phy-comp-dis-tune: + description: + Disconnect Threshold Adjustment + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7] + + fsl,phy-pcs-tx-deemph-3p5db: + description: + TX De-Emphasis at 3.5 dB + $ref: /schemas/types.yaml#/definitions/uint32 + + fsl,phy-pcs-tx-swing-full: + description: + TX Amplitude + $ref: /schemas/types.yaml#/definitions/uint32 + required: - compatible - reg --=20 2.39.2 From nobody Wed Feb 11 05:28:57 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E58DC7619A for ; Wed, 5 Apr 2023 11:21:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237896AbjDELVq (ORCPT ); Wed, 5 Apr 2023 07:21:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237871AbjDELVn (ORCPT ); Wed, 5 Apr 2023 07:21:43 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C876C2D4B for ; Wed, 5 Apr 2023 04:21:40 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pk1Ce-0004S2-00; Wed, 05 Apr 2023 13:21:24 +0200 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pk1Cc-0098SJ-2v; Wed, 05 Apr 2023 13:21:22 +0200 Received: from jzi by dude03.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pk1Cb-005Gtt-BZ; Wed, 05 Apr 2023 13:21:21 +0200 From: Johannes Zink To: vkoul@kernel.org, kishon@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, jun.li@nxp.com, haibo.chen@nxp.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: j.zink@pengutronix.de Subject: [PATCH 2/2] phy: fsl-imx8mp-usb: add support for phy tuning Date: Wed, 5 Apr 2023 13:21:18 +0200 Message-Id: <20230405112118.1256151-3-j.zink@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230405112118.1256151-1-j.zink@pengutronix.de> References: <20230405112118.1256151-1-j.zink@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: jzi@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Li Jun Add USB PHY parameter tuning for USB certifications. Reviewed-by: Haibo Chen Signed-off-by: Li Jun [j.zink: ported to v6.3-rc1 from NXP downstream repo + cleanups] Signed-off-by: Johannes Zink --- drivers/phy/freescale/phy-fsl-imx8mq-usb.c | 124 +++++++++++++++++++++ 1 file changed, 124 insertions(+) diff --git a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c b/drivers/phy/frees= cale/phy-fsl-imx8mq-usb.c index a29b4a6f7c24..ee1975aaab7e 100644 --- a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c +++ b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c @@ -27,17 +27,137 @@ #define PHY_CTRL2_TXENABLEN0 BIT(8) #define PHY_CTRL2_OTG_DISABLE BIT(9) =20 +#define PHY_CTRL3 0xc +#define PHY_CTRL3_COMPDISTUNE_MASK GENMASK(2, 0) +#define PHY_CTRL3_TXPREEMP_TUNE_MASK GENMASK(16, 15) +#define PHY_CTRL3_TXRISE_TUNE_MASK GENMASK(21, 20) +#define PHY_CTRL3_TXVREF_TUNE_MASK GENMASK(25, 22) +#define PHY_CTRL3_TX_VBOOST_LEVEL_MASK GENMASK(31, 29) + +#define PHY_CTRL4 0x10 +#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK GENMASK(20, 15) + +#define PHY_CTRL5 0x14 +#define PHY_CTRL5_DMPWD_OVERRIDE_SEL BIT(23) +#define PHY_CTRL5_DMPWD_OVERRIDE BIT(22) +#define PHY_CTRL5_DPPWD_OVERRIDE_SEL BIT(21) +#define PHY_CTRL5_DPPWD_OVERRIDE BIT(20) +#define PHY_CTRL5_PCS_TX_SWING_FULL_MASK GENMASK(6, 0) + #define PHY_CTRL6 0x18 #define PHY_CTRL6_ALT_CLK_EN BIT(1) #define PHY_CTRL6_ALT_CLK_SEL BIT(0) =20 +#define PHY_TUNE_DEFAULT 0xffffffff + struct imx8mq_usb_phy { struct phy *phy; struct clk *clk; void __iomem *base; struct regulator *vbus; + u32 pcs_tx_swing_full; + u32 pcs_tx_deemph_3p5db; + u32 tx_vref_tune; + u32 tx_rise_tune; + u32 tx_preemp_amp_tune; + u32 tx_vboost_level; + u32 comp_dis_tune; }; =20 +static void imx8m_get_phy_tuning_data(struct imx8mq_usb_phy *imx_phy) +{ + struct device *dev =3D imx_phy->phy->dev.parent; + + if (device_property_read_u32(dev, "fsl,phy-tx-vref-tune", + &imx_phy->tx_vref_tune)) + imx_phy->tx_vref_tune =3D PHY_TUNE_DEFAULT; + + if (device_property_read_u32(dev, "fsl,phy-tx-rise-tune", + &imx_phy->tx_rise_tune)) + imx_phy->tx_rise_tune =3D PHY_TUNE_DEFAULT; + + if (device_property_read_u32(dev, "fsl,phy-tx-preemp-amp-tune", + &imx_phy->tx_preemp_amp_tune)) + imx_phy->tx_preemp_amp_tune =3D PHY_TUNE_DEFAULT; + + if (device_property_read_u32(dev, "fsl,phy-tx-vboost-level", + &imx_phy->tx_vboost_level)) + imx_phy->tx_vboost_level =3D PHY_TUNE_DEFAULT; + + if (device_property_read_u32(dev, "fsl,phy-comp-dis-tune", + &imx_phy->comp_dis_tune)) + imx_phy->comp_dis_tune =3D PHY_TUNE_DEFAULT; + + if (device_property_read_u32(dev, "fsl,pcs-tx-deemph-3p5db", + &imx_phy->pcs_tx_deemph_3p5db)) + imx_phy->pcs_tx_deemph_3p5db =3D PHY_TUNE_DEFAULT; + + if (device_property_read_u32(dev, "fsl,phy-pcs-tx-swing-full", + &imx_phy->pcs_tx_swing_full)) + imx_phy->pcs_tx_swing_full =3D PHY_TUNE_DEFAULT; +} + +static void imx8m_phy_tune(struct imx8mq_usb_phy *imx_phy) +{ + u32 value; + + /* PHY tuning */ + if (imx_phy->pcs_tx_deemph_3p5db !=3D PHY_TUNE_DEFAULT) { + value =3D readl(imx_phy->base + PHY_CTRL4); + value &=3D ~PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK; + value |=3D FIELD_PREP(PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK, + imx_phy->pcs_tx_deemph_3p5db); + writel(value, imx_phy->base + PHY_CTRL4); + } + + if (imx_phy->pcs_tx_swing_full !=3D PHY_TUNE_DEFAULT) { + value =3D readl(imx_phy->base + PHY_CTRL5); + value |=3D FIELD_PREP(PHY_CTRL5_PCS_TX_SWING_FULL_MASK, + imx_phy->pcs_tx_swing_full); + writel(value, imx_phy->base + PHY_CTRL5); + } + + if ((imx_phy->tx_vref_tune & imx_phy->tx_rise_tune & + imx_phy->tx_preemp_amp_tune & imx_phy->comp_dis_tune & + imx_phy->tx_vboost_level) =3D=3D PHY_TUNE_DEFAULT) + /* If all are the default values, no need update. */ + return; + + value =3D readl(imx_phy->base + PHY_CTRL3); + + if (imx_phy->tx_vref_tune !=3D PHY_TUNE_DEFAULT) { + value &=3D ~PHY_CTRL3_TXVREF_TUNE_MASK; + value |=3D FIELD_PREP(PHY_CTRL3_TXVREF_TUNE_MASK, + imx_phy->tx_vref_tune); + } + + if (imx_phy->tx_rise_tune !=3D PHY_TUNE_DEFAULT) { + value &=3D ~PHY_CTRL3_TXRISE_TUNE_MASK; + value |=3D FIELD_PREP(PHY_CTRL3_TXRISE_TUNE_MASK, + imx_phy->tx_rise_tune); + } + + if (imx_phy->tx_preemp_amp_tune !=3D PHY_TUNE_DEFAULT) { + value &=3D ~PHY_CTRL3_TXPREEMP_TUNE_MASK; + value |=3D FIELD_PREP(PHY_CTRL3_TXPREEMP_TUNE_MASK, + imx_phy->tx_preemp_amp_tune); + } + + if (imx_phy->comp_dis_tune !=3D PHY_TUNE_DEFAULT) { + value &=3D ~PHY_CTRL3_COMPDISTUNE_MASK; + value |=3D FIELD_PREP(PHY_CTRL3_COMPDISTUNE_MASK, + imx_phy->comp_dis_tune); + } + + if (imx_phy->tx_vboost_level !=3D PHY_TUNE_DEFAULT) { + value &=3D ~PHY_CTRL3_TX_VBOOST_LEVEL_MASK; + value |=3D FIELD_PREP(PHY_CTRL3_TX_VBOOST_LEVEL_MASK, + imx_phy->tx_vboost_level); + } + + writel(value, imx_phy->base + PHY_CTRL3); +} + static int imx8mq_usb_phy_init(struct phy *phy) { struct imx8mq_usb_phy *imx_phy =3D phy_get_drvdata(phy); @@ -99,6 +219,8 @@ static int imx8mp_usb_phy_init(struct phy *phy) value &=3D ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET); writel(value, imx_phy->base + PHY_CTRL1); =20 + imx8m_phy_tune(imx_phy); + return 0; } =20 @@ -182,6 +304,8 @@ static int imx8mq_usb_phy_probe(struct platform_device = *pdev) =20 phy_set_drvdata(imx_phy->phy, imx_phy); =20 + imx8m_get_phy_tuning_data(imx_phy); + phy_provider =3D devm_of_phy_provider_register(dev, of_phy_simple_xlate); =20 return PTR_ERR_OR_ZERO(phy_provider); --=20 2.39.2