From nobody Tue Feb 10 23:53:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9841EC761A6 for ; Tue, 4 Apr 2023 09:43:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234374AbjDDJnr (ORCPT ); Tue, 4 Apr 2023 05:43:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234350AbjDDJne (ORCPT ); Tue, 4 Apr 2023 05:43:34 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5E3A2D6D for ; Tue, 4 Apr 2023 02:43:19 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id x17so41651347lfu.5 for ; Tue, 04 Apr 2023 02:43:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680601398; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qbp5jveZuzO4r+Wb5Hve1cqOR9sHInUuZ3dFCFmIV6M=; b=soPMTVlcwLFSs/PtZ3xuloR1YprIJgq5gnITeQFsZZ0gFh8y81eUPT66DmPN1Ioph6 ZwBOqwfx8CdK8ca/r3w2gNgIfi7tQzoVbuAxkFg+uo2Nc+DhRNA0cXXo7zQ52ILg8+/E aW2LqJCckiXThRcvxfrV7Tz6wakK5dDXqbUs8y/zAtswTW/RqkLtPIYxRnB9UB/pn/6+ KHGGIZL0443cRzjzYCB2w4rkdnWVZbBLVpmf75qQRKZKjj4X1sj4F38KWomG9kk6HhDs eJdX8+4RaBVDgo4D21ZXyn84AYqQoCxu+fksVURS7Up9i008GG19+MEL9NjwDsVc8me3 clVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680601398; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qbp5jveZuzO4r+Wb5Hve1cqOR9sHInUuZ3dFCFmIV6M=; b=EhhfWjQ1L3Ya5LWgfHKYXMhlXodqKtdh1WviL5u0EDwM2QK2Xo76JhEJsRrdLyHV9S qx7Xa50SXXh+YBojkR94DYbbTz8HUq/0bFCMyN70frVrvYXHGTuGhfWttOBRQ741Nuik 5o3SmiRlVRwYBal2CjKe89FNMPmuB45AI6eO762j47+DAP6SPbAcDbmiG6zaGXYOHApc orHF2ewOyX42bn3KhVSQe6vDyE4HtmiM6iucEsVpVcc4L5aVtAnsdi5jYK4ubuThXv8U uLBF1hbI8DY61IEiXP9XcaZ9h6BivsWFH8M6pX5H5L/YSLvH5bUqdjvaX4P4M4oKYFrm 8Rbg== X-Gm-Message-State: AAQBX9eKCKQ9yVRTB+VVc7YL+LSfrvmNNIQ9XqFeZ23Sn2R/Zdm0Ziur Gvd+BS1B71ael+wut47JJgxKUQ== X-Google-Smtp-Source: AKy350aaSf2WBwWmJ44plhwCi9IO+IsKnfCj7W2KXi50QhxuaoXCfqADvAQkBEz1VIBbYXmZlXoj7Q== X-Received: by 2002:ac2:424d:0:b0:4d8:71dd:5c5e with SMTP id m13-20020ac2424d000000b004d871dd5c5emr409630lfl.37.1680601398122; Tue, 04 Apr 2023 02:43:18 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id l25-20020a19c219000000b004eb258f73a9sm2218443lfc.163.2023.04.04.02.43.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Apr 2023 02:43:17 -0700 (PDT) From: Linus Walleij Date: Tue, 04 Apr 2023 11:43:10 +0200 Subject: [PATCH 8/9] pinctrl: stmfx: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230403-immutable-irqchips-v1-8-503788a7f6e6@linaro.org> References: <20230403-immutable-irqchips-v1-0-503788a7f6e6@linaro.org> In-Reply-To: <20230403-immutable-irqchips-v1-0-503788a7f6e6@linaro.org> To: Ray Jui , Scott Branden , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Patrice Chotard , Maxime Coquelin , Alexandre Torgue Cc: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-stm32@st-md-mailman.stormreply.com, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. This driver rolls it's own resource handling and does not use GPIOCHIP_IRQ_RESOURCE_HELPERS. Cc: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-stmfx.c | 36 ++++++++++++++++++++++++------------ 1 file changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmf= x.c index 1181c4b506b1..eba7d8d9c753 100644 --- a/drivers/pinctrl/pinctrl-stmfx.c +++ b/drivers/pinctrl/pinctrl-stmfx.c @@ -85,7 +85,6 @@ struct stmfx_pinctrl { struct pinctrl_dev *pctl_dev; struct pinctrl_desc pctl_desc; struct gpio_chip gpio_chip; - struct irq_chip irq_chip; struct mutex lock; /* IRQ bus lock */ unsigned long gpio_valid_mask; /* Cache of IRQ_GPI_* registers for bus_lock */ @@ -427,6 +426,7 @@ static void stmfx_pinctrl_irq_mask(struct irq_data *dat= a) u32 mask =3D get_mask(data->hwirq); =20 pctl->irq_gpi_src[reg] &=3D ~mask; + gpiochip_disable_irq(gpio_chip, irqd_to_hwirq(data)); } =20 static void stmfx_pinctrl_irq_unmask(struct irq_data *data) @@ -436,6 +436,7 @@ static void stmfx_pinctrl_irq_unmask(struct irq_data *d= ata) u32 reg =3D get_reg(data->hwirq); u32 mask =3D get_mask(data->hwirq); =20 + gpiochip_enable_irq(gpio_chip, irqd_to_hwirq(data)); pctl->irq_gpi_src[reg] |=3D mask; } =20 @@ -592,6 +593,26 @@ static irqreturn_t stmfx_pinctrl_irq_thread_fn(int irq= , void *dev_id) return IRQ_HANDLED; } =20 +static void stmfx_pinctrl_irq_print_chip(struct irq_data *d, struct seq_fi= le *p) +{ + struct gpio_chip *gpio_chip =3D irq_data_get_irq_chip_data(d); + struct stmfx_pinctrl *pctl =3D gpiochip_get_data(gpio_chip); + + seq_printf(p, dev_name(pctl->dev)); +} + +static const struct irq_chip stmfx_pinctrl_irq_chip =3D { + .irq_mask =3D stmfx_pinctrl_irq_mask, + .irq_unmask =3D stmfx_pinctrl_irq_unmask, + .irq_set_type =3D stmfx_pinctrl_irq_set_type, + .irq_bus_lock =3D stmfx_pinctrl_irq_bus_lock, + .irq_bus_sync_unlock =3D stmfx_pinctrl_irq_bus_sync_unlock, + .irq_request_resources =3D stmfx_gpio_irq_request_resources, + .irq_release_resources =3D stmfx_gpio_irq_release_resources, + .irq_print_chip =3D stmfx_pinctrl_irq_print_chip, + .flags =3D IRQCHIP_IMMUTABLE, +}; + static int stmfx_pinctrl_gpio_function_enable(struct stmfx_pinctrl *pctl) { struct pinctrl_gpio_range *gpio_range; @@ -678,17 +699,8 @@ static int stmfx_pinctrl_probe(struct platform_device = *pdev) pctl->gpio_chip.ngpio =3D pctl->pctl_desc.npins; pctl->gpio_chip.can_sleep =3D true; =20 - pctl->irq_chip.name =3D dev_name(pctl->dev); - pctl->irq_chip.irq_mask =3D stmfx_pinctrl_irq_mask; - pctl->irq_chip.irq_unmask =3D stmfx_pinctrl_irq_unmask; - pctl->irq_chip.irq_set_type =3D stmfx_pinctrl_irq_set_type; - pctl->irq_chip.irq_bus_lock =3D stmfx_pinctrl_irq_bus_lock; - pctl->irq_chip.irq_bus_sync_unlock =3D stmfx_pinctrl_irq_bus_sync_unlock; - pctl->irq_chip.irq_request_resources =3D stmfx_gpio_irq_request_resources; - pctl->irq_chip.irq_release_resources =3D stmfx_gpio_irq_release_resources; - girq =3D &pctl->gpio_chip.irq; - girq->chip =3D &pctl->irq_chip; + gpio_irq_chip_set_chip(girq, &stmfx_pinctrl_irq_chip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler =3D NULL; girq->num_parents =3D 0; @@ -710,7 +722,7 @@ static int stmfx_pinctrl_probe(struct platform_device *= pdev) ret =3D devm_request_threaded_irq(pctl->dev, irq, NULL, stmfx_pinctrl_irq_thread_fn, IRQF_ONESHOT, - pctl->irq_chip.name, pctl); + dev_name(pctl->dev), pctl); if (ret) { dev_err(pctl->dev, "cannot request irq%d\n", irq); return ret; --=20 2.34.1