From nobody Tue Feb 10 06:04:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 217C3C761A6 for ; Fri, 31 Mar 2023 21:59:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233463AbjCaV7t (ORCPT ); Fri, 31 Mar 2023 17:59:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56070 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233375AbjCaV7l (ORCPT ); Fri, 31 Mar 2023 17:59:41 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0186C25460 for ; Fri, 31 Mar 2023 14:58:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1680299905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rCiyg9dGBB6UNsno9U8qc2bm6rLIrDesgavseN/0KQA=; b=MphePYqVzunN0IIh48DSki9QkeoqZKkqnPnmpIWZOfG8oUcq9FTA3VE72z0Fw7JVk6HIJZ dC7+893N4ga9Omo+KlJtnFRM84R9hgAdJ7oH8sJoqO9CijUst0Mcl2WGkiOwfDNk+r4GbN UxMizQzfiAb5WxjKUzNqngrpi+2BgIo= Received: from mail-oo1-f72.google.com (mail-oo1-f72.google.com [209.85.161.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-393-Mhn3jwphP6OVM5hS5Bjhtg-1; Fri, 31 Mar 2023 17:58:24 -0400 X-MC-Unique: Mhn3jwphP6OVM5hS5Bjhtg-1 Received: by mail-oo1-f72.google.com with SMTP id w3-20020a4ae083000000b0052645d4a2dfso6436647oos.18 for ; Fri, 31 Mar 2023 14:58:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680299903; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rCiyg9dGBB6UNsno9U8qc2bm6rLIrDesgavseN/0KQA=; b=FwmitT5U/Ampv3JsBOSbSs4CNZcf14Mv6ci+VQYpSixlgojBKVo8zAddD5t+4Linov KJjOfMF0+1gAL9q4vmfmwjpl457LRps1bqvWXFEOsxSHIdHtoLEdjGXEzjdmgGicIdQd owY1WHC4aUUoqGTdIyyT8DzTOZeIWBZd/OGZbAbrEPPrNmIpChkSR4RWl38Qm1GXrzgc zCW0AQEOwMJ9BEWLzg7i1inlEqoxN+YEWRQ2WX5QbgtyQ/EHTlbP7EF7EByWPvN6pYLF sAK88ebkUUgnNk1ErMzRnHj8iMUd01F4VSPxukAStjtXVrUSJK4NqXA9KYYMAWdRGqKC 0IJw== X-Gm-Message-State: AAQBX9eUjNuny23rBoq5dgfppZ16R0c+yqG0Aafis+B/Ca/9PNMwn3+p s7apeDynWq/UD7/nY5ikcT2JJjaTifypw4akad4LMjjmzlyJiHM3LeJT7KQzE1zbUIF8HWVmeYJ F8rl5RgHKpbX3T0OhT6GhkhKPO1CjcRtGB7fqc0am7SB/7Ee0rZUT0rrw1UBdSzbmXo6UnB7DYx CQDkFqH+iX X-Received: by 2002:aca:2102:0:b0:389:7b6b:7a3d with SMTP id 2-20020aca2102000000b003897b6b7a3dmr3094801oiz.45.1680299903154; Fri, 31 Mar 2023 14:58:23 -0700 (PDT) X-Google-Smtp-Source: AKy350YHcYwEaPVb0PTs80nVmJ1lYDlQIT7UZ7m71p1JiRK2YwqEicxxTtQZwuTV/I6TW/X77Zlb9Q== X-Received: by 2002:aca:2102:0:b0:389:7b6b:7a3d with SMTP id 2-20020aca2102000000b003897b6b7a3dmr3094773oiz.45.1680299902865; Fri, 31 Mar 2023 14:58:22 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id g11-20020a4a894b000000b0053bb2ae3a78sm1299277ooi.24.2023.03.31.14.58.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 14:58:22 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v3 1/3] clk: qcom: gcc-sc8280xp: Add EMAC GDSCs Date: Fri, 31 Mar 2023 16:58:02 -0500 Message-Id: <20230331215804.783439-2-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331215804.783439-1-ahalaney@redhat.com> References: <20230331215804.783439-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the EMAC GDSCs to allow the EMAC hardware to be enabled. Acked-by: Stephen Boyd Reviewed-by: Konrad Dybcio Signed-off-by: Andrew Halaney --- Changes since v2: * Add Konrad's Reviewed-by Changes since v1: * Add Stephen's Acked-by * Explicitly tested on x13s laptop with no noticeable side effect (Konr= ad) drivers/clk/qcom/gcc-sc8280xp.c | 18 ++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280x= p.c index b3198784e1c3..04a99dbaa57e 100644 --- a/drivers/clk/qcom/gcc-sc8280xp.c +++ b/drivers/clk/qcom/gcc-sc8280xp.c @@ -6873,6 +6873,22 @@ static struct gdsc usb30_sec_gdsc =3D { .pwrsts =3D PWRSTS_RET_ON, }; =20 +static struct gdsc emac_0_gdsc =3D { + .gdscr =3D 0xaa004, + .pd =3D { + .name =3D "emac_0_gdsc", + }, + .pwrsts =3D PWRSTS_OFF_ON, +}; + +static struct gdsc emac_1_gdsc =3D { + .gdscr =3D 0xba004, + .pd =3D { + .name =3D "emac_1_gdsc", + }, + .pwrsts =3D PWRSTS_OFF_ON, +}; + static struct clk_regmap *gcc_sc8280xp_clocks[] =3D { [GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] =3D &gcc_aggre_noc_pcie0_tunnel_axi_= clk.clkr, [GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] =3D &gcc_aggre_noc_pcie1_tunnel_axi_= clk.clkr, @@ -7351,6 +7367,8 @@ static struct gdsc *gcc_sc8280xp_gdscs[] =3D { [USB30_MP_GDSC] =3D &usb30_mp_gdsc, [USB30_PRIM_GDSC] =3D &usb30_prim_gdsc, [USB30_SEC_GDSC] =3D &usb30_sec_gdsc, + [EMAC_0_GDSC] =3D &emac_0_gdsc, + [EMAC_1_GDSC] =3D &emac_1_gdsc, }; =20 static const struct clk_rcg_dfs_data gcc_dfs_clocks[] =3D { diff --git a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h b/include/dt-bin= dings/clock/qcom,gcc-sc8280xp.h index cb2fb638825c..721105ea4fad 100644 --- a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h +++ b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h @@ -492,5 +492,7 @@ #define USB30_MP_GDSC 9 #define USB30_PRIM_GDSC 10 #define USB30_SEC_GDSC 11 +#define EMAC_0_GDSC 12 +#define EMAC_1_GDSC 13 =20 #endif --=20 2.39.2 From nobody Tue Feb 10 06:04:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89056C77B6C for ; Fri, 31 Mar 2023 22:00:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233395AbjCaV77 (ORCPT ); Fri, 31 Mar 2023 17:59:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233400AbjCaV7o (ORCPT ); Fri, 31 Mar 2023 17:59:44 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7868918F9C for ; Fri, 31 Mar 2023 14:58:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1680299908; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dtvlaUsuOBNnhs3AQ92aPIaKuLGL5kAklD70GeG4yxs=; b=HM+hpeDYSl7PrBzo/IYHD3BmPOGmGekWNnqiGZnD7jcRlusVTj9fi32RXE2b0qqR48m5nO qbRLhEGLgbKvRIo+QHU9rdjfPjwKQcLoiLt8QaWxQ+LqI3qWG4qTb13kU4TABFuqFGMSA5 K87QlxdFPizSe8d8ir399qVomlhMFiw= Received: from mail-oo1-f70.google.com (mail-oo1-f70.google.com [209.85.161.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-13-uB74awJPNc61qsuN1ZzzPg-1; Fri, 31 Mar 2023 17:58:27 -0400 X-MC-Unique: uB74awJPNc61qsuN1ZzzPg-1 Received: by mail-oo1-f70.google.com with SMTP id i2-20020a4abc02000000b0052529fc100aso6410653oop.7 for ; Fri, 31 Mar 2023 14:58:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680299906; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dtvlaUsuOBNnhs3AQ92aPIaKuLGL5kAklD70GeG4yxs=; b=1W8tIxHqSluAn1kv/s9S3U8aVQHjd8nkGq6Rc7AnuoaSLb6tYnRYQOu9cSzXHs029A oqVE0kABEeWJNUgDh6uvZeTz2sM+1SeoV15vQUzqU2adc9InC6W1/34Oj5efAc7vVyj8 LAKuV2oSlOmrK3zWABBwLzOaKvsniLmB/WEI+DSh61NHDeehVFSfAGrZrk+niqZprSlx HEHKTg1TKmo6YCxGMvx6Ff77CD7jqPhT7YosnKpJ17blRMeFfynLtvOsRhAlkIEAj4IS +ZB5T+lu8guS1nwjtlwEXpDseZfINH9DcWp1qZAtmjcHZCBoIXVv4ESvPf7y8vRswk1r kR4Q== X-Gm-Message-State: AO0yUKVhyRSRRb6KEy7GgYcdg8peRPWGn7NaPtJC6SU2MVHGzm1qYJyu Sj3m3QIXt4kyLogDhrhbzqxGklwXEMAUF9JAHJc1SPkkMRKHorvmIt7/gMj7achdxMarBeDqogH CSYbTu28SkRIXoLRVvOe2CqUYwRajJvkxGmO4UGxPCb6IUIBQnUs93PcjmFgqHNSZOp9wmbDvNE WhctyaZm2Z X-Received: by 2002:a4a:5291:0:b0:520:331d:9514 with SMTP id d139-20020a4a5291000000b00520331d9514mr13579913oob.1.1680299906504; Fri, 31 Mar 2023 14:58:26 -0700 (PDT) X-Google-Smtp-Source: AK7set+TK42AynW8tKNUKi0xOljXNnE7dxT5w546BuQvwYGmXJyefwQ/4guiX20WF0fdgNHrp69cag== X-Received: by 2002:a4a:5291:0:b0:520:331d:9514 with SMTP id d139-20020a4a5291000000b00520331d9514mr13579889oob.1.1680299906227; Fri, 31 Mar 2023 14:58:26 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id g11-20020a4a894b000000b0053bb2ae3a78sm1299277ooi.24.2023.03.31.14.58.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 14:58:25 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v3 2/3] arm64: dts: qcom: sc8280xp: Add ethernet nodes Date: Fri, 31 Mar 2023 16:58:03 -0500 Message-Id: <20230331215804.783439-3-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331215804.783439-1-ahalaney@redhat.com> References: <20230331215804.783439-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This platform has 2 MACs integrated in it, go ahead and describe them. Signed-off-by: Andrew Halaney Reviewed-by: Konrad Dybcio --- Changes since v2: * Fix spacing (Konrad) Changes since v1: * None arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 59 ++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index 42bfa9fa5b96..f28ea86b128d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -761,6 +761,65 @@ soc: soc@0 { ranges =3D <0 0 0 0 0x10 0>; dma-ranges =3D <0 0 0 0 0x10 0>; =20 + ethernet0: ethernet@20000 { + compatible =3D "qcom,sc8280xp-ethqos"; + reg =3D <0x0 0x00020000 0x0 0x10000>, + <0x0 0x00036000 0x0 0x100>; + reg-names =3D "stmmaceth", "rgmii"; + + clocks =3D <&gcc GCC_EMAC0_AXI_CLK>, + <&gcc GCC_EMAC0_SLV_AHB_CLK>, + <&gcc GCC_EMAC0_PTP_CLK>, + <&gcc GCC_EMAC0_RGMII_CLK>; + clock-names =3D "stmmaceth", + "pclk", + "ptp_ref", + "rgmii"; + + interrupts =3D , + ; + interrupt-names =3D "macirq", "eth_lpi"; + iommus =3D <&apps_smmu 0x4c0 0xf>; + power-domains =3D <&gcc EMAC_0_GDSC>; + + snps,tso; + snps,pbl =3D <32>; + rx-fifo-depth =3D <4096>; + tx-fifo-depth =3D <4096>; + + status =3D "disabled"; + }; + + ethernet1: ethernet@23000000 { + compatible =3D "qcom,sc8280xp-ethqos"; + reg =3D <0x0 0x23000000 0x0 0x10000>, + <0x0 0x23016000 0x0 0x100>; + reg-names =3D "stmmaceth", "rgmii"; + + clocks =3D <&gcc GCC_EMAC1_AXI_CLK>, + <&gcc GCC_EMAC1_SLV_AHB_CLK>, + <&gcc GCC_EMAC1_PTP_CLK>, + <&gcc GCC_EMAC1_RGMII_CLK>; + clock-names =3D "stmmaceth", + "pclk", + "ptp_ref", + "rgmii"; + + interrupts =3D , + ; + interrupt-names =3D "macirq", "eth_lpi"; + + iommus =3D <&apps_smmu 0x40 0xf>; + power-domains =3D <&gcc EMAC_1_GDSC>; + + snps,tso; + snps,pbl =3D <32>; + rx-fifo-depth =3D <4096>; + tx-fifo-depth =3D <4096>; + + status =3D "disabled"; + }; + gcc: clock-controller@100000 { compatible =3D "qcom,gcc-sc8280xp"; reg =3D <0x0 0x00100000 0x0 0x1f0000>; --=20 2.39.2 From nobody Tue Feb 10 06:04:48 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5B43C76196 for ; Fri, 31 Mar 2023 22:00:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233416AbjCaWAB (ORCPT ); Fri, 31 Mar 2023 18:00:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233472AbjCaV7v (ORCPT ); Fri, 31 Mar 2023 17:59:51 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A1C859D2 for ; Fri, 31 Mar 2023 14:58:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1680299911; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q+CnpU0/48fSQtYvxmbymRW1jKLUmorpaHw1MMzDa7k=; b=SpZtZuB6FZVZ08UDuVUZOKaKa4U5Sg6I36449QYbNKQRbcMJJ4Sys8HTqDYmLmzJgwZPZE /V7X0CO46FQaj8vlmoQhMDHAHYlo9PdQNLng5oHVQ9OqBe151wKkLsU8hpMrTlP8bquiuf 3MjFqet83uXLJuGRD79FpT0KzBleUVg= Received: from mail-oo1-f71.google.com (mail-oo1-f71.google.com [209.85.161.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-460-q47zNbA0P7mZcAQFeQLfEw-1; Fri, 31 Mar 2023 17:58:30 -0400 X-MC-Unique: q47zNbA0P7mZcAQFeQLfEw-1 Received: by mail-oo1-f71.google.com with SMTP id d2-20020a4a5202000000b0053b5874f94aso6452614oob.3 for ; Fri, 31 Mar 2023 14:58:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680299909; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q+CnpU0/48fSQtYvxmbymRW1jKLUmorpaHw1MMzDa7k=; b=JhZ68wzh6sF2yIgCWcxjTMFV1p2iDEmg4QQ+OonQd12jOFxeE5hBWRJu0CnQxqsZVX BHiXOtdxHNeDoH0G9vRKKXv5M1dOEmNAfbLohJiTZl6i2l2tiES4t/ABiVDI3i7WlTZd smK6veuKKuLuMC/Ej7wgDFEP8Ho/ypbV80JAH55zU5nPSj8jp+YTLATSev6YMrZSOCv6 yZgbEkjGYq48lY5Jvd2gHBhZBjNC3aHgvcRtAkITDBgc6ENrZ/UoFkBqksJtZfGZ71tX Ie5tRFxTwWdmeuX+ngodOoK0e5llW12VsFT58nXSqcej0GYbiCvYBW1E7kVK00OPxyN5 +aTA== X-Gm-Message-State: AO0yUKXxjN8SduHpOlhn84E3XkqJhxC8Lq54c58rPZWlEt/w8fQCMDwE f8IbddJA05R0zY58hwvfs82ICEokYr2fVaxy2qNjWnA6zhEqNa5sqEZw3e38WEReFE2fW0Vhphs xrzBrUilrT21p92q9n4hMnF/OHsjbSHxuONz39AaIWEtQMyCYSEjmdtGWEaULS1b0/igEkavKTa agXIRg+aHm X-Received: by 2002:a05:6808:8e5:b0:378:9c51:3ea2 with SMTP id d5-20020a05680808e500b003789c513ea2mr12195574oic.36.1680299909152; Fri, 31 Mar 2023 14:58:29 -0700 (PDT) X-Google-Smtp-Source: AK7set/tNJN7xl/+0xgmcgEKcIKPSAd2qaVAouJocdF0W82AdKRS+C+55nmCFb1ZijmhWP1e4rqAqA== X-Received: by 2002:a05:6808:8e5:b0:378:9c51:3ea2 with SMTP id d5-20020a05680808e500b003789c513ea2mr12195551oic.36.1680299908769; Fri, 31 Mar 2023 14:58:28 -0700 (PDT) Received: from halaney-x13s.attlocal.net (104-53-165-62.lightspeed.stlsmo.sbcglobal.net. [104.53.165.62]) by smtp.gmail.com with ESMTPSA id g11-20020a4a894b000000b0053bb2ae3a78sm1299277ooi.24.2023.03.31.14.58.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 14:58:28 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v3 3/3] arm64: dts: qcom: sa8540p-ride: Add ethernet nodes Date: Fri, 31 Mar 2023 16:58:04 -0500 Message-Id: <20230331215804.783439-4-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331215804.783439-1-ahalaney@redhat.com> References: <20230331215804.783439-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable both the MACs found on the board. ethernet0 and ethernet1 both ultimately go to a series of on board switches which aren't managed by this processor. ethernet0 is connected to a Marvell 88EA1512 phy via RGMII. That goes to the series of switches via SGMII on the "media" side of the phy. RGMII_SGMII mode is enabled via devicetree register descriptions. The switch on the "media" side has auto-negotiation disabled, so configuration from userspace similar to: ethtool -s eth0 autoneg off speed 1000 duplex full is necessary to get traffic flowing on that interface. ethernet1 is in a mac2mac/fixed-link configuration going to the same series of switches directly via RGMII. Signed-off-by: Andrew Halaney --- Changes since v1 and v2: * None arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 181 ++++++++++++++++++++++ 1 file changed, 181 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dt= s/qcom/sa8540p-ride.dts index 40db5aa0803c..eb230265aa45 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -28,6 +28,65 @@ aliases { chosen { stdout-path =3D "serial0:115200n8"; }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use =3D <1>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel =3D <0x0>; + snps,route-up; + snps,priority =3D <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel =3D <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel =3D <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel =3D <0x3>; + snps,priority =3D <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use =3D <1>; + snps,tx-sched-sp; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope =3D <0x1000>; + snps,idle_slope =3D <0x1000>; + snps,high_credit =3D <0x3e800>; + snps,low_credit =3D <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope =3D <0x1000>; + snps,idle_slope =3D <0x1000>; + snps,high_credit =3D <0x3e800>; + snps,low_credit =3D <0xffc18000>; + }; + }; }; =20 &apps_rsc { @@ -151,6 +210,68 @@ vreg_l8g: ldo8 { }; }; =20 +ðernet0 { + snps,mtl-rx-config =3D <&mtl_rx_setup>; + snps,mtl-tx-config =3D <&mtl_tx_setup>; + + max-speed =3D <1000>; + phy-handle =3D <&rgmii_phy>; + phy-mode =3D "rgmii-txid"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <ðernet0_default>; + + status =3D "okay"; + + mdio { + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + + compatible =3D "snps,dwmac-mdio"; + + /* Marvell 88EA1512 */ + rgmii_phy: phy@8 { + reg =3D <0x8>; + + interrupt-parent =3D <&tlmm>; + interrupts-extended =3D <&tlmm 127 IRQ_TYPE_EDGE_FALLING>; + + reset-gpios =3D <&pmm8540c_gpios 1 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <11000>; + reset-deassert-us =3D <70000>; + + device_type =3D "ethernet-phy"; + + /* Set to RGMII_SGMII mode and soft reset. Turn off auto-negotiation + * from userspace to talk to the switch on the SGMII side of things + */ + marvell,reg-init =3D + /* Set MODE[2:0] to RGMII_SGMII */ + <0x12 0x14 0xfff8 0x4>, + /* Soft reset required after changing MODE[2:0] */ + <0x12 0x14 0x7fff 0x8000>; + }; + }; +}; + +ðernet1 { + snps,mtl-rx-config =3D <&mtl_rx_setup>; + snps,mtl-tx-config =3D <&mtl_tx_setup>; + + max-speed =3D <1000>; + phy-mode =3D "rgmii-txid"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <ðernet1_default>; + + status =3D "okay"; + + fixed-link { + speed =3D <1000>; + full-duplex; + }; +}; + &i2c0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c0_default>; @@ -316,6 +437,66 @@ &xo_board_clk { /* PINCTRL */ =20 &tlmm { + ethernet0_default: ethernet0-default-state { + mdc-pins { + pins =3D "gpio175"; + function =3D "rgmii_0"; + drive-strength =3D <16>; + bias-pull-up; + }; + + mdio-pins { + pins =3D "gpio176"; + function =3D "rgmii_0"; + drive-strength =3D <16>; + bias-pull-up; + }; + + rgmii-tx-pins { + pins =3D "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio18= 8"; + function =3D "rgmii_0"; + drive-strength =3D <16>; + bias-pull-up; + }; + + rgmii-rx-pins { + pins =3D "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio18= 2"; + function =3D "rgmii_0"; + drive-strength =3D <16>; + bias-disable; + }; + }; + + ethernet1_default: ethernet1-default-state { + mdc-pins { + pins =3D "gpio97"; + function =3D "rgmii_1"; + drive-strength =3D <16>; + bias-pull-up; + }; + + mdio-pins { + pins =3D "gpio98"; + function =3D "rgmii_1"; + drive-strength =3D <16>; + bias-pull-up; + }; + + rgmii-tx-pins { + pins =3D "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio11= 0"; + function =3D "rgmii_1"; + drive-strength =3D <16>; + bias-pull-up; + }; + + rgmii-rx-pins { + pins =3D "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104= "; + function =3D "rgmii_1"; + drive-strength =3D <16>; + bias-disable; + }; + }; + i2c0_default: i2c0-default-state { /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ pins =3D "gpio135", "gpio136"; --=20 2.39.2