From nobody Tue Feb 10 03:44:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D084C77B60 for ; Fri, 31 Mar 2023 16:42:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232029AbjCaQm1 (ORCPT ); Fri, 31 Mar 2023 12:42:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230195AbjCaQl6 (ORCPT ); Fri, 31 Mar 2023 12:41:58 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0908E2783B; Fri, 31 Mar 2023 09:38:18 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-213-136.ewe-ip-backbone.de [91.248.213.136]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id A20BB660319B; Fri, 31 Mar 2023 17:38:16 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680280696; bh=Ang+ol8X8tHG4i9x5VTtRkot6uyY/w6cOxfWi5Scm1c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QwU6206cSlpL33GuYUrw1iMgQBkFj8NHBmYX6f+w1cGMY1chSiqS60D5K+k1BRqIa W9YBEJLyHflYZpD8ZxqbM2i1J6++vG8F36EeFC0pguWuPU9MATZIZV8nvzmAyFnz0Z qjwuDtj5PChcV4wzSClIkSbQNPKmDLM3lI+/EQURXnuUKioSYsvrMecDO9xCFwzQCO CsinIMQTAVv/cic/R86I9X5WqzGH6wjzQ3RHLyHL8dUkxGsOTxx5ebm7PTexNRQBws gHge9bLXo0vozsFKbD0d46WbtbgR7rNYqh56e9Ik97PtG0Q1/axq2PnM6oDh5HItIS /lxAPLkR7Bu5A== Received: by jupiter.universe (Postfix, from userid 1000) id E8E3C4807E2; Fri, 31 Mar 2023 18:38:13 +0200 (CEST) From: Sebastian Reichel To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski Cc: Heiko Stuebner , linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCHv1 1/3] dt-bindings: soc: rockchip: add rk3588 usb2phy syscon Date: Fri, 31 Mar 2023 18:38:10 +0200 Message-Id: <20230331163812.6124-2-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331163812.6124-1-sebastian.reichel@collabora.com> References: <20230331163812.6124-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The usb2phy is accessible via a syscon registers on RK3588, similar to rk3399. Signed-off-by: Sebastian Reichel --- That diff is quite hard to read :/ The first line adds the compatible to the list of allowed compatible values. The second line specifies that this node may have /schemas/phy/rockchip,inno-usb2phy.yaml subnodes. --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Docu= mentation/devicetree/bindings/soc/rockchip/grf.yaml index e697c928900d..a873f74564f2 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -52,6 +52,7 @@ properties: - rockchip,rk3399-pmugrf - rockchip,rk3568-grf - rockchip,rk3568-pmugrf + - rockchip,rk3588-usb2phy-grf - rockchip,rv1108-grf - rockchip,rv1108-pmugrf - rockchip,rv1126-grf @@ -195,6 +196,7 @@ allOf: - rockchip,rk3308-usb2phy-grf - rockchip,rk3328-usb2phy-grf - rockchip,rk3399-grf + - rockchip,rk3588-usb2phy-grf - rockchip,rv1108-grf =20 then: --=20 2.39.2 From nobody Tue Feb 10 03:44:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4A8CC761A6 for ; Fri, 31 Mar 2023 16:42:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230495AbjCaQmX (ORCPT ); Fri, 31 Mar 2023 12:42:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230339AbjCaQl7 (ORCPT ); Fri, 31 Mar 2023 12:41:59 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23E052291D; Fri, 31 Mar 2023 09:38:18 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-213-136.ewe-ip-backbone.de [91.248.213.136]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id B715B660319C; Fri, 31 Mar 2023 17:38:16 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680280696; bh=IanGuFMtYNipnpczUMLMr5LoVeF2LYQjoKAV5cNfhuo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mJg3f1Gi+1cc0aypuEBm1Au6W+2Hb7hdZ7C+ZzKxOyc9xgK4saf14aK9a4YKtSmpX bN7fP8QVF0fvXvX8xnMT+6933JacK4eCWKDHuJXW/0cqOZbMmbr8DtgW2TSQnUOdrv OQr3NynCiH5Vj3+fO3UUjjVTrHNHDJXiYwRs2GV9ZYByXiYjfz8jRCI3lRzP0TumoX wp4W1XxF7TLEXSr30iyUIkoFliDH/EyoASF5vWPu1ykVglZlYPDosOSsrsEyMXDjY4 FKQKR2lu85CX6Rfe2rGNY/7TonswHbvr+Z+3CgWCGE8l540ZQAXd49p/Z3LfRSMyg5 JpuAFJAkzBohQ== Received: by jupiter.universe (Postfix, from userid 1000) id EBDAF4807E3; Fri, 31 Mar 2023 18:38:13 +0200 (CEST) From: Sebastian Reichel To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski Cc: Heiko Stuebner , linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCHv1 2/3] dt-bindings: phy: rockchip,inno-usb2phy: add rk3588 Date: Fri, 31 Mar 2023 18:38:11 +0200 Message-Id: <20230331163812.6124-3-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331163812.6124-1-sebastian.reichel@collabora.com> References: <20230331163812.6124-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add compatible for the USB2 phy in the Rockchip RK3588 SoC. Signed-off-by: Sebastian Reichel --- .../bindings/phy/rockchip,inno-usb2phy.yaml | 21 ++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.ya= ml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml index 0d6b8c28be07..5254413137c6 100644 --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml @@ -20,6 +20,7 @@ properties: - rockchip,rk3366-usb2phy - rockchip,rk3399-usb2phy - rockchip,rk3568-usb2phy + - rockchip,rk3588-usb2phy - rockchip,rv1108-usb2phy =20 reg: @@ -56,6 +57,14 @@ properties: description: Muxed interrupt for both ports maxItems: 1 =20 + resets: + maxItems: 2 + + reset-names: + items: + - const: phy + - const: apb + rockchip,usbgrf: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -120,15 +129,21 @@ required: - reg - clock-output-names - "#clock-cells" - - host-port - - otg-port + +anyOf: + - required: + - otg-port + - required: + - host-port =20 allOf: - if: properties: compatible: contains: - const: rockchip,rk3568-usb2phy + enum: + - rockchip,rk3568-usb2phy + - rockchip,rk3588-usb2phy =20 then: properties: --=20 2.39.2 From nobody Tue Feb 10 03:44:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A204C76196 for ; Fri, 31 Mar 2023 16:42:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231423AbjCaQmb (ORCPT ); Fri, 31 Mar 2023 12:42:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230345AbjCaQl7 (ORCPT ); Fri, 31 Mar 2023 12:41:59 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 68AD929500; Fri, 31 Mar 2023 09:38:18 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-213-136.ewe-ip-backbone.de [91.248.213.136]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id C8174660319D; Fri, 31 Mar 2023 17:38:16 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680280696; bh=bzhXjkKl39IygL3yfymiF9diC7HprMRTyO8Ay+IfKJA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XYn1A6GvVbQtXkSvKI3jAA7pOz0JKU4scVhPLG1zj4XX137yaSFtbijH0ZmgIA+Zd ea12KVJltLHDPu2VzPxpvh/Z0ywUZu2/D48o2E/KWu9sZj26aF4DLjM6qQ+7AuPjg5 ucIQH02kwY2yNQtqPHPUZY8H9+aV4YN5Ilb5/fXpOw46vfoHWidK6IFS5BKzEM9WzN FGHq58ieZYIacScZn+/YKDOE/aVpyIgoGiZ+AtwXpHgEOjMtSIOme5JKykhOHsTe4H jpilXgRHL8to8PrsjnRZ89ilJi2K8Y9A2jdG59cL9rBc9SP/gRACMQ8Jl2JJmoJjUx iglWQLqLvZHdg== Received: by jupiter.universe (Postfix, from userid 1000) id EF0EC4807EF; Fri, 31 Mar 2023 18:38:13 +0200 (CEST) From: Sebastian Reichel To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski Cc: Heiko Stuebner , linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Sebastian Reichel , kernel@collabora.com, William Wu Subject: [PATCHv1 3/3] phy: phy-rockchip-inno-usb2: add rk3588 support Date: Fri, 31 Mar 2023 18:38:12 +0200 Message-Id: <20230331163812.6124-4-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331163812.6124-1-sebastian.reichel@collabora.com> References: <20230331163812.6124-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for the USB2 PHY found in the Rockchip RK3588. Co-developed-by: William Wu Signed-off-by: William Wu Signed-off-by: Sebastian Reichel --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 214 ++++++++++++++++-- 1 file changed, 200 insertions(+), 14 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/ro= ckchip/phy-rockchip-inno-usb2.c index a0bc10aa7961..01f74b9c58cc 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -116,6 +116,12 @@ struct rockchip_chg_det_reg { * @bvalid_det_en: vbus valid rise detection enable register. * @bvalid_det_st: vbus valid rise detection status register. * @bvalid_det_clr: vbus valid rise detection clear register. + * @disfall_en: host disconnect fall edge detection enable. + * @disfall_st: host disconnect fall edge detection state. + * @disfall_clr: host disconnect fall edge detection clear. + * @disrise_en: host disconnect rise edge detection enable. + * @disrise_st: host disconnect rise edge detection state. + * @disrise_clr: host disconnect rise edge detection clear. * @id_det_en: id detection enable register. * @id_det_st: id detection state register. * @id_det_clr: id detection clear register. @@ -133,6 +139,12 @@ struct rockchip_usb2phy_port_cfg { struct usb2phy_reg bvalid_det_en; struct usb2phy_reg bvalid_det_st; struct usb2phy_reg bvalid_det_clr; + struct usb2phy_reg disfall_en; + struct usb2phy_reg disfall_st; + struct usb2phy_reg disfall_clr; + struct usb2phy_reg disrise_en; + struct usb2phy_reg disrise_st; + struct usb2phy_reg disrise_clr; struct usb2phy_reg id_det_en; struct usb2phy_reg id_det_st; struct usb2phy_reg id_det_clr; @@ -168,6 +180,7 @@ struct rockchip_usb2phy_cfg { * @port_id: flag for otg port or host port. * @suspended: phy suspended flag. * @vbus_attached: otg device vbus status. + * @host_disconnect: usb host disconnect status. * @bvalid_irq: IRQ number assigned for vbus valid rise detection. * @id_irq: IRQ number assigned for ID pin detection. * @ls_irq: IRQ number assigned for linestate detection. @@ -187,6 +200,7 @@ struct rockchip_usb2phy_port { unsigned int port_id; bool suspended; bool vbus_attached; + bool host_disconnect; int bvalid_irq; int id_irq; int ls_irq; @@ -405,6 +419,27 @@ static int rockchip_usb2phy_extcon_register(struct roc= kchip_usb2phy *rphy) return 0; } =20 +static int rockchip_usb2phy_enable_host_disc_irq(struct rockchip_usb2phy *= rphy, + struct rockchip_usb2phy_port *rport, + bool en) +{ + int ret; + + ret =3D property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true); + if (ret) + return ret; + + ret =3D property_enable(rphy->grf, &rport->port_cfg->disfall_en, en); + if (ret) + return ret; + + ret =3D property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true); + if (ret) + return ret; + + return property_enable(rphy->grf, &rport->port_cfg->disrise_en, en); +} + static int rockchip_usb2phy_init(struct phy *phy) { struct rockchip_usb2phy_port *rport =3D phy_get_drvdata(phy); @@ -449,6 +484,15 @@ static int rockchip_usb2phy_init(struct phy *phy) dev_dbg(&rport->phy->dev, "mode %d\n", rport->mode); } } else if (rport->port_id =3D=3D USB2PHY_PORT_HOST) { + if (rport->port_cfg->disfall_en.offset) { + rport->host_disconnect =3D true; + ret =3D rockchip_usb2phy_enable_host_disc_irq(rphy, rport, true); + if (ret) { + dev_err(rphy->dev, "failed to enable disconnect irq\n"); + goto out; + } + } + /* clear linestate and enable linestate detect irq */ ret =3D property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true); @@ -810,9 +854,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct= *work) struct rockchip_usb2phy_port *rport =3D container_of(work, struct rockchip_usb2phy_port, sm_work.work); struct rockchip_usb2phy *rphy =3D dev_get_drvdata(rport->phy->dev.parent); - unsigned int sh =3D rport->port_cfg->utmi_hstdet.bitend - - rport->port_cfg->utmi_hstdet.bitstart + 1; - unsigned int ul, uhd, state; + unsigned int sh, ul, uhd, state; unsigned int ul_mask, uhd_mask; int ret; =20 @@ -822,18 +864,26 @@ static void rockchip_usb2phy_sm_work(struct work_stru= ct *work) if (ret < 0) goto next_schedule; =20 - ret =3D regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd); - if (ret < 0) - goto next_schedule; - - uhd_mask =3D GENMASK(rport->port_cfg->utmi_hstdet.bitend, - rport->port_cfg->utmi_hstdet.bitstart); ul_mask =3D GENMASK(rport->port_cfg->utmi_ls.bitend, rport->port_cfg->utmi_ls.bitstart); =20 - /* stitch on utmi_ls and utmi_hstdet as phy state */ - state =3D ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) | - (((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << sh); + if (rport->port_cfg->utmi_hstdet.offset) { + ret =3D regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd= ); + if (ret < 0) + goto next_schedule; + + uhd_mask =3D GENMASK(rport->port_cfg->utmi_hstdet.bitend, + rport->port_cfg->utmi_hstdet.bitstart); + + sh =3D rport->port_cfg->utmi_hstdet.bitend - + rport->port_cfg->utmi_hstdet.bitstart + 1; + /* stitch on utmi_ls and utmi_hstdet as phy state */ + state =3D ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) | + (((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << sh); + } else { + state =3D ((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << 1 | + rport->host_disconnect; + } =20 switch (state) { case PHY_STATE_HS_ONLINE: @@ -966,6 +1016,31 @@ static irqreturn_t rockchip_usb2phy_otg_mux_irq(int i= rq, void *data) return ret; } =20 +static irqreturn_t rockchip_usb2phy_host_disc_irq(int irq, void *data) +{ + struct rockchip_usb2phy_port *rport =3D data; + struct rockchip_usb2phy *rphy =3D dev_get_drvdata(rport->phy->dev.parent); + + if (!property_enabled(rphy->grf, &rport->port_cfg->disfall_st) && + !property_enabled(rphy->grf, &rport->port_cfg->disrise_st)) + return IRQ_NONE; + + mutex_lock(&rport->mutex); + + /* clear disconnect fall or rise detect irq pending status */ + if (property_enabled(rphy->grf, &rport->port_cfg->disfall_st)) { + property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true); + rport->host_disconnect =3D false; + } else if (property_enabled(rphy->grf, &rport->port_cfg->disrise_st)) { + property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true); + rport->host_disconnect =3D true; + } + + mutex_unlock(&rport->mutex); + + return IRQ_HANDLED; +} + static irqreturn_t rockchip_usb2phy_irq(int irq, void *data) { struct rockchip_usb2phy *rphy =3D data; @@ -978,6 +1053,10 @@ static irqreturn_t rockchip_usb2phy_irq(int irq, void= *data) if (!rport->phy) continue; =20 + if (rport->port_id =3D=3D USB2PHY_PORT_HOST && + rport->port_cfg->disfall_en.offset) + ret |=3D rockchip_usb2phy_host_disc_irq(irq, rport); + switch (rport->port_id) { case USB2PHY_PORT_OTG: if (rport->mode !=3D USB_DR_MODE_HOST && @@ -1254,14 +1333,14 @@ static int rockchip_usb2phy_probe(struct platform_d= evice *pdev) =20 /* find out a proper config which can be matched with dt. */ index =3D 0; - while (phy_cfgs[index].reg) { + do { if (phy_cfgs[index].reg =3D=3D reg) { rphy->phy_cfg =3D &phy_cfgs[index]; break; } =20 ++index; - } + } while (phy_cfgs[index].reg); =20 if (!rphy->phy_cfg) { dev_err(dev, "no phy-config can be matched with %pOFn node\n", @@ -1664,6 +1743,112 @@ static const struct rockchip_usb2phy_cfg rk3568_phy= _cfgs[] =3D { { /* sentinel */ } }; =20 +static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] =3D { + { + .reg =3D 0x0000, + .num_ports =3D 1, + .clkout_ctl =3D { 0x0000, 0, 0, 1, 0 }, + .port_cfgs =3D { + [USB2PHY_PORT_OTG] =3D { + .phy_sus =3D { 0x000c, 11, 11, 0, 1 }, + .ls_det_en =3D { 0x0080, 0, 0, 0, 1 }, + .ls_det_st =3D { 0x0084, 0, 0, 0, 1 }, + .ls_det_clr =3D { 0x0088, 0, 0, 0, 1 }, + .disfall_en =3D { 0x0080, 6, 6, 0, 1 }, + .disfall_st =3D { 0x0084, 6, 6, 0, 1 }, + .disfall_clr =3D { 0x0088, 6, 6, 0, 1 }, + .disrise_en =3D { 0x0080, 5, 5, 0, 1 }, + .disrise_st =3D { 0x0084, 5, 5, 0, 1 }, + .disrise_clr =3D { 0x0088, 5, 5, 0, 1 }, + .utmi_ls =3D { 0x00c0, 10, 9, 0, 1 }, + } + }, + .chg_det =3D { + .cp_det =3D { 0x00c0, 0, 0, 0, 1 }, + .dcp_det =3D { 0x00c0, 0, 0, 0, 1 }, + .dp_det =3D { 0x00c0, 1, 1, 1, 0 }, + .idm_sink_en =3D { 0x0008, 5, 5, 1, 0 }, + .idp_sink_en =3D { 0x0008, 5, 5, 0, 1 }, + .idp_src_en =3D { 0x0008, 14, 14, 0, 1 }, + .rdm_pdwn_en =3D { 0x0008, 14, 14, 0, 1 }, + .vdm_src_en =3D { 0x0008, 7, 6, 0, 3 }, + .vdp_src_en =3D { 0x0008, 7, 6, 0, 3 }, + }, + }, + { + .reg =3D 0x4000, + .num_ports =3D 1, + .clkout_ctl =3D { 0x0000, 0, 0, 1, 0 }, + .port_cfgs =3D { + [USB2PHY_PORT_OTG] =3D { + .phy_sus =3D { 0x000c, 11, 11, 0, 1 }, + .ls_det_en =3D { 0x0080, 0, 0, 0, 1 }, + .ls_det_st =3D { 0x0084, 0, 0, 0, 1 }, + .ls_det_clr =3D { 0x0088, 0, 0, 0, 1 }, + .disfall_en =3D { 0x0080, 6, 6, 0, 1 }, + .disfall_st =3D { 0x0084, 6, 6, 0, 1 }, + .disfall_clr =3D { 0x0088, 6, 6, 0, 1 }, + .disrise_en =3D { 0x0080, 5, 5, 0, 1 }, + .disrise_st =3D { 0x0084, 5, 5, 0, 1 }, + .disrise_clr =3D { 0x0088, 5, 5, 0, 1 }, + .utmi_ls =3D { 0x00c0, 10, 9, 0, 1 }, + } + }, + .chg_det =3D { + .cp_det =3D { 0x00c0, 0, 0, 0, 1 }, + .dcp_det =3D { 0x00c0, 0, 0, 0, 1 }, + .dp_det =3D { 0x00c0, 1, 1, 1, 0 }, + .idm_sink_en =3D { 0x0008, 5, 5, 1, 0 }, + .idp_sink_en =3D { 0x0008, 5, 5, 0, 1 }, + .idp_src_en =3D { 0x0008, 14, 14, 0, 1 }, + .rdm_pdwn_en =3D { 0x0008, 14, 14, 0, 1 }, + .vdm_src_en =3D { 0x0008, 7, 6, 0, 3 }, + .vdp_src_en =3D { 0x0008, 7, 6, 0, 3 }, + }, + }, + { + .reg =3D 0x8000, + .num_ports =3D 1, + .clkout_ctl =3D { 0x0000, 0, 0, 1, 0 }, + .port_cfgs =3D { + [USB2PHY_PORT_HOST] =3D { + .phy_sus =3D { 0x0008, 2, 2, 0, 1 }, + .ls_det_en =3D { 0x0080, 0, 0, 0, 1 }, + .ls_det_st =3D { 0x0084, 0, 0, 0, 1 }, + .ls_det_clr =3D { 0x0088, 0, 0, 0, 1 }, + .disfall_en =3D { 0x0080, 6, 6, 0, 1 }, + .disfall_st =3D { 0x0084, 6, 6, 0, 1 }, + .disfall_clr =3D { 0x0088, 6, 6, 0, 1 }, + .disrise_en =3D { 0x0080, 5, 5, 0, 1 }, + .disrise_st =3D { 0x0084, 5, 5, 0, 1 }, + .disrise_clr =3D { 0x0088, 5, 5, 0, 1 }, + .utmi_ls =3D { 0x00c0, 10, 9, 0, 1 }, + } + }, + }, + { + .reg =3D 0xc000, + .num_ports =3D 1, + .clkout_ctl =3D { 0x0000, 0, 0, 1, 0 }, + .port_cfgs =3D { + [USB2PHY_PORT_HOST] =3D { + .phy_sus =3D { 0x0008, 2, 2, 0, 1 }, + .ls_det_en =3D { 0x0080, 0, 0, 0, 1 }, + .ls_det_st =3D { 0x0084, 0, 0, 0, 1 }, + .ls_det_clr =3D { 0x0088, 0, 0, 0, 1 }, + .disfall_en =3D { 0x0080, 6, 6, 0, 1 }, + .disfall_st =3D { 0x0084, 6, 6, 0, 1 }, + .disfall_clr =3D { 0x0088, 6, 6, 0, 1 }, + .disrise_en =3D { 0x0080, 5, 5, 0, 1 }, + .disrise_st =3D { 0x0084, 5, 5, 0, 1 }, + .disrise_clr =3D { 0x0088, 5, 5, 0, 1 }, + .utmi_ls =3D { 0x00c0, 10, 9, 0, 1 }, + } + }, + }, + { /* sentinel */ } +}; + static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] =3D { { .reg =3D 0x100, @@ -1714,6 +1899,7 @@ static const struct of_device_id rockchip_usb2phy_dt_= match[] =3D { { .compatible =3D "rockchip,rk3366-usb2phy", .data =3D &rk3366_phy_cfgs }, { .compatible =3D "rockchip,rk3399-usb2phy", .data =3D &rk3399_phy_cfgs }, { .compatible =3D "rockchip,rk3568-usb2phy", .data =3D &rk3568_phy_cfgs }, + { .compatible =3D "rockchip,rk3588-usb2phy", .data =3D &rk3588_phy_cfgs }, { .compatible =3D "rockchip,rv1108-usb2phy", .data =3D &rv1108_phy_cfgs }, {} }; --=20 2.39.2