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Acked-by: Linus Walleij Acked-by: Arnd Bergmann Acked-by: Daniel Golle Signed-off-by: Neil Armstrong --- arch/arm/boot/dts/Makefile | 3 - arch/arm/boot/dts/ox810se-wd-mbwe.dts | 115 ------- arch/arm/boot/dts/ox810se.dtsi | 357 -----------------= ---- .../dts/ox820-cloudengines-pogoplug-series-3.dts | 93 ------ arch/arm/boot/dts/ox820.dtsi | 299 ----------------- 5 files changed, 867 deletions(-) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index efe4152e5846..ad83faecfdc6 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1033,9 +1033,6 @@ dtb-$(CONFIG_ARCH_PXA) +=3D \ pxa300-raumfeld-speaker-m.dtb \ pxa300-raumfeld-speaker-one.dtb \ pxa300-raumfeld-speaker-s.dtb -dtb-$(CONFIG_ARCH_OXNAS) +=3D \ - ox810se-wd-mbwe.dtb \ - ox820-cloudengines-pogoplug-series-3.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D \ qcom-apq8016-sbc.dtb \ qcom-apq8026-asus-sparrow.dtb \ diff --git a/arch/arm/boot/dts/ox810se-wd-mbwe.dts b/arch/arm/boot/dts/ox81= 0se-wd-mbwe.dts deleted file mode 100644 index c59e06ff2423..000000000000 --- a/arch/arm/boot/dts/ox810se-wd-mbwe.dts +++ /dev/null @@ -1,115 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Editi= on - * - * Copyright (C) 2016 Neil Armstrong - */ - -/dts-v1/; -#include "ox810se.dtsi" - -/ { - model =3D "Western Digital My Book World Edition"; - - compatible =3D "wd,mbwe", "oxsemi,ox810se"; - - chosen { - bootargs =3D "console=3DttyS1,115200n8 earlyprintk=3Dserial"; - }; - - memory { - /* 128Mbytes DDR */ - reg =3D <0x48000000 0x8000000>; - }; - - aliases { - serial1 =3D &uart1; - gpio0 =3D &gpio0; - gpio1 =3D &gpio1; - }; - - gpio-keys-polled { - compatible =3D "gpio-keys-polled"; - #address-cells =3D <1>; - #size-cells =3D <0>; - poll-interval =3D <100>; - - power { - label =3D "power"; - gpios =3D <&gpio0 0 1>; - linux,code =3D <0x198>; - }; - - recovery { - label =3D "recovery"; - gpios =3D <&gpio0 4 1>; - linux,code =3D <0xab>; - }; - }; - - leds { - compatible =3D "gpio-leds"; - - a0 { - label =3D "activity0"; - gpios =3D <&gpio0 25 0>; - default-state =3D "keep"; - }; - - a1 { - label =3D "activity1"; - gpios =3D <&gpio0 26 0>; - default-state =3D "keep"; - }; - - a2 { - label =3D "activity2"; - gpios =3D <&gpio0 5 0>; - default-state =3D "keep"; - }; - - a3 { - label =3D "activity3"; - gpios =3D <&gpio0 6 0>; - default-state =3D "keep"; - }; - - a4 { - label =3D "activity4"; - gpios =3D <&gpio0 7 0>; - default-state =3D "keep"; - }; - - a5 { - label =3D "activity5"; - gpios =3D <&gpio1 2 0>; - default-state =3D "keep"; - }; - }; - - i2c-gpio { - compatible =3D "i2c-gpio"; - gpios =3D <&gpio0 3 0 /* sda */ - &gpio0 2 0 /* scl */ - >; - i2c-gpio,delay-us =3D <2>; /* ~100 kHz */ - #address-cells =3D <1>; - #size-cells =3D <0>; - - rtc0: rtc@48 { - compatible =3D "st,m41t00"; - reg =3D <0x68>; - }; - }; -}; - -ða { - status =3D "okay"; -}; - -&uart1 { - status =3D "okay"; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_uart1>; -}; diff --git a/arch/arm/boot/dts/ox810se.dtsi b/arch/arm/boot/dts/ox810se.dtsi deleted file mode 100644 index 96c0745f7b70..000000000000 --- a/arch/arm/boot/dts/ox810se.dtsi +++ /dev/null @@ -1,357 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * ox810se.dtsi - Device tree file for Oxford Semiconductor OX810SE SoC - * - * Copyright (C) 2016 Neil Armstrong - */ - -#include -#include - -/ { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "oxsemi,ox810se"; - - cpus { - #address-cells =3D <0>; - #size-cells =3D <0>; - - cpu { - device_type =3D "cpu"; - compatible =3D "arm,arm926ej-s"; - clocks =3D <&armclk>; - }; - }; - - memory { - device_type =3D "memory"; - /* Max 256MB @ 0x48000000 */ - reg =3D <0x48000000 0x10000000>; - }; - - clocks { - osc: oscillator { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <25000000>; - }; - - gmacclk: gmacclk { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <125000000>; - }; - - rpsclk: rpsclk { - compatible =3D "fixed-factor-clock"; - #clock-cells =3D <0>; - clock-div =3D <1>; - clock-mult =3D <1>; - clocks =3D <&osc>; - }; - - pll400: pll400 { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <733333333>; - }; - - sysclk: sysclk { - compatible =3D "fixed-factor-clock"; - #clock-cells =3D <0>; - clock-div =3D <4>; - clock-mult =3D <1>; - clocks =3D <&pll400>; - }; - - armclk: armclk { - compatible =3D "fixed-factor-clock"; - #clock-cells =3D <0>; - clock-div =3D <2>; - clock-mult =3D <1>; - clocks =3D <&pll400>; - }; - }; - - soc { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "simple-bus"; - ranges; - interrupt-parent =3D <&intc>; - - etha: ethernet@40400000 { - compatible =3D "oxsemi,ox810se-dwmac", "snps,dwmac"; - reg =3D <0x40400000 0x2000>; - interrupts =3D <8>; - interrupt-names =3D "macirq"; - mac-address =3D [000000000000]; /* Filled in by U-Boot */ - phy-mode =3D "rgmii"; - - clocks =3D <&stdclk 6>, <&gmacclk>; - clock-names =3D "gmac", "stmmaceth"; - resets =3D <&reset 6>; - - /* Regmap for sys registers */ - oxsemi,sys-ctrl =3D <&sys>; - - status =3D "disabled"; - }; - - apb-bridge@44000000 { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "simple-bus"; - ranges =3D <0 0x44000000 0x1000000>; - - pinctrl: pinctrl { - compatible =3D "oxsemi,ox810se-pinctrl"; - - /* Regmap for sys registers */ - oxsemi,sys-ctrl =3D <&sys>; - - pinctrl_uart0: uart0 { - uart0a { - pins =3D "gpio31"; - function =3D "fct3"; - }; - uart0b { - pins =3D "gpio32"; - function =3D "fct3"; - }; - }; - - pinctrl_uart0_modem: uart0_modem { - uart0c { - pins =3D "gpio27"; - function =3D "fct3"; - }; - uart0d { - pins =3D "gpio28"; - function =3D "fct3"; - }; - uart0e { - pins =3D "gpio29"; - function =3D "fct3"; - }; - uart0f { - pins =3D "gpio30"; - function =3D "fct3"; - }; - uart0g { - pins =3D "gpio33"; - function =3D "fct3"; - }; - uart0h { - pins =3D "gpio34"; - function =3D "fct3"; - }; - }; - - pinctrl_uart1: uart1 { - uart1a { - pins =3D "gpio20"; - function =3D "fct3"; - }; - uart1b { - pins =3D "gpio22"; - function =3D "fct3"; - }; - }; - - pinctrl_uart1_modem: uart1_modem { - uart1c { - pins =3D "gpio8"; - function =3D "fct3"; - }; - uart1d { - pins =3D "gpio9"; - function =3D "fct3"; - }; - uart1e { - pins =3D "gpio23"; - function =3D "fct3"; - }; - uart1f { - pins =3D "gpio24"; - function =3D "fct3"; - }; - uart1g { - pins =3D "gpio25"; - function =3D "fct3"; - }; - uart1h { - pins =3D "gpio26"; - function =3D "fct3"; - }; - }; - - pinctrl_uart2: uart2 { - uart2a { - pins =3D "gpio6"; - function =3D "fct3"; - }; - uart2b { - pins =3D "gpio7"; - function =3D "fct3"; - }; - }; - - pinctrl_uart2_modem: uart2_modem { - uart2c { - pins =3D "gpio0"; - function =3D "fct3"; - }; - uart2d { - pins =3D "gpio1"; - function =3D "fct3"; - }; - uart2e { - pins =3D "gpio2"; - function =3D "fct3"; - }; - uart2f { - pins =3D "gpio3"; - function =3D "fct3"; - }; - uart2g { - pins =3D "gpio4"; - function =3D "fct3"; - }; - uart2h { - pins =3D "gpio5"; - function =3D "fct3"; - }; - }; - }; - - gpio0: gpio@0 { - compatible =3D "oxsemi,ox810se-gpio"; - reg =3D <0x000000 0x100000>; - interrupts =3D <21>; - #gpio-cells =3D <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells =3D <2>; - ngpios =3D <32>; - oxsemi,gpio-bank =3D <0>; - gpio-ranges =3D <&pinctrl 0 0 32>; - }; - - gpio1: gpio@100000 { - compatible =3D "oxsemi,ox810se-gpio"; - reg =3D <0x100000 0x100000>; - interrupts =3D <22>; - #gpio-cells =3D <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells =3D <2>; - ngpios =3D <3>; - oxsemi,gpio-bank =3D <1>; - gpio-ranges =3D <&pinctrl 0 32 3>; - }; - - uart0: serial@200000 { - compatible =3D "ns16550a"; - reg =3D <0x200000 0x100000>; - clocks =3D <&sysclk>; - interrupts =3D <23>; - reg-shift =3D <0>; - fifo-size =3D <16>; - reg-io-width =3D <1>; - current-speed =3D <115200>; - no-loopback-test; - status =3D "disabled"; - resets =3D <&reset RESET_UART1>; - }; - - uart1: serial@300000 { - compatible =3D "ns16550a"; - reg =3D <0x300000 0x100000>; - clocks =3D <&sysclk>; - interrupts =3D <24>; - reg-shift =3D <0>; - fifo-size =3D <16>; - reg-io-width =3D <1>; - current-speed =3D <115200>; - no-loopback-test; - status =3D "disabled"; - resets =3D <&reset RESET_UART2>; - }; - - uart2: serial@900000 { - compatible =3D "ns16550a"; - reg =3D <0x900000 0x100000>; - clocks =3D <&sysclk>; - interrupts =3D <29>; - reg-shift =3D <0>; - fifo-size =3D <16>; - reg-io-width =3D <1>; - current-speed =3D <115200>; - no-loopback-test; - status =3D "disabled"; - resets =3D <&reset RESET_UART3>; - }; - - uart3: serial@a00000 { - compatible =3D "ns16550a"; - reg =3D <0xa00000 0x100000>; - clocks =3D <&sysclk>; - interrupts =3D <30>; - reg-shift =3D <0>; - fifo-size =3D <16>; - reg-io-width =3D <1>; - current-speed =3D <115200>; - no-loopback-test; - status =3D "disabled"; - resets =3D <&reset RESET_UART4>; - }; - }; - - apb-bridge@45000000 { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "simple-bus"; - ranges =3D <0 0x45000000 0x1000000>; - - sys: sys-ctrl@0 { - compatible =3D "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd"; - reg =3D <0x000000 0x100000>; - - reset: reset-controller { - compatible =3D "oxsemi,ox810se-reset"; - #reset-cells =3D <1>; - }; - - stdclk: stdclk { - compatible =3D "oxsemi,ox810se-stdclk"; - #clock-cells =3D <1>; - }; - }; - - rps@300000 { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "simple-bus"; - ranges =3D <0 0x300000 0x100000>; - - intc: interrupt-controller@0 { - compatible =3D "oxsemi,ox810se-rps-irq"; - interrupt-controller; - reg =3D <0 0x200>; - #interrupt-cells =3D <1>; - valid-mask =3D <0xffffffff>; - clear-mask =3D <0xffffffff>; - }; - - timer0: timer@200 { - compatible =3D "oxsemi,ox810se-rps-timer"; - reg =3D <0x200 0x40>; - clocks =3D <&rpsclk>; - interrupts =3D <4 5>; - }; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts b/a= rch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts deleted file mode 100644 index c3daceccde55..000000000000 --- a/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts +++ /dev/null @@ -1,93 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engine= s PogoPlug Series 3 - * - * Copyright (C) 2016 Neil Armstrong - */ - -/dts-v1/; -#include "ox820.dtsi" - -/ { - model =3D "Cloud Engines PogoPlug Series 3"; - - compatible =3D "cloudengines,pogoplugv3", "oxsemi,ox820"; - - chosen { - bootargs =3D "earlyprintk"; - stdout-path =3D "serial0:115200n8"; - }; - - memory { - /* 128Mbytes DDR */ - reg =3D <0x60000000 0x8000000>; - }; - - aliases { - serial0 =3D &uart0; - gpio0 =3D &gpio0; - gpio1 =3D &gpio1; - }; - - leds { - compatible =3D "gpio-leds"; - - blue { - label =3D "pogoplug:blue"; - gpios =3D <&gpio0 2 0>; - default-state =3D "keep"; - }; - - orange { - label =3D "pogoplug:orange"; - gpios =3D <&gpio1 16 1>; - default-state =3D "keep"; - }; - - green { - label =3D "pogoplug:green"; - gpios =3D <&gpio1 17 1>; - default-state =3D "keep"; - }; - }; -}; - -&uart0 { - status =3D "okay"; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_uart0>; -}; - -&nandc { - status =3D "okay"; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_nand>; - - nand@0 { - reg =3D <0>; - #address-cells =3D <1>; - #size-cells =3D <1>; - nand-ecc-mode =3D "soft"; - nand-ecc-algo =3D "hamming"; - - partition@0 { - label =3D "boot"; - reg =3D <0x00000000 0x00e00000>; - read-only; - }; - - partition@e00000 { - label =3D "ubi"; - reg =3D <0x00e00000 0x07200000>; - }; - }; -}; - -ða { - status =3D "okay"; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_etha_mdio>; -}; diff --git a/arch/arm/boot/dts/ox820.dtsi b/arch/arm/boot/dts/ox820.dtsi deleted file mode 100644 index dde4364892bf..000000000000 --- a/arch/arm/boot/dts/ox820.dtsi +++ /dev/null @@ -1,299 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * ox820.dtsi - Device tree file for Oxford Semiconductor OX820 SoC - * - * Copyright (C) 2016 Neil Armstrong - */ - -#include -#include -#include - -/ { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "oxsemi,ox820"; - - cpus { - #address-cells =3D <1>; - #size-cells =3D <0>; - enable-method =3D "oxsemi,ox820-smp"; - - cpu@0 { - device_type =3D "cpu"; - compatible =3D "arm,arm11mpcore"; - clocks =3D <&armclk>; - reg =3D <0>; - }; - - cpu@1 { - device_type =3D "cpu"; - compatible =3D "arm,arm11mpcore"; - clocks =3D <&armclk>; - reg =3D <1>; - }; - }; - - memory { - device_type =3D "memory"; - /* Max 512MB @ 0x60000000 */ - reg =3D <0x60000000 0x20000000>; - }; - - clocks { - osc: oscillator { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <25000000>; - }; - - gmacclk: gmacclk { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <125000000>; - }; - - sysclk: sysclk { - compatible =3D "fixed-factor-clock"; - #clock-cells =3D <0>; - clock-div =3D <4>; - clock-mult =3D <1>; - clocks =3D <&osc>; - }; - - plla: plla { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <850000000>; - }; - - armclk: armclk { - compatible =3D "fixed-factor-clock"; - #clock-cells =3D <0>; - clock-div =3D <2>; - clock-mult =3D <1>; - clocks =3D <&plla>; - }; - }; - - soc { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "simple-bus"; - ranges; - interrupt-parent =3D <&gic>; - - nandc: nand-controller@41000000 { - compatible =3D "oxsemi,ox820-nand"; - reg =3D <0x41000000 0x100000>; - clocks =3D <&stdclk CLK_820_NAND>; - resets =3D <&reset RESET_NAND>; - #address-cells =3D <1>; - #size-cells =3D <0>; - status =3D "disabled"; - }; - - etha: ethernet@40400000 { - compatible =3D "oxsemi,ox820-dwmac", "snps,dwmac"; - reg =3D <0x40400000 0x2000>; - interrupts =3D , - ; - interrupt-names =3D "macirq", "eth_wake_irq"; - mac-address =3D [000000000000]; /* Filled in by U-Boot */ - phy-mode =3D "rgmii"; - - clocks =3D <&stdclk CLK_820_ETHA>, <&gmacclk>; - clock-names =3D "gmac", "stmmaceth"; - resets =3D <&reset RESET_MAC>; - - /* Regmap for sys registers */ - oxsemi,sys-ctrl =3D <&sys>; - - status =3D "disabled"; - }; - - apb-bridge@44000000 { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "simple-bus"; - ranges =3D <0 0x44000000 0x1000000>; - - pinctrl: pinctrl { - compatible =3D "oxsemi,ox820-pinctrl"; - - /* Regmap for sys registers */ - oxsemi,sys-ctrl =3D <&sys>; - - pinctrl_uart0: uart0 { - uart0 { - pins =3D "gpio30", "gpio31"; - function =3D "fct5"; - }; - }; - - pinctrl_uart0_modem: uart0_modem { - uart0_modem_a { - pins =3D "gpio24", "gpio24", "gpio26", "gpio27"; - function =3D "fct4"; - }; - uart0_modem_b { - pins =3D "gpio28", "gpio29"; - function =3D "fct5"; - }; - }; - - pinctrl_uart1: uart1 { - uart1 { - pins =3D "gpio7", "gpio8"; - function =3D "fct4"; - }; - }; - - pinctrl_uart1_modem: uart1_modem { - uart1_modem { - pins =3D "gpio5", "gpio6", "gpio40", "gpio41", "gpio42", "gpio43"; - function =3D "fct4"; - }; - }; - - pinctrl_etha_mdio: etha_mdio { - etha_mdio { - pins =3D "gpio3", "gpio4"; - function =3D "fct1"; - }; - }; - - pinctrl_nand: nand { - nand { - pins =3D "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", "gpio18", "gpio19", - "gpio20", "gpio21", "gpio22", "gpio23", - "gpio24"; - function =3D "fct1"; - }; - }; - }; - - gpio0: gpio@0 { - compatible =3D "oxsemi,ox820-gpio"; - reg =3D <0x000000 0x100000>; - interrupts =3D ; - #gpio-cells =3D <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells =3D <2>; - ngpios =3D <32>; - oxsemi,gpio-bank =3D <0>; - gpio-ranges =3D <&pinctrl 0 0 32>; - }; - - gpio1: gpio@100000 { - compatible =3D "oxsemi,ox820-gpio"; - reg =3D <0x100000 0x100000>; - interrupts =3D ; - #gpio-cells =3D <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells =3D <2>; - ngpios =3D <18>; - oxsemi,gpio-bank =3D <1>; - gpio-ranges =3D <&pinctrl 0 32 18>; - }; - - uart0: serial@200000 { - compatible =3D "ns16550a"; - reg =3D <0x200000 0x100000>; - interrupts =3D ; - reg-shift =3D <0>; - fifo-size =3D <16>; - reg-io-width =3D <1>; - current-speed =3D <115200>; - no-loopback-test; - status =3D "disabled"; - clocks =3D <&sysclk>; - resets =3D <&reset RESET_UART1>; - }; - - uart1: serial@300000 { - compatible =3D "ns16550a"; - reg =3D <0x200000 0x100000>; - interrupts =3D ; - reg-shift =3D <0>; - fifo-size =3D <16>; - reg-io-width =3D <1>; - current-speed =3D <115200>; - no-loopback-test; - status =3D "disabled"; - clocks =3D <&sysclk>; - resets =3D <&reset RESET_UART2>; - }; - - rps@400000 { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "simple-bus"; - ranges =3D <0 0x400000 0x100000>; - - intc: interrupt-controller@0 { - compatible =3D "oxsemi,ox820-rps-irq", "oxsemi,ox810se-rps-irq"; - interrupt-controller; - reg =3D <0 0x200>; - interrupts =3D ; - #interrupt-cells =3D <1>; - valid-mask =3D <0xffffffff>; - clear-mask =3D <0xffffffff>; - }; - - timer0: timer@200 { - compatible =3D "oxsemi,ox820-rps-timer"; - reg =3D <0x200 0x40>; - clocks =3D <&sysclk>; - interrupt-parent =3D <&intc>; - interrupts =3D <4>; - }; - }; - - sys: sys-ctrl@e00000 { - compatible =3D "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd"; - reg =3D <0xe00000 0x200000>; - - reset: reset-controller { - compatible =3D "oxsemi,ox820-reset", "oxsemi,ox810se-reset"; - #reset-cells =3D <1>; - }; - - stdclk: stdclk { - compatible =3D "oxsemi,ox820-stdclk", "oxsemi,ox810se-stdclk"; - #clock-cells =3D <1>; - }; - }; - }; - - apb-bridge@47000000 { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "simple-bus"; - ranges =3D <0 0x47000000 0x1000000>; - - scu: scu@0 { - compatible =3D "arm,arm11mp-scu"; - reg =3D <0x0 0x100>; - }; - - local-timer@600 { - compatible =3D "arm,arm11mp-twd-timer"; - reg =3D <0x600 0x20>; - interrupts =3D ; - clocks =3D <&armclk>; - }; - - gic: interrupt-controller@1000 { - compatible =3D "arm,arm11mp-gic"; - interrupt-controller; - #interrupt-cells =3D <3>; - reg =3D <0x1000 0x1000>, - <0x100 0x500>; - }; - }; - }; -}; --=20 2.34.1 From nobody Tue Feb 10 23:53:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE11AC77B60 for ; Mon, 3 Apr 2023 07:42:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231684AbjDCHmg (ORCPT ); Mon, 3 Apr 2023 03:42:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231664AbjDCHm3 (ORCPT ); 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Mon, 03 Apr 2023 00:42:24 -0700 (PDT) From: Neil Armstrong Date: Mon, 03 Apr 2023 09:42:19 +0200 Subject: [PATCH RFC v2 2/4] ARM: oxnas: remove OXNAS support MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230331-topic-oxnas-upstream-remove-v2-2-e51078376f08@linaro.org> References: <20230331-topic-oxnas-upstream-remove-v2-0-e51078376f08@linaro.org> In-Reply-To: <20230331-topic-oxnas-upstream-remove-v2-0-e51078376f08@linaro.org> To: Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Krzysztof Kozlowski , Russell King Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-oxnas@groups.io, Neil Armstrong , Linus Walleij , Daniel Golle X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Due to lack of maintainance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 ARM support. Acked-by: Linus Walleij Acked-by: Arnd Bergmann Acked-by: Daniel Golle Signed-off-by: Neil Armstrong --- arch/arm/Kconfig | 2 - arch/arm/Makefile | 1 - arch/arm/mach-oxnas/Kconfig | 38 ----------------- arch/arm/mach-oxnas/Makefile | 2 - arch/arm/mach-oxnas/headsmp.S | 23 ----------- arch/arm/mach-oxnas/platsmp.c | 96 ---------------------------------------= ---- 6 files changed, 162 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e24a9820e12f..017329401b3d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -497,8 +497,6 @@ source "arch/arm/mach-omap2/Kconfig" =20 source "arch/arm/mach-orion5x/Kconfig" =20 -source "arch/arm/mach-oxnas/Kconfig" - source "arch/arm/mach-pxa/Kconfig" =20 source "arch/arm/mach-qcom/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 485a439e22ca..547e5856eaa0 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -203,7 +203,6 @@ machine-$(CONFIG_ARCH_MSTARV7) +=3D mstar machine-$(CONFIG_ARCH_NOMADIK) +=3D nomadik machine-$(CONFIG_ARCH_NPCM) +=3D npcm machine-$(CONFIG_ARCH_NSPIRE) +=3D nspire -machine-$(CONFIG_ARCH_OXNAS) +=3D oxnas machine-$(CONFIG_ARCH_OMAP1) +=3D omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) +=3D omap2 machine-$(CONFIG_ARCH_ORION5X) +=3D orion5x diff --git a/arch/arm/mach-oxnas/Kconfig b/arch/arm/mach-oxnas/Kconfig deleted file mode 100644 index a9ded7079268..000000000000 --- a/arch/arm/mach-oxnas/Kconfig +++ /dev/null @@ -1,38 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -menuconfig ARCH_OXNAS - bool "Oxford Semiconductor OXNAS Family SoCs" - depends on (ARCH_MULTI_V5 && CPU_LITTLE_ENDIAN) || ARCH_MULTI_V6 - select ARCH_HAS_RESET_CONTROLLER - select COMMON_CLK_OXNAS - select GPIOLIB - select MFD_SYSCON - select OXNAS_RPS_TIMER - select PINCTRL_OXNAS - select RESET_CONTROLLER - select RESET_OXNAS - select VERSATILE_FPGA_IRQ - select PINCTRL - help - Support for OxNas SoC family developed by Oxford Semiconductor. - -if ARCH_OXNAS - -config MACH_OX810SE - bool "Support OX810SE Based Products" - depends on ARCH_MULTI_V5 - select CPU_ARM926T - help - Include Support for the Oxford Semiconductor OX810SE SoC Based Products. - -config MACH_OX820 - bool "Support OX820 Based Products" - depends on ARCH_MULTI_V6 - select ARM_GIC - select DMA_CACHE_RWFO if SMP - select HAVE_SMP - select HAVE_ARM_SCU if SMP - select HAVE_ARM_TWD if SMP - help - Include Support for the Oxford Semiconductor OX820 SoC Based Products. - -endif diff --git a/arch/arm/mach-oxnas/Makefile b/arch/arm/mach-oxnas/Makefile deleted file mode 100644 index 0e78ecfe6c49..000000000000 --- a/arch/arm/mach-oxnas/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_SMP) +=3D platsmp.o headsmp.o diff --git a/arch/arm/mach-oxnas/headsmp.S b/arch/arm/mach-oxnas/headsmp.S deleted file mode 100644 index 9c0f1479f33a..000000000000 --- a/arch/arm/mach-oxnas/headsmp.S +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2013 Ma Haijun - * Copyright (c) 2003 ARM Limited - * All Rights Reserved - */ -#include -#include - - __INIT - -/* - * OX820 specific entry point for secondary CPUs. - */ -ENTRY(ox820_secondary_startup) - mov r4, #0 - /* invalidate both caches and branch target cache */ - mcr p15, 0, r4, c7, c7, 0 - /* - * we've been released from the holding pen: secondary_stack - * should now contain the SVC stack for this core - */ - b secondary_startup diff --git a/arch/arm/mach-oxnas/platsmp.c b/arch/arm/mach-oxnas/platsmp.c deleted file mode 100644 index f0a50b9e61df..000000000000 --- a/arch/arm/mach-oxnas/platsmp.c +++ /dev/null @@ -1,96 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2016 Neil Armstrong - * Copyright (C) 2013 Ma Haijun - * Copyright (C) 2002 ARM Ltd. - * All Rights Reserved - */ -#include -#include -#include -#include - -#include -#include -#include -#include - -extern void ox820_secondary_startup(void); - -static void __iomem *cpu_ctrl; -static void __iomem *gic_cpu_ctrl; - -#define HOLDINGPEN_CPU_OFFSET 0xc8 -#define HOLDINGPEN_LOCATION_OFFSET 0xc4 - -#define GIC_NCPU_OFFSET(cpu) (0x100 + (cpu)*0x100) -#define GIC_CPU_CTRL 0x00 -#define GIC_CPU_CTRL_ENABLE 1 - -static int __init ox820_boot_secondary(unsigned int cpu, - struct task_struct *idle) -{ - /* - * Write the address of secondary startup into the - * system-wide flags register. The BootMonitor waits - * until it receives a soft interrupt, and then the - * secondary CPU branches to this address. - */ - writel(virt_to_phys(ox820_secondary_startup), - cpu_ctrl + HOLDINGPEN_LOCATION_OFFSET); - - writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET); - - /* - * Enable GIC cpu interface in CPU Interface Control Register - */ - writel(GIC_CPU_CTRL_ENABLE, - gic_cpu_ctrl + GIC_NCPU_OFFSET(cpu) + GIC_CPU_CTRL); - - /* - * Send the secondary CPU a soft interrupt, thereby causing - * the boot monitor to read the system wide flags register, - * and branch to the address found there. - */ - arch_send_wakeup_ipi_mask(cpumask_of(cpu)); - - return 0; -} - -static void __init ox820_smp_prepare_cpus(unsigned int max_cpus) -{ - struct device_node *np; - void __iomem *scu_base; - - np =3D of_find_compatible_node(NULL, NULL, "arm,arm11mp-scu"); - scu_base =3D of_iomap(np, 0); - of_node_put(np); - if (!scu_base) - return; - - /* Remap CPU Interrupt Interface Registers */ - np =3D of_find_compatible_node(NULL, NULL, "arm,arm11mp-gic"); - gic_cpu_ctrl =3D of_iomap(np, 1); - of_node_put(np); - if (!gic_cpu_ctrl) - goto unmap_scu; - - np =3D of_find_compatible_node(NULL, NULL, "oxsemi,ox820-sys-ctrl"); - cpu_ctrl =3D of_iomap(np, 0); - of_node_put(np); - if (!cpu_ctrl) - goto unmap_scu; - - scu_enable(scu_base); - flush_cache_all(); - -unmap_scu: - iounmap(scu_base); -} - -static const struct smp_operations ox820_smp_ops __initconst =3D { - .smp_prepare_cpus =3D ox820_smp_prepare_cpus, - .smp_boot_secondary =3D ox820_boot_secondary, -}; - -CPU_METHOD_OF_DECLARE(ox820_smp, "oxsemi,ox820-smp", &ox820_smp_ops); --=20 2.34.1 From nobody Tue Feb 10 23:53:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E950CC761A6 for ; Mon, 3 Apr 2023 07:42:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231728AbjDCHmj (ORCPT ); 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Mon, 03 Apr 2023 00:42:25 -0700 (PDT) From: Neil Armstrong Date: Mon, 03 Apr 2023 09:42:20 +0200 Subject: [PATCH RFC v2 3/4] ARM: configs: remove oxnas_v6_defconfig MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230331-topic-oxnas-upstream-remove-v2-3-e51078376f08@linaro.org> References: <20230331-topic-oxnas-upstream-remove-v2-0-e51078376f08@linaro.org> In-Reply-To: <20230331-topic-oxnas-upstream-remove-v2-0-e51078376f08@linaro.org> To: Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Krzysztof Kozlowski , Russell King Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-oxnas@groups.io, Neil Armstrong , Linus Walleij , Daniel Golle X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Due to lack of maintainance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX820 specific defconfig. Acked-by: Linus Walleij Acked-by: Arnd Bergmann Acked-by: Daniel Golle Signed-off-by: Neil Armstrong --- arch/arm/configs/oxnas_v6_defconfig | 92 ---------------------------------= ---- 1 file changed, 92 deletions(-) diff --git a/arch/arm/configs/oxnas_v6_defconfig b/arch/arm/configs/oxnas_v= 6_defconfig deleted file mode 100644 index 70a67b3fc91b..000000000000 --- a/arch/arm/configs/oxnas_v6_defconfig +++ /dev/null @@ -1,92 +0,0 @@ -CONFIG_SYSVIPC=3Dy -CONFIG_NO_HZ_IDLE=3Dy -CONFIG_HIGH_RES_TIMERS=3Dy -CONFIG_CGROUPS=3Dy -CONFIG_BLK_DEV_INITRD=3Dy -CONFIG_EMBEDDED=3Dy -CONFIG_PERF_EVENTS=3Dy -CONFIG_STRICT_KERNEL_RWX=3Dy -CONFIG_STRICT_MODULE_RWX=3Dy -CONFIG_ARCH_MULTI_V6=3Dy -CONFIG_ARCH_OXNAS=3Dy -CONFIG_MACH_OX820=3Dy -CONFIG_SMP=3Dy -CONFIG_NR_CPUS=3D16 -CONFIG_ARCH_FORCE_MAX_ORDER=3D12 -CONFIG_SECCOMP=3Dy -CONFIG_ARM_APPENDED_DTB=3Dy -CONFIG_ARM_ATAG_DTB_COMPAT=3Dy -CONFIG_KEXEC=3Dy -CONFIG_EFI=3Dy -CONFIG_CPU_IDLE=3Dy -CONFIG_ARM_CPUIDLE=3Dy -CONFIG_VFP=3Dy -CONFIG_MODULES=3Dy -CONFIG_MODULE_UNLOAD=3Dy -CONFIG_PARTITION_ADVANCED=3Dy -CONFIG_CMDLINE_PARTITION=3Dy -CONFIG_CMA=3Dy -CONFIG_NET=3Dy -CONFIG_PACKET=3Dy -CONFIG_UNIX=3Dy -CONFIG_INET=3Dy -CONFIG_IP_PNP=3Dy -CONFIG_IP_PNP_DHCP=3Dy -CONFIG_IP_PNP_BOOTP=3Dy -CONFIG_IP_PNP_RARP=3Dy -CONFIG_IPV6_ROUTER_PREF=3Dy -CONFIG_IPV6_OPTIMISTIC_DAD=3Dy -CONFIG_INET6_AH=3Dm -CONFIG_INET6_ESP=3Dm -CONFIG_INET6_IPCOMP=3Dm -CONFIG_IPV6_MIP6=3Dm -CONFIG_IPV6_TUNNEL=3Dm -CONFIG_IPV6_MULTIPLE_TABLES=3Dy -CONFIG_DEVTMPFS=3Dy -CONFIG_DEVTMPFS_MOUNT=3Dy -CONFIG_MTD=3Dy -CONFIG_MTD_CMDLINE_PARTS=3Dy -CONFIG_MTD_BLOCK=3Dy -CONFIG_MTD_RAW_NAND=3Dy -CONFIG_MTD_NAND_OXNAS=3Dy -CONFIG_MTD_UBI=3Dy -CONFIG_BLK_DEV_LOOP=3Dy -CONFIG_BLK_DEV_RAM=3Dy -CONFIG_BLK_DEV_RAM_SIZE=3D65536 -CONFIG_NETDEVICES=3Dy -CONFIG_STMMAC_ETH=3Dy -CONFIG_REALTEK_PHY=3Dy -CONFIG_INPUT_EVDEV=3Dy -CONFIG_SERIAL_8250=3Dy -CONFIG_SERIAL_8250_CONSOLE=3Dy -CONFIG_SERIAL_OF_PLATFORM=3Dy -CONFIG_GPIO_GENERIC_PLATFORM=3Dy -CONFIG_NEW_LEDS=3Dy -CONFIG_LEDS_CLASS=3Dy -CONFIG_LEDS_CLASS_FLASH=3Dm -CONFIG_LEDS_GPIO=3Dy -CONFIG_LEDS_TRIGGERS=3Dy -CONFIG_LEDS_TRIGGER_TIMER=3Dy -CONFIG_LEDS_TRIGGER_ONESHOT=3Dy -CONFIG_LEDS_TRIGGER_HEARTBEAT=3Dy -CONFIG_LEDS_TRIGGER_CPU=3Dy -CONFIG_LEDS_TRIGGER_GPIO=3Dy -CONFIG_LEDS_TRIGGER_DEFAULT_ON=3Dy -CONFIG_ARM_TIMER_SP804=3Dy -CONFIG_EXT4_FS=3Dy -CONFIG_MSDOS_FS=3Dy -CONFIG_VFAT_FS=3Dy -CONFIG_TMPFS=3Dy -CONFIG_TMPFS_POSIX_ACL=3Dy -CONFIG_UBIFS_FS=3Dy -CONFIG_PSTORE=3Dy -CONFIG_PSTORE_CONSOLE=3Dy -CONFIG_PSTORE_PMSG=3Dy -CONFIG_PSTORE_RAM=3Dy -CONFIG_NLS_CODEPAGE_437=3Dy -CONFIG_NLS_ISO8859_1=3Dy -CONFIG_NLS_UTF8=3Dy -CONFIG_DMA_CMA=3Dy -CONFIG_CMA_SIZE_MBYTES=3D64 -CONFIG_PRINTK_TIME=3Dy -CONFIG_MAGIC_SYSRQ=3Dy --=20 2.34.1 From nobody Tue Feb 10 23:53:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6EA7C76196 for ; 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Mon, 03 Apr 2023 00:42:26 -0700 (PDT) From: Neil Armstrong Date: Mon, 03 Apr 2023 09:42:21 +0200 Subject: [PATCH RFC v2 4/4] dt-bindings: arm: oxnas: remove obsolete bindings MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230331-topic-oxnas-upstream-remove-v2-4-e51078376f08@linaro.org> References: <20230331-topic-oxnas-upstream-remove-v2-0-e51078376f08@linaro.org> In-Reply-To: <20230331-topic-oxnas-upstream-remove-v2-0-e51078376f08@linaro.org> To: Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Krzysztof Kozlowski , Russell King Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-oxnas@groups.io, Neil Armstrong , Krzysztof Kozlowski , Linus Walleij , Daniel Golle X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Due to lack of maintainance and stall of development for a few years now, and since no new features will ever be added upstream, remove the OX810 and OX820 SoC and boards bindings. Acked-by: Krzysztof Kozlowski Acked-by: Linus Walleij Acked-by: Arnd Bergmann Acked-by: Daniel Golle Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/oxnas.txt | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/oxnas.txt b/Documentatio= n/devicetree/bindings/arm/oxnas.txt deleted file mode 100644 index ac64e60f99f1..000000000000 --- a/Documentation/devicetree/bindings/arm/oxnas.txt +++ /dev/null @@ -1,14 +0,0 @@ -Oxford Semiconductor OXNAS SoCs Family device tree bindings -------------------------------------------- - -Boards with the OX810SE SoC shall have the following properties: - Required root node property: - compatible: "oxsemi,ox810se" - -Boards with the OX820 SoC shall have the following properties: - Required root node property: - compatible: "oxsemi,ox820" - -Board compatible values: - - "wd,mbwe" (OX810SE) - - "cloudengines,pogoplugv3" (OX820) --=20 2.34.1