From nobody Mon Feb 9 16:51:42 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7950BC6FD18 for ; Tue, 28 Mar 2023 16:01:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233372AbjC1QA6 (ORCPT ); Tue, 28 Mar 2023 12:00:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233222AbjC1QAw (ORCPT ); Tue, 28 Mar 2023 12:00:52 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27FCC187; Tue, 28 Mar 2023 09:00:51 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32SE6LiH000459; Tue, 28 Mar 2023 18:00:37 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=wDfCr8jZN5vYHHtxsuLgPYHvtTc0ZO3/74yowxhODeU=; b=Wch/hwM6uhAzfdjul7RTJ1Ii86NXz5JMLZ8bFjAH4ymbshCLTYyYHWvhpgW6DpMXmJwh IfSqNCnQ0Q20rvgDXw/eDeyxjX/NEk28HGoy2YZ0Nh3FEvt3DGVnFXD/1/KWuj1KhW+7 0KoABevOb2jMzeoFFa6Tmy6XYFR9mrTSGobRHM90wzpBTwYouko7MLJvjtURcaI17abH JyEjiQ6fGBzB2T50JauNQE9ardLV3sg+cgWFmwo/XNI9+Njsb4J6hOYLXYLTV8OKpKqW EiK2+JlkdXdDQ5MqS7GITFL5G0BCVw227dzzkV7i9VrAiV034HyyuZCAbF/G0pRKJT0X UA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pkvs4u1xa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Mar 2023 18:00:37 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4A61C10002A; Tue, 28 Mar 2023 18:00:37 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 43F1F21A20D; Tue, 28 Mar 2023 18:00:37 +0200 (CEST) Received: from localhost (10.48.0.175) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Tue, 28 Mar 2023 18:00:36 +0200 From: Christophe Kerello To: , , CC: , , , Christophe Kerello , , Tudor Ambarus Subject: [PATCH v3 1/2] mtd: rawnand: stm32_fmc2: remove unsupported EDO mode Date: Tue, 28 Mar 2023 17:58:18 +0200 Message-ID: <20230328155819.225521-2-christophe.kerello@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230328155819.225521-1-christophe.kerello@foss.st.com> References: <20230328155819.225521-1-christophe.kerello@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.48.0.175] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-28_02,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove the EDO mode support from as the FMC2 controller does not support the feature. Signed-off-by: Christophe Kerello Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash c= ontroller driver") Cc: stable@vger.kernel.org #v5.4+ Reviewed-by: Tudor Ambarus --- Changes in v3: - The commit message has been reworked - Cc to stable added - Tudor Reviewed-by added drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/= stm32_fmc2_nand.c index 5d627048c420..3abb63d00a0b 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -1531,6 +1531,9 @@ static int stm32_fmc2_nfc_setup_interface(struct nand= _chip *chip, int chipnr, if (IS_ERR(sdrt)) return PTR_ERR(sdrt); =20 + if (sdrt->tRC_min < 30000) + return -EOPNOTSUPP; + if (chipnr =3D=3D NAND_DATA_IFACE_CHECK_ONLY) return 0; =20 --=20 2.25.1