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[35.228.215.61]) by smtp.gmail.com with ESMTPSA id w9-20020a05651203c900b004db2ac3a522sm5039572lfp.62.2023.03.28.03.07.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 03:07:27 -0700 (PDT) From: Tudor Ambarus To: nicolas.ferre@microchip.com, claudiu.beznea@microchip.com Cc: alexandre.belloni@bootlin.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tudor Ambarus Subject: [PATCH v2 1/4] ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency Date: Tue, 28 Mar 2023 10:07:20 +0000 Message-Id: <20230328100723.1593864-2-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230328100723.1593864-1-tudor.ambarus@linaro.org> References: <20230328100723.1593864-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Tudor Ambarus sama5d27-wlsom1 populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dt= s/at91-sama5d27_wlsom1.dtsi index 83bcf9fe0152..4617805c7748 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi @@ -220,7 +220,8 @@ qspi1_flash: flash@0 { #size-cells =3D <1>; compatible =3D "jedec,spi-nor"; reg =3D <0>; - spi-max-frequency =3D <80000000>; + spi-max-frequency =3D <104000000>; + spi-cs-setup-ns =3D <7>; spi-rx-bus-width =3D <4>; spi-tx-bus-width =3D <4>; m25p,fast-read; --=20 2.40.0.348.gf938b09366-goog From nobody Mon Feb 9 04:44:58 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC13AC76196 for ; Tue, 28 Mar 2023 10:08:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233004AbjC1KIO (ORCPT ); Tue, 28 Mar 2023 06:08:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230452AbjC1KIC (ORCPT ); Tue, 28 Mar 2023 06:08:02 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4B1D65B0 for ; Tue, 28 Mar 2023 03:07:34 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id br6so15035253lfb.11 for ; Tue, 28 Mar 2023 03:07:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679998049; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QrY1OuDR/+qlCoUvp7xD7ZWzVOeNYJFtAbaI7JDwTWM=; b=hAAal796U+HxnwWZF/jbseBG2s/J6J6okTwD6RMngnFNxbPF0DsSb8oeNgsAerlpW3 JtINISEkpC+k003xcvTYpBjP1OMQ3+P+RQI90SUJBJmDOfd6dGCMZIEbRIHh4QoKa8rL p7/1MZ0o5jRVz0unDAXst3BPondXBd7VIRLVHXz4UYdIZLkCey1xsZtZjVH39vb0AS7N vfPrd5FhdOKv8Ig4Dy3lfBEOYVQUYvhQOEomu4GiX3WVT+cugSf7ZEuPK9+16xwLUZOw IZdrRSIxpkNCnMd72yU4lgZanRw+9oubgeA+Gaw68eTPDNtxD9STdWKh1tQ6sEuYKawV SA6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679998049; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QrY1OuDR/+qlCoUvp7xD7ZWzVOeNYJFtAbaI7JDwTWM=; b=oMuvcTOwvT5w022zIiy3P4JIMyhHcstMtSA9MISt699H7tJD4tdkqRq1F+1aYRgKBn 8OwRp3a8QtGLHE04AqBKFqspsDkC5Ffi4gTASntraDldB3gQEcMf2wOQdY5K9Vtpj3gN t9nxmCWS5flSEQN64asHA1mEA0QvBkTgnsUmrHntig8FpnFaXgIoTGgQv/iiin1AFpIP BoEmFUwvWvV6lFW5ZH/SFcitnfKoyzYWHe1jHUciRVq8XeyZXca0Fe4MVzug3AI4wjbs 1DH3EDO1Nv6rS7jTogCUTKNYzHvtsXL6PzWMGBUbg5brPNj03BMTX42oEvT3aMa+9gPC NgQA== X-Gm-Message-State: AAQBX9cpd+4BD1wIYf7mGDETCBzA6SeAhcxCxBKHzP3ybM5E4OQJFsiC jSeozMxmZzMT1ygP5IXbvpjv5A== X-Google-Smtp-Source: AKy350ZsZw5YeU9rZZh2ZArIM673HB9SUzeWWISkt7rVHV+uwIedYI2WgTUkMLtoUghFlPgLUBKaeQ== X-Received: by 2002:ac2:52af:0:b0:4dd:b766:37ae with SMTP id r15-20020ac252af000000b004ddb76637aemr4088978lfm.13.1679998049213; Tue, 28 Mar 2023 03:07:29 -0700 (PDT) Received: from ta1.c.googlers.com.com (61.215.228.35.bc.googleusercontent.com. [35.228.215.61]) by smtp.gmail.com with ESMTPSA id w9-20020a05651203c900b004db2ac3a522sm5039572lfp.62.2023.03.28.03.07.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 03:07:28 -0700 (PDT) From: Tudor Ambarus To: nicolas.ferre@microchip.com, claudiu.beznea@microchip.com Cc: alexandre.belloni@bootlin.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tudor Ambarus Subject: [PATCH v2 2/4] ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum frequency Date: Tue, 28 Mar 2023 10:07:21 +0000 Message-Id: <20230328100723.1593864-3-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230328100723.1593864-1-tudor.ambarus@linaro.org> References: <20230328100723.1593864-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Tudor Ambarus sama5d27-som1 populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/= at91-sama5d27_som1.dtsi index 8aa9e8dea337..95ecb7d040a8 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi @@ -43,7 +43,8 @@ flash@0 { #size-cells =3D <1>; compatible =3D "jedec,spi-nor"; reg =3D <0>; - spi-max-frequency =3D <80000000>; + spi-max-frequency =3D <104000000>; + spi-cs-setup-ns =3D <7>; spi-tx-bus-width =3D <4>; spi-rx-bus-width =3D <4>; m25p,fast-read; --=20 2.40.0.348.gf938b09366-goog From nobody Mon Feb 9 04:44:58 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01B79C76196 for ; Tue, 28 Mar 2023 10:08:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233070AbjC1KIS (ORCPT ); Tue, 28 Mar 2023 06:08:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231757AbjC1KIE (ORCPT ); Tue, 28 Mar 2023 06:08:04 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96E407A93 for ; Tue, 28 Mar 2023 03:07:37 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id j11so15032050lfg.13 for ; Tue, 28 Mar 2023 03:07:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679998050; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HWHba6Uu0Ek+kYjlRBQm3S5zfLvA96w4h84b04kVQ3w=; b=gmEA9eVDLVEuSqY30iZ244dRPsGlbiyB2DELO2i4s5GtSoDMUM9hV+PSHoPzWy5SxJ g0RX4lC/YKWIHmAdN8RM3L0vVy5D+vLeinmSa2x24NM9NJ212Ta8hkX9GMvCyYuoyM1d DMivUm02j3CSGcX+2HDicI7kbDXNi39vCbYdSvY+DiDRyRjO9xqBmDXklc5N+qmLQVyk oG6icfSSoW2HuxANWejAi+MAj77T8TZBKRaqfvRVbgUhkfhP/+rUoxVomddaez/EsA0r VAL+fGHgaGPAVA92cIcy06G5vIqXzSsTmw8fxXk533Bttky56f6uL+bRsNS3TQ3uq/3/ +/kA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679998050; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HWHba6Uu0Ek+kYjlRBQm3S5zfLvA96w4h84b04kVQ3w=; b=CNl7JZlxZljCXFzzavo71HEC5xyZQUKwg5DuvavAoApJIY277e9aLPVfjMAviVOvYg E+J6hw+709qpQuJVUCovOXzXvp6P+nuIElx4/2FX9a75lJSXLqjcKf1oKqGHfe4rxGEc n4treJUBOX5pAf4+1PLcekHKUKd8Mg0OjaqHc8BrUfnVKnOK6SVjkunlqtB64pF9gb0p SLs4r7hO47rH71M+3TUN5ToAFrmvyz3zMQP1Yk5HlJASTqh1iXYO598YPCJooIV32WqZ 6s+AMZxtxM9jxL9I1+MH+ErhBE6BI9rVdChxKHTjRuRuO+3eYPkwzjiQYXWt1CfMdstK asjQ== X-Gm-Message-State: AAQBX9ey4Nar0bYGS6QR2tlE4nNXg5a52pWJJdYBBOpIA/23vwRu9rDJ Ey0TVh1xPB4bmbbPIQjKi2NZ1w== X-Google-Smtp-Source: AKy350ZtrujPPVXU4pT+yrqtYxfFvHNujl2xHI00jKUIXRYA9J1Z/6lIUWJ6l23l4tHUvBkykVs6YA== X-Received: by 2002:ac2:4434:0:b0:4eb:dd2:f3d2 with SMTP id w20-20020ac24434000000b004eb0dd2f3d2mr2271129lfl.43.1679998050106; Tue, 28 Mar 2023 03:07:30 -0700 (PDT) Received: from ta1.c.googlers.com.com (61.215.228.35.bc.googleusercontent.com. [35.228.215.61]) by smtp.gmail.com with ESMTPSA id w9-20020a05651203c900b004db2ac3a522sm5039572lfp.62.2023.03.28.03.07.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 03:07:29 -0700 (PDT) From: Tudor Ambarus To: nicolas.ferre@microchip.com, claudiu.beznea@microchip.com Cc: alexandre.belloni@bootlin.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tudor Ambarus Subject: [PATCH v2 3/4] ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency Date: Tue, 28 Mar 2023 10:07:22 +0000 Message-Id: <20230328100723.1593864-4-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230328100723.1593864-1-tudor.ambarus@linaro.org> References: <20230328100723.1593864-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Tudor Ambarus sama5d2_icp populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d2_icp.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at9= 1-sama5d2_icp.dts index 1346b8f2b259..999adeca6f33 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -669,7 +669,8 @@ flash@0 { #size-cells =3D <1>; compatible =3D "jedec,spi-nor"; reg =3D <0>; - spi-max-frequency =3D <80000000>; + spi-max-frequency =3D <104000000>; + spi-cs-setup-ns =3D <7>; spi-tx-bus-width =3D <4>; spi-rx-bus-width =3D <4>; m25p,fast-read; --=20 2.40.0.348.gf938b09366-goog From nobody Mon Feb 9 04:44:58 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3216AC76196 for ; Tue, 28 Mar 2023 10:08:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233007AbjC1KIW (ORCPT ); Tue, 28 Mar 2023 06:08:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232909AbjC1KIF (ORCPT ); Tue, 28 Mar 2023 06:08:05 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 002107AAD for ; Tue, 28 Mar 2023 03:07:37 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id y20so15100180lfj.2 for ; Tue, 28 Mar 2023 03:07:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679998051; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=48VlVOVaivhhP/O4cu0azvwlKJKtgxluZIhbOwUMy6s=; b=JPdpXlXQ65UESbAhf2kFM78+q5EwWYaFXefaBujqWctws3m6e4Bcy/S+TM+hNR64uj 9RrTtU9UGVrsiPuU+TkJpSYcE+XGzqZkgV0RiOlpt0UncBYLhrGCyoKsfxrDiRaJnibW pIGWYfaXDag6JUXHJnC5PJfC8jK3fQ0rAMGoDKzWvbx2oRTVnpy6Ggcly+t2oKnsKVOp M1quA9cL0tnH3ZaHN+l9uWmUXmFheoCqPAMzFpfdV9ZDO+WuZy1mqF7uVwOOD+OuK+YK DyhBVCEltGYIK+39fMXycKycJ4gM0J9j41/YZGXfPCKV30tPC8QW1HmdO2LSHR/MD6Ua aJCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679998051; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=48VlVOVaivhhP/O4cu0azvwlKJKtgxluZIhbOwUMy6s=; b=qeGWJ/qWuWZj0kABVogxN11HWF1wLcJaUwxWeroWDTjsVH8+IQmuAYXpZZpTVIUxbt KbgDeoO9yhELVnilIAI6kZR1eysynzvArhX7KgIu3X0sEXHv9wPOfmmAtLG0SaGHzD31 tSuBR599XDAEvYaousaepTjQGFx1cM9P9c2VnlPFSP0L04LBtXdr2pI2Hv5aSkAkf5ro R+XOlpNgldNQeZDlUE0mpWCv8I+PmSoGBv/145ps5z3JD582l1TBxJVr9TFES+izq6Bt XT4zHeANrToverWlC23HWD2+xbOZUCo/KXylQ37NCXz1cqR/Bp3T3Uzh417LL/KaEh9G T9hg== X-Gm-Message-State: AAQBX9dVVyl8STm1njCLfqvgx26FGhmETj3+UWljijOImt8RP75+RCBk +lb1pkkYPNFYFGzcD2JN8S4eKg== X-Google-Smtp-Source: AKy350ZNS5+M+UE9YcPOcjSTmGrxxrgHBsEWONdoLd+/o0kWKjyeb5j4mgTgkFcz/nuiGW/QUJL8Aw== X-Received: by 2002:a19:ee18:0:b0:4a4:68b8:f4f1 with SMTP id g24-20020a19ee18000000b004a468b8f4f1mr4606382lfb.55.1679998050986; Tue, 28 Mar 2023 03:07:30 -0700 (PDT) Received: from ta1.c.googlers.com.com (61.215.228.35.bc.googleusercontent.com. [35.228.215.61]) by smtp.gmail.com with ESMTPSA id w9-20020a05651203c900b004db2ac3a522sm5039572lfp.62.2023.03.28.03.07.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 03:07:30 -0700 (PDT) From: Tudor Ambarus To: nicolas.ferre@microchip.com, claudiu.beznea@microchip.com Cc: alexandre.belloni@bootlin.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tudor Ambarus Subject: [PATCH v2 4/4] ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency Date: Tue, 28 Mar 2023 10:07:23 +0000 Message-Id: <20230328100723.1593864-5-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230328100723.1593864-1-tudor.ambarus@linaro.org> References: <20230328100723.1593864-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Tudor Ambarus sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~33%. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sam9x60ek.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-= sam9x60ek.dts index 180e4b1aa2f6..5cd593028aff 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -578,7 +578,8 @@ flash@0 { #size-cells =3D <1>; compatible =3D "jedec,spi-nor"; reg =3D <0>; - spi-max-frequency =3D <80000000>; + spi-max-frequency =3D <104000000>; + spi-cs-setup-ns =3D <7>; spi-tx-bus-width =3D <4>; spi-rx-bus-width =3D <4>; m25p,fast-read; --=20 2.40.0.348.gf938b09366-goog