From nobody Sun Sep 7 13:34:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEEE0C4167B for ; Mon, 27 Nov 2023 15:52:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234154AbjK0Pwp (ORCPT ); Mon, 27 Nov 2023 10:52:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234058AbjK0Pw0 (ORCPT ); Mon, 27 Nov 2023 10:52:26 -0500 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E61FE10E4 for ; Mon, 27 Nov 2023 07:52:32 -0800 (PST) Received: by mail-ej1-x62d.google.com with SMTP id a640c23a62f3a-a00cbb83c82so630620966b.2 for ; Mon, 27 Nov 2023 07:52:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701100351; x=1701705151; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=47QyN1mARPQG0EF8lxrYb1VJmjeAmYEb6KvC/0GnTPA=; b=OhfiMbASj2LyZHj2bFCrD9V0OopmoIztmDEcoF4UGiolgSC8/XEo21WgQkyx59VRUs 4W0PkZzP+e0vwsXe1+ru9QnPA0J+oH/lKwRHH5e+FfIh16JeVJWgYlaCsBP9BMHvIU8M L8icG/i42Yc3jfBLFg0oYwItJYAOczt0m2hYPPV2WxQ8t/OQf2hoO26zudVh0O4PMoe4 5e0OBEYUjvE6su19SQmrhcSJRxs0My+Oa397zeeBwBRDFU/xyN5qh27BlrtJk2JxbYQb SL/fqF+CgsIrx1nQ5cYzS/mQuadoBi0N+YJt95tVgSAwqY0CyTdcjEqJmx97AboZfyf1 rGaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701100351; x=1701705151; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=47QyN1mARPQG0EF8lxrYb1VJmjeAmYEb6KvC/0GnTPA=; b=wcsgaqE/aSpqUMW0FmSXWzGH78rrhHXzL5JNcAep5K+uhSiAhA+BUIoW+5NeBPCMst ae4/kLJvaNHv6pztb5QGSmYMuk5TUjkuzoicRtlkDwAwTV/qXnLUrrPC9nvlslZfShM2 hP4RK72qkiGubWZNQ8Z4o9Y0EvRb4GQXwB5Vp1d57dgOr6T/PePSlwhH6ZCZHgctb87p HFKPdTx+apep2rBmcoJ+QDKiCRacRk7ux/gac7rDc+9ksJ404RBMkt8hmDSq45dEF5ow abj9WOLEuYw1Rkc0uKtteoIbz74S5M5s9j2WGO0r2MLeL8ThAvCHhZNa8y3K4bFHZNsQ 1wdg== X-Gm-Message-State: AOJu0YyJ1aKoZXEWTAngw/2XqaUqRKX1gN5iS8gwrJu6P1wRStDU6oUu 8/sanTS7bc7ZbuDBZLxBkJ69bA== X-Google-Smtp-Source: AGHT+IHlI+2GyN+pTXPLUIHl82AsYDnLdrlfx6uE0wlcWEcsj6YRdcmqrTlbA7tiW0BFKy303dKM8g== X-Received: by 2002:a17:906:2c4c:b0:a04:bd7c:b7f7 with SMTP id f12-20020a1709062c4c00b00a04bd7cb7f7mr8818684ejh.64.1701100351376; Mon, 27 Nov 2023 07:52:31 -0800 (PST) Received: from [10.167.154.1] (178235187180.dynamic-4-waw-k-2-3-0.vectranet.pl. [178.235.187.180]) by smtp.gmail.com with ESMTPSA id mb22-20020a170906eb1600b009fc0c42098csm5855150ejb.173.2023.11.27.07.52.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 07:52:31 -0800 (PST) From: Konrad Dybcio Date: Mon, 27 Nov 2023 16:52:12 +0100 Subject: [PATCH v7 1/2] dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230328-topic-msgram_mpm-v7-1-6ee2bfeaac2c@linaro.org> References: <20230328-topic-msgram_mpm-v7-0-6ee2bfeaac2c@linaro.org> In-Reply-To: <20230328-topic-msgram_mpm-v7-0-6ee2bfeaac2c@linaro.org> To: Andy Gross , Bjorn Andersson , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Krzysztof Kozlowski X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1701100347; l=3285; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=UnAJ2EWA9JR18tWPDeobMem6WcpQTcTZkHcMBc8DA5o=; b=6hyNFuljkC0LUFiRqT23DUyz8Mhfre8bXxB7IXiD5VbX/ZqGXggcwRPETj6PbbKE0naEU5tQV pzzAeZ5fIZVC3JF8oeSLTD8o3hEgLRxtDLGu96oOQmgRNVbwiEa7YTR X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Due to the wild nature of the Qualcomm RPM Message RAM, we can't really use 'reg' to point to the MPM's slice of Message RAM without cutting into an already-defined RPM MSG RAM node used for GLINK and SMEM. Document passing the register space as a slice of SRAM through the qcom,rpm-msg-ram property. This also makes 'reg' deprecated. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Konrad Dybcio --- .../bindings/interrupt-controller/qcom,mpm.yaml | 52 +++++++++++++++---= ---- 1 file changed, 35 insertions(+), 17 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,mp= m.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.ya= ml index 509d20c091af..4ce7912d8047 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml @@ -29,6 +29,12 @@ properties: maxItems: 1 description: Specifies the base address and size of vMPM registers in RPM MSG RAM. + deprecated: true + + qcom,rpm-msg-ram: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the APSS MPM slice of the RPM Message RAM =20 interrupts: maxItems: 1 @@ -64,33 +70,45 @@ properties: =20 required: - compatible - - reg - interrupts - mboxes - interrupt-controller - '#interrupt-cells' - qcom,mpm-pin-count - qcom,mpm-pin-map + - qcom,rpm-msg-ram =20 additionalProperties: false =20 examples: - | #include - mpm: interrupt-controller@45f01b8 { - compatible =3D "qcom,mpm"; - interrupts =3D ; - reg =3D <0x45f01b8 0x1000>; - mboxes =3D <&apcs_glb 1>; - interrupt-controller; - #interrupt-cells =3D <2>; - interrupt-parent =3D <&intc>; - qcom,mpm-pin-count =3D <96>; - qcom,mpm-pin-map =3D <2 275>, - <5 296>, - <12 422>, - <24 79>, - <86 183>, - <90 260>, - <91 260>; + + remoteproc-rpm { + compatible =3D "qcom,msm8998-rpm-proc", "qcom,rpm-proc"; + + glink-edge { + compatible =3D "qcom,glink-rpm"; + + interrupts =3D ; + qcom,rpm-msg-ram =3D <&rpm_msg_ram>; + mboxes =3D <&apcs_glb 0>; + }; + + mpm: interrupt-controller { + compatible =3D "qcom,mpm"; + qcom,rpm-msg-ram =3D <&apss_mpm>; + interrupts =3D ; + mboxes =3D <&apcs_glb 1>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&intc>; + qcom,mpm-pin-count =3D <96>; + qcom,mpm-pin-map =3D <2 275>, + <5 296>, + <12 422>, + <24 79>, + <86 183>, + <91 260>; + }; }; --=20 2.43.0 From nobody Sun Sep 7 13:34:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18F19C4167B for ; Mon, 27 Nov 2023 15:52:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233951AbjK0Pws (ORCPT ); Mon, 27 Nov 2023 10:52:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234156AbjK0Pw2 (ORCPT ); Mon, 27 Nov 2023 10:52:28 -0500 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9979FD59 for ; Mon, 27 Nov 2023 07:52:34 -0800 (PST) Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-a04196fc957so640501566b.2 for ; Mon, 27 Nov 2023 07:52:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701100353; x=1701705153; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Nr05hrGkuwY0DK8aGF98uretWKGuiZWVGVkXoVNznFQ=; b=hEJ9T6vlLFeLoKzEN9giyFjhRxFnttJoX9wqPfCkc4i35yb9e0C34LSYvT1XwY1CP8 /Qch3PeMq6QYMqgCvqxPfDaFirpq+p6pQq+1RjYwAsWRC0qjf3YJ2VWlpsu1ULe4TXsV gdy7OJANGa+7/iggFyg8oq18s6WLgmSp2meivvwUtfSVKWHCOrOY1/kpOIqDTr1bgfRB HiAMH3JWEnBKqYr0exaDmLyhWCzWpV67G7tZBQ4e2EYTj0SN7R5mMGfdEA0Zs/ViKSuG H7YAGfgGXxEJRmNPGp4peaJah6PlQNTQQ2jXNFbMrBjkE168vpzJypSVEKf5mvzY+WFz L0Hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701100353; x=1701705153; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Nr05hrGkuwY0DK8aGF98uretWKGuiZWVGVkXoVNznFQ=; b=v7k/29jxCK4HvsLLQuxukfLLMXo/f7f0cVI/UqXlCwr5DtRyqPHZirpsQWOs40Z2Xt LWw1WGSBAIujlmz2Aq0LDLt+9wer7FeY48ND4aJrY+ooDFC3PuJyKqLoVswnGduGWoYO Prl/vgdBVcb1DBbg/2VATNjo21B8+MU3HCbHX+rUcENme2e93ZO2GojH1vJfBl+3JzXZ CxffgYa+RVLZxwE+sFgOLf5UNyy74DXq9P+MiSWM/i5iG0cz6Y2gGWTfQWVt9XHO4l1b dLAX3JGRnzyaJA6JqjtpeZ8leN2nlgsc86aC8WeAf+n0+mrwxNO+oluEPMK+1kaceZtG JnIQ== X-Gm-Message-State: AOJu0YziRLY6rRgOO906NaF1ZFU08qTZliN0oz/Ki8xtfEbO+m0GJfSb LYF2k5jGy8VN2awsQauEto1/Lw== X-Google-Smtp-Source: AGHT+IEkZqbakDX6RaUQMrgNoB1fjuVjSjnDF0xLT5VTu9acxiYeOJPI7DIGLRk8T+aAMsn2tYqiwQ== X-Received: by 2002:a17:906:66c1:b0:9ff:77c2:e67f with SMTP id k1-20020a17090666c100b009ff77c2e67fmr8380126ejp.33.1701100353110; Mon, 27 Nov 2023 07:52:33 -0800 (PST) Received: from [10.167.154.1] (178235187180.dynamic-4-waw-k-2-3-0.vectranet.pl. [178.235.187.180]) by smtp.gmail.com with ESMTPSA id mb22-20020a170906eb1600b009fc0c42098csm5855150ejb.173.2023.11.27.07.52.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 07:52:32 -0800 (PST) From: Konrad Dybcio Date: Mon, 27 Nov 2023 16:52:13 +0100 Subject: [PATCH v7 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230328-topic-msgram_mpm-v7-2-6ee2bfeaac2c@linaro.org> References: <20230328-topic-msgram_mpm-v7-0-6ee2bfeaac2c@linaro.org> In-Reply-To: <20230328-topic-msgram_mpm-v7-0-6ee2bfeaac2c@linaro.org> To: Andy Gross , Bjorn Andersson , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Bryan O'Donoghue X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1701100347; l=2888; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=xv+mWCEly/nIv85AR5MmmU/wkLvnOBn7Ei5h/U9JNy0=; b=d0wDKn96S5wPzxqpjV9SfTtHRQKUGg0oVkzShzFNVW58PHwEZQNEFHHiBEflYbkWgBSJY96Bo dermZgeioXjBYae0UzHuHrS04+dp0cFDYzidoyvkZUuBtBTXjCOdJO1 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The MPM hardware is accessible to us from the ARM CPUs through a shared memory region (RPM MSG RAM) that's also concurrently accessed by other kinds of cores on the system (like modem, ADSP etc.). Modeling this relation in a (somewhat) sane manner in the device tree basically requires us to either present the MPM as a child of said memory region (which makes little sense, as a mapped memory carveout is not a bus), define nodes which bleed their register spaces into one another, or passing their slice of the MSG RAM through some kind of a property. Go with the third option and add a way to map a region passed through the "qcom,rpm-msg-ram" property as our register space. The current way of using 'reg' is preserved for ABI reasons. Acked-by: Shawn Guo Reviewed-by: Bryan O'Donoghue Signed-off-by: Konrad Dybcio --- drivers/irqchip/irq-qcom-mpm.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c index 7124565234a5..cda5838d2232 100644 --- a/drivers/irqchip/irq-qcom-mpm.c +++ b/drivers/irqchip/irq-qcom-mpm.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struc= t device_node *parent) struct device *dev =3D &pdev->dev; struct irq_domain *parent_domain; struct generic_pm_domain *genpd; + struct device_node *msgram_np; struct qcom_mpm_priv *priv; unsigned int pin_cnt; + struct resource res; int i, irq; int ret; =20 @@ -374,9 +377,26 @@ static int qcom_mpm_init(struct device_node *np, struc= t device_node *parent) =20 raw_spin_lock_init(&priv->lock); =20 - priv->base =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); + /* If we have a handle to an RPM message ram partition, use it. */ + msgram_np =3D of_parse_phandle(np, "qcom,rpm-msg-ram", 0); + if (msgram_np) { + ret =3D of_address_to_resource(msgram_np, 0, &res); + if (ret) { + of_node_put(msgram_np); + return ret; + } + + /* Don't use devm_ioremap_resource, as we're accessing a shared region. = */ + priv->base =3D devm_ioremap(dev, res.start, resource_size(&res)); + of_node_put(msgram_np); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } else { + /* Otherwise, fall back to simple MMIO. */ + priv->base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } =20 for (i =3D 0; i < priv->reg_stride; i++) { qcom_mpm_write(priv, MPM_REG_ENABLE, i, 0); --=20 2.43.0