From nobody Mon Feb 9 17:56:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2B9CC76195 for ; Mon, 27 Mar 2023 23:17:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232019AbjC0XRy (ORCPT ); Mon, 27 Mar 2023 19:17:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230432AbjC0XRm (ORCPT ); Mon, 27 Mar 2023 19:17:42 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 626EE2129; Mon, 27 Mar 2023 16:17:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679959061; x=1711495061; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+aKPPSGltRYTSFQIA0jmfTMfQ61VKUSyWFf8UtKgL5A=; b=XDG8Cw4fUCXXT2VuszsRTfpLFHOC9sz641brUwMaLfFbZlipgM9rEYgs YukmFKA5nWtJH5VxLzr8P5xWwwvJrkm9OuuasTi7U3Nwt4d/3xl3jQM+Q qExifXybV6rql5iFVxUhcHAzP79jPTrqo7HiarIwpW5ehn9pdeABI6QFP Xt4VOtGoQOgI+sonb4Z8taF6psNGuweJ+u+fsBcmRd9L53Pzy9RCR70Ih wSkQsVh+z2b85qLacuPKA1TN2g2JL4sPebUvuzMXWPIRJeE8Cs2O9Zjb5 8dEk3YpmovInVcBaKj8Hf6CpLXb175aMpMGTGr67bZ4GPGwyiA5g2e7Xt g==; X-IronPort-AV: E=McAfee;i="6600,9927,10662"; a="320817335" X-IronPort-AV: E=Sophos;i="5.98,295,1673942400"; d="scan'208";a="320817335" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2023 16:17:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10662"; a="686144737" X-IronPort-AV: E=Sophos;i="5.98,295,1673942400"; d="scan'208";a="686144737" Received: from srinivas-otcpl-7600.jf.intel.com (HELO jacob-builder.jf.intel.com) ([10.54.39.106]) by fmsmga007.fm.intel.com with ESMTP; 27 Mar 2023 16:17:40 -0700 From: Jacob Pan To: LKML , iommu@lists.linux.dev, Jason Gunthorpe , "Lu Baolu" , Joerg Roedel , dmaengine@vger.kernel.org, vkoul@kernel.org Cc: "Robin Murphy" , "Will Deacon" , David Woodhouse , Raj Ashok , "Tian, Kevin" , Yi Liu , "Yu, Fenghua" , Dave Jiang , Tony Luck , "Zanussi, Tom" , Jacob Pan Subject: [PATCH v2 6/8] iommu/vt-d: Implement set_dev_pasid domain op Date: Mon, 27 Mar 2023 16:21:36 -0700 Message-Id: <20230327232138.1490712-7-jacob.jun.pan@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327232138.1490712-1-jacob.jun.pan@linux.intel.com> References: <20230327232138.1490712-1-jacob.jun.pan@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Devices that use ENQCMDS to submit work on buffers mapped by DMA API must attach a PASID to the default domain of the device. In preparation for this use case, this patch implements set_dev_pasid() for the default_domain_ops. Besides PASID attachment, device will also be attached to the domain as the result of this call if the device has not been attached before. Signed-off-by: Jacob Pan --- drivers/iommu/intel/iommu.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 0a195136bac7..652ee0ca72da 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4782,6 +4782,26 @@ static void intel_iommu_remove_dev_pasid(struct devi= ce *dev, ioasid_t pasid) intel_iommu_detach_device_pasid(domain, dev, pasid); } =20 +static int intel_iommu_attach_device_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) +{ + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); + struct intel_iommu *iommu =3D info->iommu; + int ret; + + if (!pasid_supported(iommu)) + return -ENODEV; + + ret =3D prepare_domain_attach_device(domain, dev); + if (ret) + return ret; + + return dmar_domain_attach_device_pasid(dmar_domain, dev, pasid); +} + + + const struct iommu_ops intel_iommu_ops =3D { .capable =3D intel_iommu_capable, .domain_alloc =3D intel_iommu_domain_alloc, @@ -4801,6 +4821,7 @@ const struct iommu_ops intel_iommu_ops =3D { #endif .default_domain_ops =3D &(const struct iommu_domain_ops) { .attach_dev =3D intel_iommu_attach_device, + .set_dev_pasid =3D intel_iommu_attach_device_pasid, .map_pages =3D intel_iommu_map_pages, .unmap_pages =3D intel_iommu_unmap_pages, .iotlb_sync_map =3D intel_iommu_iotlb_sync_map, --=20 2.25.1